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/Linux-v5.10/drivers/net/ethernet/intel/e1000e/
Dmac.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
7 * e1000e_get_bus_info_pcie - Get PCIe bus information
16 struct e1000_mac_info *mac = &hw->mac; in e1000e_get_bus_info_pcie()
17 struct e1000_bus_info *bus = &hw->bus; in e1000e_get_bus_info_pcie()
18 struct e1000_adapter *adapter = hw->adapter; in e1000e_get_bus_info_pcie()
21 cap_offset = adapter->pdev->pcie_cap; in e1000e_get_bus_info_pcie()
23 bus->width = e1000_bus_width_unknown; in e1000e_get_bus_info_pcie()
25 pci_read_config_word(adapter->pdev, in e1000e_get_bus_info_pcie()
28 bus->width = (enum e1000_bus_width)((pcie_link_status & in e1000e_get_bus_info_pcie()
[all …]
Dphy.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
36 * e1000e_check_reset_block_generic - Check if PHY reset is blocked
39 * Read the PHY management control register and check whether a PHY reset
53 * e1000e_get_phy_id - Retrieve the PHY ID and revision
61 struct e1000_phy_info *phy = &hw->phy; in e1000e_get_phy_id()
66 if (!phy->ops.read_reg) in e1000e_get_phy_id()
74 phy->id = (u32)(phy_id << 16); in e1000e_get_phy_id()
80 phy->id |= (u32)(phy_id & PHY_REVISION_MASK); in e1000e_get_phy_id()
81 phy->revision = (u32)(phy_id & ~PHY_REVISION_MASK); in e1000e_get_phy_id()
[all …]
Ddefines.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
12 /* Wake Up Control */
19 /* Wake Up Filter Control */
34 /* Extended Device Control */
46 #define E1000_CTRL_EXT_IAME 0x08000000 /* Int ACK Auto-mask */
99 /* Management Control */
100 #define E1000_MANC_SMBUS_EN 0x00000001 /* SMBus Enabled - RO */
101 #define E1000_MANC_ASF_EN 0x00000002 /* ASF Enabled - RO */
115 /* Receive Control */
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/Linux-v5.10/drivers/net/ethernet/intel/igc/
Digc_mac.c1 // SPDX-License-Identifier: GPL-2.0
11 * igc_disable_pcie_master - Disables PCI-express master access
14 * Returns 0 (0) if successful, else returns -10
15 * (-IGC_ERR_MASTER_REQUESTS_PENDING) if master disable bit has not caused
18 * Disables PCI-Express master access and verifies there are no pending
36 timeout--; in igc_disable_pcie_master()
41 ret_val = -IGC_ERR_MASTER_REQUESTS_PENDING; in igc_disable_pcie_master()
50 * igc_init_rx_addrs - Initialize receive addresses
66 hw->mac.ops.rar_set(hw, hw->mac.addr, 0); in igc_init_rx_addrs()
68 /* Zero out the other (rar_entry_count - 1) receive addresses */ in igc_init_rx_addrs()
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Digc_phy.c1 // SPDX-License-Identifier: GPL-2.0
7 * igc_check_reset_block - Check if PHY reset is blocked
10 * Read the PHY management control register and check whether a PHY reset
25 * igc_get_phy_id - Retrieve the PHY ID and revision
33 struct igc_phy_info *phy = &hw->phy; in igc_get_phy_id()
37 ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id); in igc_get_phy_id()
41 phy->id = (u32)(phy_id << 16); in igc_get_phy_id()
43 ret_val = phy->ops.read_reg(hw, PHY_ID2, &phy_id); in igc_get_phy_id()
47 phy->id |= (u32)(phy_id & PHY_REVISION_MASK); in igc_get_phy_id()
48 phy->revision = (u32)(phy_id & ~PHY_REVISION_MASK); in igc_get_phy_id()
[all …]
Digc_defines.h1 /* SPDX-License-Identifier: GPL-2.0 */
14 /* Wake Up Control */
17 /* Wake Up Filter Control */
47 /* Loop limit on how long we wait for auto-negotiation to complete */
88 /* Device Control */
96 #define IGC_CTRL_RFCE 0x08000000 /* Receive Flow Control enable */
97 #define IGC_CTRL_TFCE 0x10000000 /* Transmit flow control enable */
125 /* 1000BASE-T Control Register */
130 /* 1000BASE-T Status Register */
136 #define ANEG_MULTIGBT_AN_CTRL 0x0020 /* MULTI GBT AN Control Register */
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/Linux-v5.10/drivers/net/ethernet/intel/igb/
De1000_mac.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
18 * igb_get_bus_info_pcie - Get PCIe bus information
27 struct e1000_bus_info *bus = &hw->bus; in igb_get_bus_info_pcie()
32 bus->type = e1000_bus_type_pci_express; in igb_get_bus_info_pcie()
38 bus->width = e1000_bus_width_unknown; in igb_get_bus_info_pcie()
39 bus->speed = e1000_bus_speed_unknown; in igb_get_bus_info_pcie()
43 bus->speed = e1000_bus_speed_2500; in igb_get_bus_info_pcie()
46 bus->speed = e1000_bus_speed_5000; in igb_get_bus_info_pcie()
49 bus->speed = e1000_bus_speed_unknown; in igb_get_bus_info_pcie()
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De1000_phy.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
31 * igb_check_reset_block - Check if PHY reset is blocked
34 * Read the PHY management control register and check whether a PHY reset
48 * igb_get_phy_id - Retrieve the PHY ID and revision
56 struct e1000_phy_info *phy = &hw->phy; in igb_get_phy_id()
61 if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211)) in igb_get_phy_id()
62 phy->ops.write_reg(hw, I347AT4_PAGE_SELECT, 0); in igb_get_phy_id()
64 ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id); in igb_get_phy_id()
68 phy->id = (u32)(phy_id << 16); in igb_get_phy_id()
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De1000_regs.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
7 #define E1000_CTRL 0x00000 /* Device Control - RW */
8 #define E1000_STATUS 0x00008 /* Device Status - RO */
9 #define E1000_EECD 0x00010 /* EEPROM/Flash Control - RW */
10 #define E1000_EERD 0x00014 /* EEPROM Read - RW */
11 #define E1000_CTRL_EXT 0x00018 /* Extended Device Control - RW */
12 #define E1000_MDIC 0x00020 /* MDI Control - RW */
13 #define E1000_MDICNFG 0x00E04 /* MDI Config - RW */
14 #define E1000_SCTL 0x00024 /* SerDes Control - RW */
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/Linux-v5.10/drivers/net/ethernet/intel/e1000/
De1000_hw.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2006 Intel Corporation. */
88 * e1000_set_phy_type - Set the phy type member in the hw struct.
93 if (hw->mac_type == e1000_undefined) in e1000_set_phy_type()
94 return -E1000_ERR_PHY_TYPE; in e1000_set_phy_type()
96 switch (hw->phy_id) { in e1000_set_phy_type()
102 hw->phy_type = e1000_phy_m88; in e1000_set_phy_type()
105 if (hw->mac_type == e1000_82541 || in e1000_set_phy_type()
106 hw->mac_type == e1000_82541_rev_2 || in e1000_set_phy_type()
107 hw->mac_type == e1000_82547 || in e1000_set_phy_type()
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De1000_param.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2006 Intel Corporation. */
12 #define OPTION_UNSET -1
30 * Valid Range: 80-256 for 82542 and 82543 gigabit ethernet controllers
31 * Valid Range: 80-4096 for 82544 and newer
39 * Valid Range: 80-256 for 82542 and 82543 gigabit ethernet controllers
40 * Valid Range: 80-4096 for 82544 and newer
49 * - 0 - auto-negotiate at all supported speeds
50 * - 10 - only link at 10 Mbps
51 * - 100 - only link at 100 Mbps
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/Linux-v5.10/Documentation/devicetree/bindings/serial/
Dmilbeaut-uart.txt4 - compatible: should be "socionext,milbeaut-usio-uart".
5 - reg: offset and length of the register set for the device.
6 - interrupts: two interrupts specifier.
7 - interrupt-names: should be "rx", "tx".
8 - clocks: phandle to the input clock.
11 - auto-flow-control: flow control enable.
15 compatible = "socionext,milbeaut-usio-uart";
18 interrupt-names = "rx", "tx";
20 auto-flow-control;
Dsocionext,uniphier-uart.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/serial/socionext,uniphier-uart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Masahiro Yamada <yamada.masahiro@socionext.com>
14 const: socionext,uniphier-uart
25 auto-flow-control:
26 description: enable automatic flow control support.
30 - compatible
31 - reg
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/Linux-v5.10/Documentation/networking/device_drivers/ethernet/intel/
Di40e.rst1 .. SPDX-License-Identifier: GPL-2.0+
8 Copyright(c) 1999-2018 Intel Corporation.
13 - Overview
14 - Identifying Your Adapter
15 - Intel(R) Ethernet Flow Director
16 - Additional Configurations
17 - Known Issues
18 - Support
47 ----------------------
49 …intel.com/content/dam/www/public/us/en/documents/release-notes/xl710-ethernet-controller-feature-m…
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Dixgbe.rst1 .. SPDX-License-Identifier: GPL-2.0+
8 Copyright(c) 1999-2018 Intel Corporation.
13 - Identifying Your Adapter
14 - Command Line Parameters
15 - Additional Configurations
16 - Known Issues
17 - Support
36 ----------------------------------
38 82599-BASED ADAPTERS
41 - If your 82599-based Intel(R) Network Adapter came with Intel optics or is an
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/Linux-v5.10/drivers/tty/serial/jsm/
Djsm_neo.c1 // SPDX-License-Identifier: GPL-2.0+
25 * a non-destructive, read-only location on the Neo card.
27 * In this case, we are reading the DVID (Read-only Device Identification)
32 readb(bd->re_map_membase + 0x8D); in neo_pci_posting_flush()
38 ier = readb(&ch->ch_neo_uart->ier); in neo_set_cts_flow_control()
39 efr = readb(&ch->ch_neo_uart->efr); in neo_set_cts_flow_control()
41 jsm_dbg(PARAM, &ch->ch_bd->pci_dev, "Setting CTSFLOW\n"); in neo_set_cts_flow_control()
43 /* Turn on auto CTS flow control */ in neo_set_cts_flow_control()
47 /* Turn off auto Xon flow control */ in neo_set_cts_flow_control()
51 writeb(0, &ch->ch_neo_uart->efr); in neo_set_cts_flow_control()
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/Linux-v5.10/drivers/net/ethernet/oki-semi/pch_gbe/
Dpch_gbe_param.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 1999 - 2010 Intel Corporation.
12 #define OPTION_UNSET -1
17 * TxDescriptors - Transmit Descriptor Count
18 * @Valid Range: PCH_GBE_MIN_TXD - PCH_GBE_MAX_TXD
26 * RxDescriptors -Receive Descriptor Count
27 * @Valid Range: PCH_GBE_MIN_RXD - PCH_GBE_MAX_RXD
35 * Speed - User Specified Speed Override
37 * - 0: auto-negotiate at all supported speeds
38 * - 10: only link at 10 Mbps
[all …]
/Linux-v5.10/drivers/net/usb/
Dsmsc95xx.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * Copyright (C) 2007-2008 SMSC
38 /* SCSRs - System Control and Status Registers */
82 #define HW_CFG_ETC_ (0x00000010) /* EEPROM Timeout Control */
96 /* Power Management Control Register */
124 /* Automatic Flow Control Configuration Register */
126 #define AFC_CFG_HI_ (0x00FF0000) /* Auto Flow Ctrl High Level */
127 #define AFC_CFG_LO_ (0x0000FF00) /* Auto Flow Ctrl Low Level */
129 #define AFC_CFG_FC_MULT_ (0x00000008) /* Flow Ctrl on Mcast Frame */
130 #define AFC_CFG_FC_BRD_ (0x00000004) /* Flow Ctrl on Bcast Frame */
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/Linux-v5.10/include/net/phonet/
Dpep.h1 /* SPDX-License-Identifier: GPL-2.0-only */
16 /* XXX: union-ify listening vs connected stuff ? */
30 u8 rx_fc; /* RX flow control */
31 u8 tx_fc; /* TX flow control */
32 u8 init_enable; /* auto-enable at creation */
127 /* Phonet pipe sub-block types */
138 /* Phonet pipe flow control models */
149 /* Phonet pipe flow control states */
/Linux-v5.10/include/uapi/linux/
Dserial_reg.h1 /* SPDX-License-Identifier: GPL-1.0+ WITH Linux-syscall-note */
48 #define UART_FCR 2 /* Out: FIFO Control Register */
98 #define UART_LCR 3 /* Out: Line Control Register */
104 #define UART_LCR_SBC 0x40 /* Set break control */
121 #define UART_MCR 4 /* Out: Modem Control Register */
125 #define UART_MCR_AFE 0x20 /* Enable auto-RTS/CTS (TI16C550C/TI16C750) */
135 #define UART_LSR_THRE 0x20 /* Transmit-hold-register empty */
168 #define UART_EFR_CTS 0x80 /* CTS flow control */
169 #define UART_EFR_RTS 0x40 /* RTS flow control */
171 #define UART_EFR_ECB 0x10 /* Enhanced control bit */
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/Linux-v5.10/drivers/tty/serial/
Dmax310x.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2012-2016 Alexander Shiyan <shc_work@mail.ru>
49 #define MAX310X_HDPIXDELAY_REG (0x0d) /* Auto transceiver delays */
51 #define MAX310X_FLOWLVL_REG (0x0f) /* Flow control levels */
55 #define MAX310X_FLOWCTRL_REG (0x13) /* Flow control */
102 #define MAX310X_SPCHR_MULTIDROP_BIT (1 << 5) /* 9-bit multidrop addr char */
115 #define MAX310X_MODE1_TXHIZ_BIT (1 << 2) /* TX pin three-state */
116 #define MAX310X_MODE1_RTSHIZ_BIT (1 << 3) /* RTS pin three-state */
119 #define MAX310X_MODE1_AUTOSLEEP_BIT (1 << 6) /* Auto sleep enable */
129 #define MAX310X_MODE2_MULTIDROP_BIT (1 << 6) /* 9-bit multidrop enable */
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Dmilbeaut_usio.c1 // SPDX-License-Identifier: GPL-2.0
15 #define USIO_NAME "mlb-usio-uart"
67 writew(readw(port->membase + MLB_USIO_REG_FCR) & ~MLB_USIO_FCR_FTIE, in mlb_usio_stop_tx()
68 port->membase + MLB_USIO_REG_FCR); in mlb_usio_stop_tx()
69 writeb(readb(port->membase + MLB_USIO_REG_SCR) & ~MLB_USIO_SCR_TBIE, in mlb_usio_stop_tx()
70 port->membase + MLB_USIO_REG_SCR); in mlb_usio_stop_tx()
75 struct circ_buf *xmit = &port->state->xmit; in mlb_usio_tx_chars()
78 writew(readw(port->membase + MLB_USIO_REG_FCR) & ~MLB_USIO_FCR_FTIE, in mlb_usio_tx_chars()
79 port->membase + MLB_USIO_REG_FCR); in mlb_usio_tx_chars()
80 writeb(readb(port->membase + MLB_USIO_REG_SCR) & in mlb_usio_tx_chars()
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/Linux-v5.10/drivers/net/ethernet/atheros/atl1e/
Datl1e_hw.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
36 * 00-0B-6A-F6-00-DC in atl1e_hw_set_mac_addr()
40 value = (((u32)hw->mac_addr[2]) << 24) | in atl1e_hw_set_mac_addr()
41 (((u32)hw->mac_addr[3]) << 16) | in atl1e_hw_set_mac_addr()
42 (((u32)hw->mac_addr[4]) << 8) | in atl1e_hw_set_mac_addr()
43 (((u32)hw->mac_addr[5])) ; in atl1e_hw_set_mac_addr()
46 value = (((u32)hw->mac_addr[0]) << 8) | in atl1e_hw_set_mac_addr()
47 (((u32)hw->mac_addr[1])) ; in atl1e_hw_set_mac_addr()
62 if (is_valid_ether_addr(hw->perm_mac_addr)) in atl1e_get_permanent_address()
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/Linux-v5.10/drivers/net/ethernet/intel/ixgbe/
Dixgbe_x550.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
17 struct ixgbe_mac_info *mac = &hw->mac; in ixgbe_get_invariants_X550_x()
18 struct ixgbe_phy_info *phy = &hw->phy; in ixgbe_get_invariants_X550_x()
19 struct ixgbe_link_info *link = &hw->link; in ixgbe_get_invariants_X550_x()
24 if (mac->ops.get_media_type(hw) != ixgbe_media_type_copper) in ixgbe_get_invariants_X550_x()
25 phy->ops.set_phy_power = NULL; in ixgbe_get_invariants_X550_x()
27 link->addr = IXGBE_CS4227; in ixgbe_get_invariants_X550_x()
34 struct ixgbe_phy_info *phy = &hw->phy; in ixgbe_get_invariants_X550_x_fw()
39 phy->ops.set_phy_power = NULL; in ixgbe_get_invariants_X550_x_fw()
[all …]
/Linux-v5.10/net/qrtr/
Dqrtr.c1 // SPDX-License-Identifier: GPL-2.0-only
20 /* auto-bind range */
25 * struct qrtr_hdr_v1 - (I|R)PCrouter packet header version 1
30 * @confirm_rx: boolean; whether a resume-tx packet should be send in reply
47 * struct qrtr_hdr_v2 - (I|R)PCrouter packet header later versions
113 * struct qrtr_node - endpoint node
137 * struct qrtr_tx_flow - tx flow control
169 struct qrtr_tx_flow *flow; in __qrtr_node_release() local
174 if (node->nid != QRTR_EP_NID_AUTO) in __qrtr_node_release()
175 radix_tree_delete(&qrtr_nodes, node->nid); in __qrtr_node_release()
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