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/Linux-v6.1/Documentation/devicetree/bindings/phy/
Dti,phy-j721e-wiz.yaml55 assigned-clocks:
59 assigned-clock-parents:
63 assigned-clock-rates:
102 assigned-clocks:
105 assigned-clock-parents:
111 - assigned-clocks
112 - assigned-clock-parents
135 assigned-clocks:
138 assigned-clock-parents:
144 - assigned-clocks
[all …]
Dmixel,mipi-dsi-phy.yaml35 assigned-clocks:
38 assigned-clock-parents:
41 assigned-clock-rates:
74 - assigned-clocks
75 - assigned-clock-parents
76 - assigned-clock-rates
85 assigned-clocks: false
86 assigned-clock-parents: false
87 assigned-clock-rates: false
102 assigned-clocks = <&clk IMX8MQ_CLK_DSI_PHY_REF>;
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/sound/
Dnvidia,tegra-audio-graph-card.yaml35 assigned-clocks:
39 assigned-clock-parents:
43 assigned-clock-rates:
63 - assigned-clocks
64 - assigned-clock-parents
79 assigned-clocks = <&tegra_car TEGRA210_CLK_PLL_A>,
82 assigned-clock-parents = <0>, <0>, <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
83 assigned-clock-rates = <368640000>, <49152000>, <12288000>;
101 assigned-clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
102 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
[all …]
Dnvidia,tegra210-ahub.yaml43 assigned-clocks:
46 assigned-clock-parents:
49 assigned-clock-rates:
122 - assigned-clocks
123 - assigned-clock-parents
139 assigned-clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
140 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
176 assigned-clocks = <&tegra_car TEGRA210_CLK_I2S0>;
177 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
178 assigned-clock-rates = <1536000>;
[all …]
Dbrcm,cygnus-audio.txt13 - assigned-clocks: PLL and leaf clocks
14 - assigned-clock-parents: parent clocks of the assigned clocks
16 - assigned-clock-rates: List of clock frequencies of the
17 assigned clocks
36 assigned-clocks = <&audiopll BCM_CYGNUS_AUDIOPLL>,
40 assigned-clock-parents = <&audiopll BCM_CYGNUS_AUDIOPLL>;
41 assigned-clock-rates = <1769470191>,
Dnvidia,tegra210-dmic.yaml45 assigned-clocks:
48 assigned-clock-parents:
51 assigned-clock-rates:
79 - assigned-clocks
80 - assigned-clock-parents
93 assigned-clocks = <&tegra_car TEGRA210_CLK_DMIC1>;
94 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
95 assigned-clock-rates = <3072000>;
Dnvidia,tegra186-dspk.yaml45 assigned-clocks:
48 assigned-clock-parents:
51 assigned-clock-rates:
79 - assigned-clocks
80 - assigned-clock-parents
94 assigned-clocks = <&bpmp TEGRA186_CLK_DSPK1>;
95 assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
96 assigned-clock-rates = <12288000>;
Dnvidia,tegra210-i2s.yaml58 assigned-clocks:
62 assigned-clock-parents:
66 assigned-clock-rates:
95 - assigned-clocks
96 - assigned-clock-parents
109 assigned-clocks = <&tegra_car TEGRA210_CLK_I2S0>;
110 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
111 assigned-clock-rates = <1536000>;
Dmt2701-afe-pcm.txt47 - assigned-clocks: list of input clocks and dividers for the audio system.
49 - assigned-clocks-parents: parent of input clocks of assigned clocks.
50 - assigned-clock-rates: list of clock frequencies of assigned clocks.
138 assigned-clocks = <&topckgen CLK_TOP_AUD_MUX1_SEL>,
142 assigned-clock-parents = <&topckgen CLK_TOP_AUD1PLL_98M>,
144 assigned-clock-rates = <0>, <0>, <49152000>, <45158400>;
/Linux-v6.1/include/media/
Dv4l2-mem2mem.h147 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
157 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
181 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
200 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
230 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
243 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
260 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
272 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
288 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
301 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
[all …]
/Linux-v6.1/arch/arm/boot/dts/
Dimx7ulp.dtsi154 assigned-clocks = <&pcc2 IMX7ULP_CLK_LPUART4>;
155 assigned-clock-parents = <&scg1 IMX7ULP_CLK_SOSC_BUS_CLK>;
156 assigned-clock-rates = <24000000>;
166 assigned-clocks = <&pcc2 IMX7ULP_CLK_LPUART5>;
167 assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC>;
168 assigned-clock-rates = <48000000>;
175 assigned-clocks = <&pcc2 IMX7ULP_CLK_LPTPM4>;
176 assigned-clock-parents = <&scg1 IMX7ULP_CLK_SOSC_BUS_CLK>;
261 assigned-clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
262 assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC_BUS_CLK>;
[all …]
Dexynos4412-odroid-common.dtsi126 assigned-clocks = <&clock CLK_FOUT_EPLL>;
127 assigned-clock-rates = <45158401>;
131 assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
137 assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
140 assigned-clock-rates = <0>, <0>,
208 assigned-clocks = <&clock CLK_MOUT_FIMC0>,
210 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
211 assigned-clock-rates = <0>, <176000000>;
216 assigned-clocks = <&clock CLK_MOUT_FIMC1>,
218 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
[all …]
Dimx7d-sdb.dts217 assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
219 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
220 assigned-clock-rates = <0>, <100000000>;
244 assigned-clocks = <&clks IMX7D_ENET2_TIME_ROOT_SRC>,
246 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
247 assigned-clock-rates = <0>, <100000000>;
388 assigned-clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_SRC>,
391 assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
392 assigned-clock-rates = <0>, <884736000>, <12288000>;
424 assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>,
[all …]
Dimx7d-zii-rpu2.dts189 assigned-clocks = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
190 assigned-clock-rates = <884736000>;
211 assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
213 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
214 assigned-clock-rates = <0>, <100000000>;
294 assigned-clocks = <&clks IMX7D_ENET2_TIME_ROOT_SRC>,
296 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
297 assigned-clock-rates = <0>, <100000000>;
457 assigned-clocks = <&cs2000>;
458 assigned-clock-rates = <24000000>;
[all …]
Dimx7d-pico.dtsi105 assigned-clocks = <&clks IMX7D_CLKO2_ROOT_SRC>,
107 assigned-clock-parents = <&clks IMX7D_CKIL>;
108 assigned-clock-rates = <0>, <32768>;
121 assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
123 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
124 assigned-clock-rates = <0>, <100000000>;
278 assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>,
280 assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
281 assigned-clock-rates = <0>, <24576000>;
313 assigned-clocks = <&clks IMX7D_UART5_ROOT_SRC>;
[all …]
/Linux-v6.1/drivers/clk/
Dclk-conf.c20 num_parents = of_count_phandle_with_args(node, "assigned-clock-parents", in __set_clk_parents()
27 rc = of_parse_phandle_with_args(node, "assigned-clock-parents", in __set_clk_parents()
46 rc = of_parse_phandle_with_args(node, "assigned-clocks", in __set_clk_parents()
57 pr_warn("clk: couldn't get assigned clock %d for %pOF\n", in __set_clk_parents()
85 of_property_for_each_u32(node, "assigned-clock-rates", prop, cur, rate) { in __set_clk_rates()
87 rc = of_parse_phandle_with_args(node, "assigned-clocks", in __set_clk_rates()
120 * of_clk_set_defaults() - parse and set assigned clocks configuration
124 * This function parses 'assigned-{clocks/clock-parents/clock-rates}' properties
127 * listed in its 'assigned-clocks' or 'assigned-clock-parents' properties.
/Linux-v6.1/arch/arm64/boot/dts/freescale/
Dimx8ulp.dtsi191 assigned-clocks = <&pcc3 IMX8ULP_CLK_WDOG3>;
192 assigned-clock-parents = <&cgc1 IMX8ULP_CLK_SOSC_DIV2>;
226 assigned-clocks = <&pcc3 IMX8ULP_CLK_LPI2C4>;
227 assigned-clock-parents = <&cgc1 IMX8ULP_CLK_FROSC_DIV2>;
228 assigned-clock-rates = <48000000>;
239 assigned-clocks = <&pcc3 IMX8ULP_CLK_LPI2C5>;
240 assigned-clock-parents = <&cgc1 IMX8ULP_CLK_FROSC_DIV2>;
241 assigned-clock-rates = <48000000>;
272 assigned-clocks = <&pcc3 IMX8ULP_CLK_LPSPI4>;
273 assigned-clock-parents = <&cgc1 IMX8ULP_CLK_FROSC_DIV2>;
[all …]
Dimx8mn-evk.dtsi214 assigned-clocks = <&clk IMX8MN_CLK_SAI2>;
215 assigned-clock-parents = <&clk IMX8MN_AUDIO_PLL1_OUT>;
216 assigned-clock-rates = <24576000>;
223 assigned-clocks = <&clk IMX8MN_CLK_SAI3>;
224 assigned-clock-parents = <&clk IMX8MN_AUDIO_PLL1_OUT>;
225 assigned-clock-rates = <24576000>;
237 assigned-clocks = <&clk IMX8MN_CLK_SPDIF1>;
238 assigned-clock-parents = <&clk IMX8MN_AUDIO_PLL1_OUT>;
239 assigned-clock-rates = <24576000>;
252 assigned-clocks = <&clk IMX8MN_CLK_UART3>;
[all …]
Dimx8mq-mnt-reform2.dts105 assigned-clocks = <&clk IMX8MQ_CLK_DSI_PHY_REF>;
106 assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_800M>;
107 assigned-clock-rates = <25000000>;
175 assigned-clocks = <&clk IMX8MQ_CLK_LCDIF_PIXEL>;
176 assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_800M>;
177 /delete-property/assigned-clock-rates;
236 assigned-clocks = <&clk IMX8MQ_CLK_SAI2>;
237 assigned-clock-parents = <&clk IMX8MQ_CLK_25M>;
238 assigned-clock-rates = <25000000>;
275 assigned-clocks = <&clk IMX8MQ_CLK_USDHC2>;
[all …]
/Linux-v6.1/Documentation/s390/
Dvfio-ap.rst10 The AP devices provide cryptographic functions to all CPUs assigned to a
27 functions. There can be from 0 to 256 adapters assigned to an LPAR. Adapters
28 assigned to the LPAR in which a linux host is running will be available to
34 The AP adapter cards are assigned to a given LPAR via the system's Activation
36 in the LPAR, the AP bus detects the AP adapter cards assigned to the LPAR and
37 creates a sysfs device for each assigned adapter. For example, if AP adapters
38 4 and 10 (0x0a) are assigned to the LPAR, the AP bus will create the following
68 The AP usage and control domains are assigned to a given LPAR via the system's
71 domains assigned to the LPAR. The domain number of each usage domain and
91 domains 6 and 71 (0x47) are assigned to the LPAR, the AP bus will create the
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/iio/adc/
Dnxp,imx8qxp-adc.yaml33 assigned-clocks:
36 assigned-clock-rates:
51 - assigned-clocks
52 - assigned-clock-rates
72 assigned-clocks = <&clk IMX_SC_R_ADC_0>;
73 assigned-clock-rates = <24000000>;
/Linux-v6.1/arch/mips/boot/dts/img/
Dpistachio.dtsi51 assigned-clocks = <&clk_periph PERIPH_CLK_I2C0_PRE_DIV>,
53 assigned-clock-rates = <100000000>, <33333334>;
69 assigned-clocks = <&clk_periph PERIPH_CLK_I2C1_PRE_DIV>,
71 assigned-clock-rates = <100000000>, <33333334>;
87 assigned-clocks = <&clk_periph PERIPH_CLK_I2C2_PRE_DIV>,
89 assigned-clock-rates = <100000000>, <33333334>;
105 assigned-clocks = <&clk_periph PERIPH_CLK_I2C3_PRE_DIV>,
107 assigned-clock-rates = <100000000>, <33333334>;
141 assigned-clocks = <&clk_core CLK_I2S_DIV>;
142 assigned-clock-rates = <12288000>;
[all …]
/Linux-v6.1/tools/perf/pmu-events/arch/x86/amdzen1/
Dfloating-point.json5 "BriefDescription": "Total number multi-pipe uOps assigned to all pipes.",
6 …ions it is not suitable for measuring MFLOPS. Total number multi-pipe uOps assigned to all pipes.",
12 "BriefDescription": "Total number multi-pipe uOps assigned to pipe 3.",
13 …rations it is not suitable for measuring MFLOPS. Total number multi-pipe uOps assigned to pipe 3.",
19 "BriefDescription": "Total number multi-pipe uOps assigned to pipe 2.",
20 …rations it is not suitable for measuring MFLOPS. Total number multi-pipe uOps assigned to pipe 2.",
26 "BriefDescription": "Total number multi-pipe uOps assigned to pipe 1.",
27 …rations it is not suitable for measuring MFLOPS. Total number multi-pipe uOps assigned to pipe 1.",
33 "BriefDescription": "Total number multi-pipe uOps assigned to pipe 0.",
34 …rations it is not suitable for measuring MFLOPS. Total number multi-pipe uOps assigned to pipe 0.",
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/media/
Dmediatek,vcodec-encoder.yaml41 assigned-clocks: true
43 assigned-clock-parents: true
77 - assigned-clocks
78 - assigned-clock-parents
158 assigned-clocks = <&topckgen CLK_TOP_VENC_SEL>;
159 assigned-clock-parents = <&topckgen CLK_TOP_VCODECPLL>;
178 assigned-clocks = <&topckgen CLK_TOP_VENC_LT_SEL>;
179 assigned-clock-parents = <&topckgen CLK_TOP_VCODECPLL_370P5>;
Dmediatek,vcodec-decoder.yaml43 assigned-clocks: true
45 assigned-clock-parents: true
47 assigned-clock-rates: true
81 - assigned-clocks
82 - assigned-clock-parents
158 assigned-clocks = <&topckgen CLK_TOP_VENC_LT_SEL>,
163 assigned-clock-parents = <&topckgen CLK_TOP_VCODECPLL_370P5>,
166 assigned-clock-rates = <0>, <0>, <0>, <1482000000>, <800000000>;

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