| /Linux-v5.15/Documentation/admin-guide/hw-vuln/ |
| D | mds.rst | 8 Affected processors
23 Whether a processor is affected or not can be read out from the MDS
26 Not all processors are affected by all variants of MDS, but the mitigation
100 * - 'Not affected'
143 The kernel detects the affected CPUs and the presence of the microcode
146 If a CPU is affected and the microcode is available, then the kernel
156 The mitigation for MDS clears the affected CPU buffers on return to user
160 is only affected by MSBDS and not any other MDS variant, because the
163 For CPUs which are only affected by MSBDS the user space, guest and idle
164 transition mitigations are sufficient and SMT is not affected.
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| D | tsx_async_abort.rst | 10 Affected processors
19 Whether a processor is affected or not can be read out from the TAA
99 …- The CPU is affected by this vulnerability and the microcode and kernel mitigation are not applie…
106 * - 'Not affected'
107 - The CPU is not affected by this issue.
131 The kernel detects the affected CPUs and the presence of the microcode which is
132 required. If a CPU is affected and the microcode is available, then the kernel
142 Affected systems where the host has TAA microcode and TAA is mitigated by
159 off This option disables the TAA mitigation on affected platforms.
161 is affected, the system is vulnerable.
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| D | special-register-buffer-data-sampling.rst | 17 Affected processors
20 be affected.
22 A processor is affected by SRBDS if its Family_Model and stepping is
25 latter class of processors are only affected when Intel TSX is enabled
26 by software using TSX_CTRL_MSR otherwise they are not affected.
118 affected platforms.
130 Not affected Processor not vulnerable
141 affected but with no way to know if host
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| D | multihit.rst | 12 Affected processors
79 * - Not affected
141 auto Enable mitigation only if the platform is affected and the kernel
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| /Linux-v5.15/arch/x86/kernel/ |
| D | smp.c | 67 * 5AP. symmetric IO mode (normal Linux operation) not affected.
69 * 6AP. 'noapic' mode might be affected - fixed in later steppings
92 * 6AP. not affected - worked around in hardware
93 * 7AP. not affected - worked around in hardware
95 * 9AP. only 'noapic' mode affected. Might generate spurious
98 * 10AP. not affected - worked around in hardware
102 * 12AP. not affected - worked around in hardware
103 * 13AP. not affected - worked around in hardware
105 * 15AP. not affected - worked around in hardware
106 * 16AP. not affected - worked around in hardware
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| /Linux-v5.15/Documentation/x86/ |
| D | mds.rst | 74 thread case (SMT off): Force the CPU to clear the affected buffers.
78 the affected CPU buffers when the VERW instruction is executed.
83 VERW can be avoided. If the CPU is not affected by L1TF then VERW needs to
116 off Mitigation is disabled. Either the CPU is not affected or
119 full Mitigation is enabled. CPU is affected and MD_CLEAR is
122 vmwerv Mitigation is enabled. CPU is affected and MD_CLEAR is not
129 If the CPU is affected and mds=off is not supplied on the kernel command
140 on affected CPUs when the mitigation is not disabled on the kernel
158 cleared on affected CPUs when SMT is active. This addresses the
165 The idle clearing is enabled on CPUs which are only affected by MSBDS
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| D | tsx_async_abort.rst | 37 off Mitigation is disabled. Either the CPU is not affected or
43 verw Mitigation is enabled. CPU is affected and MD_CLEAR is
46 ucode needed Mitigation is enabled. CPU is affected and MD_CLEAR is not
53 If the CPU is affected and the "tsx_async_abort" kernel command line parameter is
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| /Linux-v5.15/arch/alpha/kernel/ |
| D | bugs.c | 25 return sprintf(buf, "Not affected\n"); in cpu_show_meltdown()
34 return sprintf(buf, "Not affected\n"); in cpu_show_spectre_v1()
43 return sprintf(buf, "Not affected\n"); in cpu_show_spectre_v2()
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| /Linux-v5.15/security/integrity/evm/ |
| D | evm_main.c | 429 * @dentry: pointer to the affected dentry
446 * @dentry: pointer to the affected dentry
495 * @dentry: pointer to the affected dentry
613 * @dentry: pointer to the affected dentry
614 * @xattr_name: pointer to the affected extended attribute name
650 * @dentry: pointer to the affected dentry
651 * @xattr_name: pointer to the affected extended attribute name
679 * @xattr_name: pointer to the affected extended attribute name
704 * @dentry: pointer to the affected dentry
705 * @xattr_name: pointer to the affected extended attribute name
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| /Linux-v5.15/drivers/base/ |
| D | cpu.c | 515 return sysfs_emit(buf, "Not affected\n"); in cpu_show_meltdown()
521 return sysfs_emit(buf, "Not affected\n"); in cpu_show_spectre_v1()
527 return sysfs_emit(buf, "Not affected\n"); in cpu_show_spectre_v2()
533 return sysfs_emit(buf, "Not affected\n"); in cpu_show_spec_store_bypass()
539 return sysfs_emit(buf, "Not affected\n"); in cpu_show_l1tf()
545 return sysfs_emit(buf, "Not affected\n"); in cpu_show_mds()
552 return sysfs_emit(buf, "Not affected\n"); in cpu_show_tsx_async_abort()
558 return sysfs_emit(buf, "Not affected\n"); in cpu_show_itlb_multihit()
564 return sysfs_emit(buf, "Not affected\n"); in cpu_show_srbds()
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| /Linux-v5.15/include/linux/ |
| D | cpu_pm.h | 28 * CPU notifications apply to a single CPU and must be called on the affected
29 * CPU. They are used to save per-cpu context for affected blocks.
32 * are used to save any global context for affected blocks, and must be called
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| /Linux-v5.15/arch/arm64/ |
| D | Kconfig | 380 the kernel if an affected CPU is detected.
402 the kernel if an affected CPU is detected.
425 only patch the kernel if an affected CPU is detected.
447 the kernel if an affected CPU is detected.
458 Affected Cortex-A57 parts might deadlock when exclusive load/store
465 the kernel if an affected CPU is detected.
477 Affected Cortex-A57 parts might report a Stage 2 translation
486 the kernel if an affected CPU is detected.
498 When running a compat (AArch32) userspace on an affected Cortex-A53
507 the kernel if an affected CPU is detected.
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| /Linux-v5.15/Documentation/PCI/ |
| D | pci-error-recovery.rst | 18 pSeries boxes. A typical action taken is to disconnect the affected device,
22 offered, so that the affected PCI device(s) are reset and put back
24 between the affected device drivers and the PCI controller chip.
31 is reported as soon as possible to all affected device drivers,
128 every driver affected by the error.
173 thus, if one device sleeps/schedules, all devices are affected.
190 DMA), and then calls the mmio_enabled() callback on all affected
337 The platform will call the resume() callback on all affected device
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| /Linux-v5.15/scripts/ |
| D | adjust_autoksyms.sh | 13 # file's timestamp is updated to force a rebuild of the affected source
69 # Then trigger a rebuild of affected source files
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| /Linux-v5.15/Documentation/devicetree/bindings/pinctrl/ |
| D | actions,s500-pinctrl.yaml | 73 List of gpio pin groups affected by the functions specified in
123 List of gpio pin groups affected by the drive-strength property
141 List of gpio pins affected by the bias-pull-* and
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| /Linux-v5.15/Documentation/filesystems/ |
| D | quota.rst | 83 - major number of a device with the affected filesystem
85 - minor number of a device with the affected filesystem
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| /Linux-v5.15/Documentation/devicetree/bindings/reset/ |
| D | reset.txt | 23 the DT node of each affected HW block, since if activated, an unrelated block
26 children of the bus are affected by the reset signal, or an individual HW
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| /Linux-v5.15/tools/arch/x86/include/asm/ |
| D | cpufeatures.h | 427 #define X86_BUG_AMD_E400 X86_BUG(13) /* CPU is among the affected by Erratum 400 */
428 #define X86_BUG_CPU_MELTDOWN X86_BUG(14) /* CPU is affected by meltdown attack and needs kernel pa…
429 #define X86_BUG_SPECTRE_V1 X86_BUG(15) /* CPU is affected by Spectre variant 1 attack with conditi…
430 #define X86_BUG_SPECTRE_V2 X86_BUG(16) /* CPU is affected by Spectre variant 2 attack with indirec…
431 #define X86_BUG_SPEC_STORE_BYPASS X86_BUG(17) /* CPU is affected by speculative store bypass attack…
432 #define X86_BUG_L1TF X86_BUG(18) /* CPU is affected by L1 Terminal Fault */
433 #define X86_BUG_MDS X86_BUG(19) /* CPU is affected by Microarchitectural data sampling */
434 #define X86_BUG_MSBDS_ONLY X86_BUG(20) /* CPU is only affected by the MSDBS variant of BUG_MDS */
435 #define X86_BUG_SWAPGS X86_BUG(21) /* CPU is affected by speculation through SWAPGS */
436 #define X86_BUG_TAA X86_BUG(22) /* CPU is affected by TSX Async Abort(TAA) */
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| /Linux-v5.15/arch/x86/include/asm/ |
| D | cpufeatures.h | 427 #define X86_BUG_AMD_E400 X86_BUG(13) /* CPU is among the affected by Erratum 400 */
428 #define X86_BUG_CPU_MELTDOWN X86_BUG(14) /* CPU is affected by meltdown attack and needs kernel pa…
429 #define X86_BUG_SPECTRE_V1 X86_BUG(15) /* CPU is affected by Spectre variant 1 attack with conditi…
430 #define X86_BUG_SPECTRE_V2 X86_BUG(16) /* CPU is affected by Spectre variant 2 attack with indirec…
431 #define X86_BUG_SPEC_STORE_BYPASS X86_BUG(17) /* CPU is affected by speculative store bypass attack…
432 #define X86_BUG_L1TF X86_BUG(18) /* CPU is affected by L1 Terminal Fault */
433 #define X86_BUG_MDS X86_BUG(19) /* CPU is affected by Microarchitectural data sampling */
434 #define X86_BUG_MSBDS_ONLY X86_BUG(20) /* CPU is only affected by the MSDBS variant of BUG_MDS */
435 #define X86_BUG_SWAPGS X86_BUG(21) /* CPU is affected by speculation through SWAPGS */
436 #define X86_BUG_TAA X86_BUG(22) /* CPU is affected by TSX Async Abort(TAA) */
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| /Linux-v5.15/arch/riscv/errata/sifive/ |
| D | errata.c | 22 * Affected cores: in errata_cip_453_check_func()
35 * Affected cores: in errata_cip_1200_check_func()
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| /Linux-v5.15/include/linux/pinctrl/ |
| D | pinmux.h | 37 * actual pins affected. The applicable groups will be returned in
47 * affected GPIO range is passed along with an offset(pin number) into that
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| /Linux-v5.15/arch/powerpc/platforms/cell/ |
| D | cpufreq_spudemand.c | 93 /* initialize spu_gov_info for all affected cpus */ in spu_gov_start()
116 /* clean spu_gov_info for all affected cpus */ in spu_gov_stop()
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| /Linux-v5.15/arch/mips/include/asm/ |
| D | sync.h | 16 * 2) Ordering barriers, which only ensure that affected memory operations
135 * at each affected branch target.
156 * optimized memory barrier primitives."). Here we specify that the affected
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| /Linux-v5.15/Documentation/process/ |
| D | embargoed-hardware-issues.rst | 46 While hardware security issues are often handled by the affected hardware
129 a list of any known affected hardware. If your organization builds or
130 distributes the affected hardware, we encourage you to also consider what
131 other hardware could be affected.
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| /Linux-v5.15/arch/arm64/kvm/hyp/nvhe/ |
| D | tlb.c | 24 * For CPUs that are affected by ARM 1319367, we need to in __tlb_switch_to_guest()
149 * VIPT and PIPT caches are not affected by VMID, so no maintenance in __kvm_flush_vm_context()
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