Lines Matching full:affected

74 thread case (SMT off): Force the CPU to clear the affected buffers.
78 the affected CPU buffers when the VERW instruction is executed.
83 VERW can be avoided. If the CPU is not affected by L1TF then VERW needs to
116  off      Mitigation is disabled. Either the CPU is not affected or
119  full     Mitigation is enabled. CPU is affected and MD_CLEAR is
122  vmwerv	  Mitigation is enabled. CPU is affected and MD_CLEAR is not
129 If the CPU is affected and mds=off is not supplied on the kernel command
140    on affected CPUs when the mitigation is not disabled on the kernel
158    cleared on affected CPUs when SMT is active. This addresses the
165    The idle clearing is enabled on CPUs which are only affected by MSBDS
168    the Load Ports are shared. So on CPUs affected by other variants, the
190    preferred on all affected CPUs which are expected to gain the MD_CLEAR
193    not affected or do not receive microcode updates anymore.