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/Linux-v6.1/drivers/iio/adc/
Dmax1241.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * MAX1241 low-power, 12-bit serial ADC
5 * Datasheet: https://datasheets.maximintegrated.com/en/ds/MAX1240-MAX1241.pdf
26 struct regulator *vref; member
42 static int max1241_read(struct max1241 *adc) in max1241_read() argument
58 .rx_buf = &adc->data, in max1241_read()
63 return spi_sync_transfer(adc->spi, xfers, ARRAY_SIZE(xfers)); in max1241_read()
71 struct max1241 *adc = iio_priv(indio_dev); in max1241_read_raw() local
75 mutex_lock(&adc->lock); in max1241_read_raw()
77 if (adc->shutdown) { in max1241_read_raw()
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Dlpc18xx_adc.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * IIO ADC driver for NXP LPC18xx ADC
8 * - Hardware triggers
9 * - Burst mode
10 * - Interrupts
11 * - DMA
26 /* LPC18XX ADC registers and bits */
42 struct regulator *vref; member
69 static int lpc18xx_adc_read_chan(struct lpc18xx_adc *adc, unsigned int ch) in lpc18xx_adc_read_chan() argument
74 reg = adc->cr_reg | BIT(ch) | LPC18XX_ADC_CR_START_NOW; in lpc18xx_adc_read_chan()
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Dmcp3911.c1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for Microchip MCP3911, Two-channel Analog Front End
69 struct regulator *vref; member
82 static int mcp3911_read(struct mcp3911 *adc, u8 reg, u32 *val, u8 len) in mcp3911_read() argument
86 reg = MCP3911_REG_READ(reg, adc->dev_addr); in mcp3911_read()
87 ret = spi_write_then_read(adc->spi, &reg, 1, val, len); in mcp3911_read()
92 *val >>= ((4 - len) * 8); in mcp3911_read()
93 dev_dbg(&adc->spi->dev, "reading 0x%x from register 0x%lx\n", *val, in mcp3911_read()
98 static int mcp3911_write(struct mcp3911 *adc, u8 reg, u32 val, u8 len) in mcp3911_write() argument
100 dev_dbg(&adc->spi->dev, "writing 0x%x to register 0x%x\n", val, reg); in mcp3911_write()
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Dimx8qxp-adc.c1 // SPDX-License-Identifier: GPL-2.0+
3 * NXP i.MX8QXP ADC driver
30 #define ADC_DRIVER_NAME "imx8qxp-adc"
46 /* ADC bit shift */
75 /* ADC PARAMETER*/
94 struct regulator *vref; member
95 /* Serialise ADC channel reads */
120 static void imx8qxp_adc_reset(struct imx8qxp_adc *adc) in imx8qxp_adc_reset() argument
125 ctrl = readl(adc->regs + IMX8QXP_ADR_ADC_CTRL); in imx8qxp_adc_reset()
127 writel(ctrl, adc->regs + IMX8QXP_ADR_ADC_CTRL); in imx8qxp_adc_reset()
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Dnpcm_adc.c1 // SPDX-License-Identifier: GPL-2.0
34 struct regulator *vref; member
48 /* ADC registers */
67 /* ADC General Definition */
106 regtemp = ioread32(info->regs + NPCM_ADCCON); in npcm_adc_isr()
108 iowrite32(regtemp, info->regs + NPCM_ADCCON); in npcm_adc_isr()
109 wake_up_interruptible(&info->wq); in npcm_adc_isr()
110 info->int_status = true; in npcm_adc_isr()
121 /* Select ADC channel */ in npcm_adc_read()
122 regtemp = ioread32(info->regs + NPCM_ADCCON); in npcm_adc_read()
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Dfsl-imx25-gcq.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014-2015 Pengutronix, Markus Pargmann <mpa@pengutronix.de>
6 * connected to the imx25 ADC.
9 #include <dt-bindings/iio/adc/fsl-imx25-gcq.h>
13 #include <linux/mfd/imx25-tsadc.h>
22 static const char * const driver_name = "mx25-gcq";
41 struct regulator *vref[4]; member
86 regmap_read(priv->regs, MX25_ADCQ_SR, &stats); in mx25_gcq_irq()
89 regmap_update_bits(priv->regs, MX25_ADCQ_MR, in mx25_gcq_irq()
91 complete(&priv->completed); in mx25_gcq_irq()
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Dstm32-adc-core.c1 // SPDX-License-Identifier: GPL-2.0
3 * This file is part of STM32 ADC driver
5 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
8 * Inspired from: fsl-imx25-tsadc
26 #include "stm32-adc-core.h"
42 * struct stm32_adc_common_regs - stm32 common registers
47 * @ier: interrupt enable register offset for each adc
62 * struct stm32_adc_priv_cfg - stm32 core compatible configuration data
66 * @ipid: adc identification number
69 * @num_adcs: maximum number of ADC instances in the common registers
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Dlpc32xx_adc.c1 // SPDX-License-Identifier: GPL-2.0+
3 * lpc32xx_adc.c - Support for ADC in LPC32XX
5 * 3-channel, 10-bit ADC
45 #define LPC32XXAD_NAME "lpc32xx-adc"
51 struct regulator *vref; member
67 mutex_lock(&indio_dev->mlock); in lpc32xx_read_raw()
68 ret = clk_prepare_enable(st->clk); in lpc32xx_read_raw()
70 mutex_unlock(&indio_dev->mlock); in lpc32xx_read_raw()
74 __raw_writel(LPC32XXAD_INTERNAL | (chan->address) | in lpc32xx_read_raw()
76 LPC32XXAD_SELECT(st->adc_base)); in lpc32xx_read_raw()
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/Linux-v6.1/Documentation/devicetree/bindings/iio/adc/
Dst,stm32-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/iio/adc/st,stm32-adc.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
7 title: STMicroelectronics STM32 ADC bindings
10 STM32 ADC is a successive approximation analog-to-digital converter.
12 in single, continuous, scan or discontinuous mode. Result of the ADC is
13 stored in a left-aligned or right-aligned 32-bit data register.
17 voltage goes beyond the user-defined, higher or lower thresholds.
19 Each STM32 ADC block can have up to 3 ADC instances.
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Dcosmic,10001-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/cosmic,10001-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cosmic Circuits CC-10001 ADC
10 - Jonathan Cameron <jic23@kernel.org>
13 Cosmic Circuits 10001 10-bit ADC device.
17 const: cosmic,10001-adc
22 adc-reserved-channels:
31 clock-names:
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Daspeed,ast2600-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/aspeed,ast2600-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ADC that forms part of an ASPEED server management processor.
10 - Billy Tsai <billy_tsai@aspeedtech.com>
13 • 10-bits resolution for 16 voltage channels.
16 • Channel scanning can be non-continuous.
17 • Programmable ADC clock frequency.
21 • Built-in a compensating method.
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Dfsl,imx7d-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/fsl,imx7d-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale ADC found on the imx7d SoC
10 - Haibo Chen <haibo.chen@nxp.com>
14 const: fsl,imx7d-adc
25 clock-names:
26 const: adc
28 vref-supply: true
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Dnxp,lpc1850-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/nxp,lpc1850-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP LPC1850 ADC bindings
10 - Jonathan Cameron <jic23@kernel.org>
13 Supports the ADC found on the LPC1850 SoC.
17 const: nxp,lpc1850-adc
28 vref-supply: true
33 "#io-channel-cells":
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Dadi,ad7949.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/adi,ad7949.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Charles-Antoine Couret <charles-antoine.couret@essensium.com>
15 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7949.pdf
17 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7682_7689.pdf
22 - adi,ad7682
23 - adi,ad7689
24 - adi,ad7949
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Datmel,sama9260-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/atmel,sama9260-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: AT91 sama9260 and similar Analog to Digital Converter (ADC)
10 - Alexandre Belloni <alexandre.belloni@bootlin.com>
15 - atmel,at91sam9260-adc
16 - atmel,at91sam9rl-adc
17 - atmel,at91sam9g45-adc
18 - atmel,at91sam9x5-adc
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Dfsl,vf610-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/fsl,vf610-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ADC found on Freescale vf610 and similar SoCs
10 - Haibo Chen <haibo.chen@nxp.com>
18 - items:
19 - enum:
20 - fsl,imx6sx-adc
21 - fsl,imx6ul-adc
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Drenesas,rcar-gyroadc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/renesas,rcar-gyroadc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car GyroADC
10 - Marek Vasut <marek.vasut+renesas@gmail.com>
15 are sampled by the GyroADC block in a round-robin fashion and the result
17 The ADC bindings should match with that of the devices connected to a
23 - enum:
24 - renesas,r8a7791-gyroadc
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Dfsl,imx25-gcq.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/fsl,imx25-gcq.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale ADC GCQ device
11 analog inputs using the ADC unit of the i.MX25.
14 - Jonathan Cameron <jic23@kernel.org>
18 const: fsl,imx25-gcq
26 vref-ext-supply:
28 The regulator supplying the ADC reference voltage.
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Dmaxim,max11100.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/maxim,max11100.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Maxim MAX11100 ADC
10 - Jacopo Mondi <jacopo@jmondi.org>
13 Single channel 16 bit ADC with SPI interface.
22 vref-supply:
25 spi-max-frequency:
30 - compatible
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Dti,ads131e08.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/ti,ads131e08.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Texas Instruments ADS131E0x 4-, 6- and 8-Channel ADCs
10 - Jonathan Cameron <jic23@kernel.org>
14 24-bit, delta-sigma, analog-to-digital converters (ADCs) with a
15 built-in programmable gain amplifier (PGA), internal reference
17 The communication with ADC chip is via the SPI bus (mode 1).
24 - ti,ads131e04
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Dmaxim,max11205.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/maxim,max11205.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Maxim MAX11205 ADC
10 - Ramona Bolboaca <ramona.bolboaca@analog.com>
13 The MAX11205 is an ultra-low-power (< 300FA max active current),
14 high-resolution, serial-output ADC.
19 - $ref: /schemas/spi/spi-peripheral-props.yaml#
24 - maxim,max11205a
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Dmaxim,max1241.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/iio/adc/maxim,max1241.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Maxim MAX1241 12-bit, single-channel analog to digital converter
11 - Alexandru Lazar <alazar@startmail.com>
14 Bindings for the max1241 12-bit, single-channel ADC device. Datasheet
16 https://datasheets.maximintegrated.com/en/ds/MAX1240-MAX1241.pdf
21 - maxim,max1241
26 vdd-supply:
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Dti,ads8344.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/ti,ads8344.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Texas Instruments ADS8344 ADC
10 - Gregory Clement <gregory.clement@bootlin.com>
13 16bit 8-channel ADC with single ended inputs.
22 vref-supply:
25 "#io-channel-cells":
29 - compatible
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Datmel,sama5d2-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/atmel,sama5d2-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: AT91 SAMA5D2 Analog to Digital Converter (ADC)
10 - Eugen Hristev <eugen.hristev@microchip.com>
15 - atmel,sama5d2-adc
16 - microchip,sam9x60-adc
17 - microchip,sama7g5-adc
28 clock-names:
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/Linux-v6.1/Documentation/devicetree/bindings/staging/iio/adc/
Dspear-adc.txt1 * ST SPEAr ADC device driver
4 - compatible: Should be "st,spear600-adc"
5 - reg: Address and length of the register set for the device
6 - interrupts: Should contain the ADC interrupt
7 - sampling-frequency: Default sampling frequency
10 - vref-external: External voltage reference in milli-volts. If omitted
12 - average-samples: Number of samples to generate an average value. If
17 adc: adc@d8200000 {
18 compatible = "st,spear600-adc";
20 interrupt-parent = <&vic1>;
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