Searched +full:xs +full:- +full:phy (Results 1 – 10 of 10) sorted by relevance
/Linux-v6.1/Documentation/devicetree/bindings/phy/ |
D | mediatek,xsphy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/phy/mediatek,xsphy.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: MediaTek XS-PHY Controller 11 - Chunfeng Yun <chunfeng.yun@mediatek.com> 14 The XS-PHY controller supports physical layer functionality for USB3.1 18 ---------------------------------- 45 pattern: "^xs-phy@[0-9a-f]+$" 49 - enum: [all …]
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/Linux-v6.1/drivers/phy/mediatek/ |
D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 3 # Phy drivers for Mediatek devices 6 tristate "MediaTek PCIe-PHY Driver" 11 Say 'Y' here to add support for MediaTek PCIe PHY driver. 12 This driver create the basic PHY instance and provides initialize 17 tristate "MediaTek T-PHY Driver" 23 Say 'Y' here to add support for MediaTek T-PHY driver, 25 SATA, and meanwhile supports two version T-PHY which have 26 different banks layout, the T-PHY with shared banks between 27 multi-ports is first version, otherwise is second version, [all …]
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D | phy-mtk-xsphy.c | 1 // SPDX-License-Identifier: GPL-2.0 10 #include <dt-bindings/phy/phy.h> 16 #include <linux/phy/phy.h> 19 #include "phy-mtk-io.h" 21 /* u2 phy banks */ 26 /* u3 phy shared banks */ 30 /* u3 phy banks */ 85 struct phy *phy; member 87 struct clk *ref_clk; /* reference clock of anolog phy */ 112 void __iomem *pbase = inst->port_base; in u2_phy_slew_rate_calibrate() [all …]
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/Linux-v6.1/drivers/net/fddi/skfp/h/ |
D | skfbi.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 15 * FDDI-Fx (x := {I(SA), P(CI)}) 19 /*--------------------------------------------------------------------------*/ 41 /* 0x0001 - 0x0003: reserved */ 49 /* 0x0010 - 0x006b: formac+ (supernet_3) fequently used registers */ 52 #define B0_ST1U 0x0010 /* read upper 16-bit of status reg 1 */ 53 #define B0_ST1L 0x0014 /* read lower 16-bit of status reg 1 */ 54 #define B0_ST2U 0x0018 /* read upper 16-bit of status reg 2 */ 55 #define B0_ST2L 0x001c /* read lower 16-bit of status reg 2 */ 59 #define B0_MDRU 0x0028 /* r/w upper 16-bit of mem. data reg */ [all …]
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/Linux-v6.1/drivers/net/ethernet/sfc/falcon/ |
D | txc43128_phy.c | 1 // SPDX-License-Identifier: GPL-2.0-only 4 * Copyright 2006-2011 Solarflare Communications Inc. 9 * see www.transwitch.com, part is TXC-43128 16 #include "phy.h" 30 * Compile-time config 35 /* Total length of time we'll wait for the PHY to come out of reset (ms) */ 52 /* Lane power-down */ 56 * initiates a logic reset. Self-clearing */ 69 /* Lane power-down */ 108 /* Lane power-down */ [all …]
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/Linux-v6.1/include/uapi/linux/ |
D | mdio.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 4 * Copyright 2006-2009 Solarflare Communications Inc. 22 #define MDIO_MMD_PHYXS 4 /* PHY Extender Sublayer */ 25 #define MDIO_MMD_AN 7 /* Auto-Negotiation */ 51 #define MDIO_PHYXS_LNSTAT 24 /* PHY XGXS lane state */ 58 /* Media-dependent registers. */ 59 #define MDIO_PMA_10GBT_SWAPPOL 130 /* 10GBASE-T pair swap & polarity */ 60 #define MDIO_PMA_10GBT_TXPWR 131 /* 10GBASE-T TX power control */ 61 #define MDIO_PMA_10GBT_SNR 133 /* 10GBASE-T SNR margin, lane A. 62 * Lanes B-D are numbered 134-136. */ [all …]
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/Linux-v6.1/drivers/net/ |
D | mdio.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * mdio.c: Generic support for MDIO-compatible transceivers 4 * Copyright 2006-2009 Solarflare Communications Inc. 14 MODULE_DESCRIPTION("Generic support for MDIO-compatible transceivers"); 15 MODULE_AUTHOR("Copyright 2006-2009 Solarflare Communications Inc."); 19 * mdio45_probe - probe for an MDIO (clause 45) device 21 * @prtad: Expected PHY address 30 /* Assume PHY must have at least one of PMA/PMD, WIS, PCS, PHY in mdio45_probe() 31 * XS or DTE XS; give up if none is present. */ in mdio45_probe() 34 stat2 = mdio->mdio_read(mdio->dev, prtad, mmd, MDIO_STAT2); in mdio45_probe() [all …]
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/Linux-v6.1/drivers/net/bonding/ |
D | bond_main.c | 75 #include <linux/phy.h> 95 /*---------------------------- Module parameters ----------------------------*/ 145 MODULE_PARM_DESC(mode, "Mode of operation; 0 for balance-rr, " 146 "1 for active-backup, 2 for balance-xor, " 147 "3 for broadcast, 4 for 802.3ad, 5 for balance-tlb, " 148 "6 for balance-alb"); 170 MODULE_PARM_DESC(xmit_hash_policy, "balance-alb, balance-tlb, balance-xor, 802.3ad hashing method; " 185 MODULE_PARM_DESC(fail_over_mac, "For active-backup, do not set all slaves to " 196 MODULE_PARM_DESC(packets_per_slave, "Packets to send per slave in balance-rr " 204 /*----------------------------- Global variables ----------------------------*/ [all …]
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/Linux-v6.1/drivers/net/ethernet/intel/e1000e/ |
D | netdev.c | 1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright(c) 1999 - 2018 Intel Corporation. */ 35 static int debug = -1; 110 * __ew32_prepare - prepare to write to MAC CSR register on certain parts 125 while ((er32(FWSM) & E1000_ICH_FWSM_PCIM2PCI) && --i) in __ew32_prepare() 131 if (hw->adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) in __ew32() 134 writel(val, hw->hw_addr + reg); in __ew32() 138 * e1000_regdump - register printout routine 148 switch (reginfo->ofs) { in e1000_regdump() 162 pr_info("%-15s %08x\n", in e1000_regdump() [all …]
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/Linux-v6.1/drivers/scsi/mpt3sas/ |
D | mpt3sas_base.c | 6 * Copyright (C) 2012-2014 LSI Corporation 7 * Copyright (C) 2013-2014 Avago Technologies 8 * (mailto: MPT-FusionLinux.pdl@avagotech.com) 23 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT, 42 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, 57 #include <linux/dma-mapping.h> 76 static int max_queue_depth = -1; 80 static int max_sgl_entries = -1; 84 static int msix_disable = -1; 92 static int max_msix_vectors = -1; [all …]
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