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/Linux-v6.1/sound/soc/codecs/
Dmt6351.h12 #define MT6351_AFE_UL_DL_CON0 (0x2000 + 0x0000)
13 #define MT6351_AFE_DL_SRC2_CON0_H (0x2000 + 0x0002)
14 #define MT6351_AFE_DL_SRC2_CON0_L (0x2000 + 0x0004)
15 #define MT6351_AFE_DL_SDM_CON0 (0x2000 + 0x0006)
16 #define MT6351_AFE_DL_SDM_CON1 (0x2000 + 0x0008)
17 #define MT6351_AFE_UL_SRC_CON0_H (0x2000 + 0x000a)
18 #define MT6351_AFE_UL_SRC_CON0_L (0x2000 + 0x000c)
19 #define MT6351_AFE_UL_SRC_CON1_H (0x2000 + 0x000e)
20 #define MT6351_AFE_UL_SRC_CON1_L (0x2000 + 0x0010)
21 #define MT6351_AFE_TOP_CON0 (0x2000 + 0x0012)
[all …]
/Linux-v6.1/arch/arm/boot/dts/
Dimx23.dtsi59 reg = <0x80000000 0x2000>;
64 reg = <0x80004000 0x2000>;
75 reg = <0x80008000 0x2000>;
83 reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
95 reg = <0x80010000 0x2000>;
104 reg = <0x80014000 0x2000>;
112 reg = <0x80018000 0x2000>;
413 reg = <0x80020000 0x2000>;
419 reg = <0x80024000 0x2000>;
435 reg = <0x80028000 0x2000>;
[all …]
Dam57-pruss.dtsi37 reg = <0x0 0x2000>,
38 <0x2000 0x2000>,
46 reg = <0x26000 0x2000>;
49 ranges = <0x0 0x26000 0x2000>;
71 reg = <0x20000 0x2000>;
146 reg = <0x0 0x2000>,
147 <0x2000 0x2000>,
155 reg = <0x26000 0x2000>;
158 ranges = <0x0 0x26000 0x2000>;
180 reg = <0x20000 0x2000>;
Dimx28.dtsi70 reg = <0x80000000 0x2000>;
74 reg = <0x80002000 0x2000>;
83 reg = <0x80004000 0x2000>;
107 reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
123 reg = <0x80010000 0x2000>;
134 reg = <0x80012000 0x2000>;
145 reg = <0x80014000 0x2000>;
156 reg = <0x80016000 0x2000>;
168 reg = <0x80018000 0x2000>;
987 reg = <0x8001c000 0x2000>;
[all …]
Ddm816x.dtsi261 reg = <0x48080000 0x2000>;
292 reg = <0x50000000 0x2000>;
340 reg = <0x480c8000 0x2000>;
354 reg = <0x480ca000 0x2000>;
383 ti,davinci-ctrl-ram-offset = <0x2000>;
384 ti,davinci-ctrl-ram-size = <0x2000>;
397 ti,davinci-ctrl-ram-offset = <0x2000>;
398 ti,davinci-ctrl-ram-size = <0x2000>;
488 reg = <0x48042000 0x2000>;
495 reg = <0x48044000 0x2000>;
[all …]
/Linux-v6.1/drivers/clk/axs10x/
Di2s_pll_clock.c34 { 1024000, 0x104, 0x451, 0x10E38, 0x2000 },
35 { 1411200, 0x104, 0x596, 0x10D35, 0x2000 },
36 { 1536000, 0x208, 0xA28, 0x10B2C, 0x2000 },
37 { 2048000, 0x82, 0x451, 0x10E38, 0x2000 },
38 { 2822400, 0x82, 0x596, 0x10D35, 0x2000 },
39 { 3072000, 0x104, 0xA28, 0x10B2C, 0x2000 },
40 { 2116800, 0x82, 0x3CF, 0x10C30, 0x2000 },
41 { 2304000, 0x104, 0x79E, 0x10B2C, 0x2000 },
47 { 1024000, 0x82, 0x105, 0x107DF, 0x2000 },
48 { 1411200, 0x28A, 0x1, 0x10001, 0x2000 },
[all …]
/Linux-v6.1/drivers/gpu/drm/amd/display/dc/inc/hw/
Ddpp.h74 {0x2000, 0, 0, 0, 0, 0x2000, 0, 0, 0, 0, 0x2000, 0} },
76 {0x2000, 0, 0, 0, 0, 0x2000, 0, 0, 0, 0, 0x2000, 0} },
78 {0x2cdd, 0x2000, 0, 0xe991, 0xe926, 0x2000, 0xf4fd, 0x10ef,
79 0, 0x2000, 0x38b4, 0xe3a6} },
84 {0x3265, 0x2000, 0, 0xe6ce, 0xf105, 0x2000, 0xfa01, 0xa7d, 0,
85 0x2000, 0x3b61, 0xe24f} },
/Linux-v6.1/Documentation/devicetree/bindings/devfreq/event/
Dsamsung,exynos-ppmu.yaml80 reg = <0x106a0000 0x2000>;
103 reg = <0x112a0000 0x2000>;
118 reg = <0x10480000 0x2000>;
123 reg = <0x10490000 0x2000>;
134 reg = <0x104a0000 0x2000>;
139 reg = <0x104b0000 0x2000>;
144 reg = <0x104c0000 0x2000>;
149 reg = <0x104d0000 0x2000>;
158 reg = <0x106a0000 0x2000>;
/Linux-v6.1/drivers/reset/
Dreset-uniphier.c45 UNIPHIER_RESETX(2, 0x2000, 2), /* NAND */
46 UNIPHIER_RESETX(8, 0x2000, 10), /* STDMAC (Ether, HSC, MIO) */
51 UNIPHIER_RESETX(2, 0x2000, 2), /* NAND */
52 UNIPHIER_RESETX(6, 0x2000, 12), /* Ether */
53 UNIPHIER_RESETX(8, 0x2000, 10), /* STDMAC (HSC, MIO, RLE) */
54 UNIPHIER_RESETX(12, 0x2000, 6), /* GIO (Ether, SATA, USB3) */
55 UNIPHIER_RESETX(14, 0x2000, 17), /* USB30 */
57 UNIPHIER_RESETX(28, 0x2000, 18), /* SATA0 */
59 UNIPHIER_RESETX(30, 0x2000, 19), /* SATA-PHY */
60 UNIPHIER_RESETX(40, 0x2000, 13), /* AIO */
[all …]
/Linux-v6.1/arch/mips/include/asm/mach-db1x00/
Dbcsr.h128 #define BCSR_STATUS_DB1000_SWAPBOOT 0x2000
132 #define BCSR_STATUS_DB1200_U1RXD 0x2000 /* DB1200 */
135 #define BCSR_STATUS_DB1550_U3RXD 0x2000 /* DB1550 */
137 #define BCSR_STATUS_PB1550_U1RXD 0x2000 /* PB1550 */
141 #define BCSR_STATUS_USBOCn 0x2000 /* DB1300 */
150 #define BCSR_RESETS_FIR_SEL 0x2000
153 #define BCSR_RESETS_PB1550_WSCFSM 0x2000
169 #define BCSR_BOARD_SPISEL 0x2000 /* PB/DB1550 */
184 #define BCSR_RESETS_PSC1MUX 0x2000
192 #define BCSR_RESETS_OTPCSB 0x2000 /* DB1300 */
/Linux-v6.1/Documentation/devicetree/bindings/remoteproc/
Dti,pru-rproc.yaml122 reg = <0x0 0x2000>,
123 <0x2000 0x2000>,
130 reg = <0x34000 0x2000>,
139 reg = <0x38000 0x2000>,
161 reg = <0x0 0x2000>,
162 <0x2000 0x2000>,
178 reg = <0x4000 0x2000>,
205 reg = <0x6000 0x2000>,
/Linux-v6.1/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
Dramnv40.c80 u32 vbl = nvkm_rd32(device, 0x600808 + (i * 0x2000)); in nv40_ram_prog()
83 if (vbl != nvkm_rd32(device, 0x600808 + (i * 0x2000))) { in nv40_ram_prog()
84 nvkm_wr08(device, 0x0c03c4 + (i * 0x2000), 0x01); in nv40_ram_prog()
85 sr1[i] = nvkm_rd08(device, 0x0c03c5 + (i * 0x2000)); in nv40_ram_prog()
100 u32 tmp = nvkm_rd32(device, 0x600808 + (i * 0x2000)); in nv40_ram_prog()
106 u32 tmp = nvkm_rd32(device, 0x600808 + (i * 0x2000)); in nv40_ram_prog()
111 nvkm_wr08(device, 0x0c03c4 + (i * 0x2000), 0x01); in nv40_ram_prog()
112 nvkm_wr08(device, 0x0c03c5 + (i * 0x2000), sr1[i] | 0x20); in nv40_ram_prog()
166 u32 tmp = nvkm_rd32(device, 0x600808 + (i * 0x2000)); in nv40_ram_prog()
171 nvkm_wr08(device, 0x0c03c4 + (i * 0x2000), 0x01); in nv40_ram_prog()
[all …]
/Linux-v6.1/arch/arc/boot/dts/
Dhaps_hs.dts54 reg = <0xf0000000 0x2000>;
71 reg = <0xf0100000 0x2000>;
77 reg = <0xf0102000 0x2000>;
83 reg = <0xf0104000 0x2000>;
89 reg = <0xf0106000 0x2000>;
95 reg = <0xf0108000 0x2000>;
/Linux-v6.1/arch/arm64/boot/dts/actions/
Ds700.dtsi108 <0x0 0xe00f2000 0x0 0x2000>,
109 <0x0 0xe00f4000 0x0 0x2000>,
110 <0x0 0xe00f6000 0x0 0x2000>;
118 reg = <0x0 0xe0120000 0x0 0x2000>;
126 reg = <0x0 0xe0122000 0x0 0x2000>;
134 reg = <0x0 0xe0124000 0x0 0x2000>;
142 reg = <0x0 0xe0126000 0x0 0x2000>;
150 reg = <0x0 0xe0128000 0x0 0x2000>;
158 reg = <0x0 0xe012a000 0x0 0x2000>;
166 reg = <0x0 0xe012c000 0x0 0x2000>;
Ds900.dtsi114 <0x0 0xe00f2000 0x0 0x2000>,
115 <0x0 0xe00f4000 0x0 0x2000>,
116 <0x0 0xe00f6000 0x0 0x2000>;
124 reg = <0x0 0xe0120000 0x0 0x2000>;
132 reg = <0x0 0xe0122000 0x0 0x2000>;
140 reg = <0x0 0xe0124000 0x0 0x2000>;
148 reg = <0x0 0xe0126000 0x0 0x2000>;
156 reg = <0x0 0xe0128000 0x0 0x2000>;
164 reg = <0x0 0xe012a000 0x0 0x2000>;
172 reg = <0x0 0xe012c000 0x0 0x2000>;
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/soc/ti/
Dti,pruss.yaml37 core) at its address 0x2000. A shared Data RAM, if present, can be accessed
357 reg = <0x0 0x2000>,
358 <0x2000 0x2000>,
367 reg = <0x26000 0x2000>;
368 ranges = <0x00 0x26000 0x2000>;
390 reg = <0x20000 0x2000>;
402 reg = <0x34000 0x2000>,
411 reg = <0x38000 0x2000>,
441 reg = <0x0 0x2000>,
442 <0x2000 0x2000>,
[all …]
/Linux-v6.1/drivers/misc/habanalabs/include/gaudi2/asic_reg/
Dgaudi2_blocks_linux_driver.h27 #define DCORE0_TPC0_EML_STM_SECTION 0x2000
264 #define DCORE0_TPC1_EML_STM_SECTION 0x2000
501 #define DCORE0_TPC2_EML_STM_SECTION 0x2000
738 #define DCORE0_TPC3_EML_STM_SECTION 0x2000
975 #define DCORE0_TPC4_EML_STM_SECTION 0x2000
1212 #define DCORE0_TPC5_EML_STM_SECTION 0x2000
1449 #define DCORE0_TPC6_EML_STM_SECTION 0x2000
1686 #define DCORE1_TPC0_EML_STM_SECTION 0x2000
1923 #define DCORE1_TPC1_EML_STM_SECTION 0x2000
2160 #define DCORE1_TPC2_EML_STM_SECTION 0x2000
[all …]
/Linux-v6.1/drivers/crypto/inside-secure/
Dsafexcel.h71 #define EIP197_XLX_IRQ_BLOCK_ID_ADDR 0x2000
167 #define EIP197_PE_IN_DBUF_THRES(n) (0x0000 + (0x2000 * (n)))
168 #define EIP197_PE_IN_TBUF_THRES(n) (0x0100 + (0x2000 * (n)))
169 #define EIP197_PE_ICE_SCRATCH_RAM(n) (0x0800 + (0x2000 * (n)))
170 #define EIP197_PE_ICE_PUE_CTRL(n) (0x0c80 + (0x2000 * (n)))
171 #define EIP197_PE_ICE_PUTF_CTRL(n) (0x0d00 + (0x2000 * (n)))
172 #define EIP197_PE_ICE_SCRATCH_CTRL(n) (0x0d04 + (0x2000 * (n)))
173 #define EIP197_PE_ICE_FPP_CTRL(n) (0x0d80 + (0x2000 * (n)))
174 #define EIP197_PE_ICE_PPTF_CTRL(n) (0x0e00 + (0x2000 * (n)))
175 #define EIP197_PE_ICE_RAM_CTRL(n) (0x0ff0 + (0x2000 * (n)))
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/net/
Dcortina,gemini-ethernet.yaml107 <0x60004000 0x2000>, /* V-bit */
108 <0x60006000 0x2000>; /* A-bit */
115 reg = <0x60008000 0x2000>, /* Port 0 DMA/TOE */
116 <0x6000a000 0x2000>; /* Port 0 GMAC */
128 reg = <0x6000c000 0x2000>, /* Port 1 DMA/TOE */
129 <0x6000e000 0x2000>; /* Port 1 GMAC */
/Linux-v6.1/drivers/gpu/drm/amd/display/dc/dce110/
Ddce110_opp_csc_v.c79 { 0x2000, 0, 0, 0, 0, 0x2000, 0, 0, 0, 0, 0x2000, 0} },
514 {0x2000, 0, 0, 0, 0, 0x2000, 0, 0, 0, 0, 0x2000, 0} },
516 {0x2000, 0, 0, 0, 0, 0x2000, 0, 0, 0, 0, 0x2000, 0} },
518 {0x2cdd, 0x2000, 0x0, 0xe991, 0xe926, 0x2000, 0xf4fd, 0x10ef,
519 0x0, 0x2000, 0x38b4, 0xe3a6} },
524 {0x3265, 0x2000, 0, 0xe6ce, 0xf105, 0x2000, 0xfa01, 0xa7d, 0,
525 0x2000, 0x3b61, 0xe24f} },
/Linux-v6.1/include/linux/mfd/wm8350/
Dcore.h93 #define WM8350_POWERCYCLE 0x2000
108 #define WM8350_USB_MSTR 0x2000
190 #define WM8350_VBUFEN 0x2000
226 #define WM8350_ADC_HPF_ENA 0x2000
273 #define WM8350_OC_INT 0x2000
292 #define WM8350_CHG_BAT_FAIL_EINT 0x2000
307 #define WM8350_CS1_EINT 0x2000
375 #define WM8350_EXT_BAT_FB_EINT 0x2000
391 #define WM8350_IM_OC_INT 0x2000
411 #define WM8350_IM_CHG_BAT_FAIL_EINT 0x2000
[all …]
/Linux-v6.1/drivers/net/ethernet/cirrus/
Dcs89x0.h97 #define MONGOOSE_BIT 0x2000 /* PART_NO_SIG + MONGOOSE_BUT => ID of mongoose */
139 #define RX_RUNT_ENBL 0x2000
150 #define RX_RUNT_ACCEPT 0x2000
174 #define TX_RUNT 0x2000
184 #define RX_MISS_COUNT_OVRFLOW_ENBL 0x2000
194 #define TWO_PART_DEFDIS 0x2000
203 #define HCB1_ENBL 0x2000
212 #define RX_DMA_SIZE_64K 0x2000
231 #define RX_RUNT 0x2000
254 #define RX_MISS_OVRFLW 0x2000
[all …]
/Linux-v6.1/arch/arm64/boot/dts/arm/
Dfoundation-v8-gicv2.dtsi14 <0x0 0x2c002000 0 0x2000>,
15 <0x0 0x2c004000 0 0x2000>,
16 <0x0 0x2c006000 0 0x2000>;
/Linux-v6.1/Documentation/devicetree/bindings/arm/omap/
Dctrl.txt41 reg = <0x2000 0x2000>;
44 ranges = <0 0x2000 0x2000>;
/Linux-v6.1/include/linux/mfd/
Dwm8400-private.h162 #define WM8400_GPIO2_PU 0x2000 /* GPIO2_PU */
163 #define WM8400_GPIO2_PU_MASK 0x2000 /* GPIO2_PU */
204 #define WM8400_GPIO4_PU 0x2000 /* GPIO4_PU */
205 #define WM8400_GPIO4_PU_MASK 0x2000 /* GPIO4_PU */
246 #define WM8400_GPIO6_PU 0x2000 /* GPIO6_PU */
247 #define WM8400_GPIO6_PU_MASK 0x2000 /* GPIO6_PU */
479 #define WM8400_DC1_SLEEP 0x2000 /* DC1_SLEEP */
480 #define WM8400_DC1_SLEEP_MASK 0x2000 /* DC1_SLEEP */
509 #define WM8400_DC1_FRC_PWM 0x2000 /* DC1_FRC_PWM */
510 #define WM8400_DC1_FRC_PWM_MASK 0x2000 /* DC1_FRC_PWM */
[all …]

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