Lines Matching full:x2000
162 #define WM8400_GPIO2_PU 0x2000 /* GPIO2_PU */
163 #define WM8400_GPIO2_PU_MASK 0x2000 /* GPIO2_PU */
204 #define WM8400_GPIO4_PU 0x2000 /* GPIO4_PU */
205 #define WM8400_GPIO4_PU_MASK 0x2000 /* GPIO4_PU */
246 #define WM8400_GPIO6_PU 0x2000 /* GPIO6_PU */
247 #define WM8400_GPIO6_PU_MASK 0x2000 /* GPIO6_PU */
479 #define WM8400_DC1_SLEEP 0x2000 /* DC1_SLEEP */
480 #define WM8400_DC1_SLEEP_MASK 0x2000 /* DC1_SLEEP */
509 #define WM8400_DC1_FRC_PWM 0x2000 /* DC1_FRC_PWM */
510 #define WM8400_DC1_FRC_PWM_MASK 0x2000 /* DC1_FRC_PWM */
535 #define WM8400_DC2_SLEEP 0x2000 /* DC2_SLEEP */
536 #define WM8400_DC2_SLEEP_MASK 0x2000 /* DC2_SLEEP */
565 #define WM8400_DC2_FRC_PWM 0x2000 /* DC2_FRC_PWM */
566 #define WM8400_DC2_FRC_PWM_MASK 0x2000 /* DC2_FRC_PWM */
607 #define WM8400_CHIP_SOFTSD 0x2000 /* CHIP_SOFTSD */
608 #define WM8400_CHIP_SOFTSD_MASK 0x2000 /* CHIP_SOFTSD */
654 #define WM8400_JDL_CINT 0x2000 /* JDL_CINT */
655 #define WM8400_JDL_CINT_MASK 0x2000 /* JDL_CINT */
722 #define WM8400_IM_JDL_CINT 0x2000 /* IM_JDL_CINT */
723 #define WM8400_IM_JDL_CINT_MASK 0x2000 /* IM_JDL_CINT */
790 #define WM8400_JDL_LVL 0x2000 /* JDL_LVL */
791 #define WM8400_JDL_LVL_MASK 0x2000 /* JDL_LVL */
850 #define WM8400_SDR_CHIP_SOFTSD 0x2000 /* SDR_CHIP_SOFTSD */
851 #define WM8400_SDR_CHIP_SOFTSD_MASK 0x2000 /* SDR_CHIP_SOFTSD */