Searched full:trbe (Results 1 – 16 of 16) sorted by relevance
4 Trace Buffer Extension (TRBE).13 Trace Buffer Extension (TRBE) is a percpu hardware which captures in system18 The TRBE is not compliant to CoreSight architecture specifications, but is25 The TRBE devices appear on the existing coresight bus alongside the other31 The ``trbe<N>`` named TRBEs are associated with a CPU.::37 * ``align``: TRBE write pointer alignment38 * ``flag``: TRBE updates memory with access and dirty flags
3 * This driver enables Trace Buffer Extension (TRBE) as a per-cpu coresight19 #include "coresight-trbe.h"26 * data which could not be decoded. TRBE doesn't support106 * Disable the TRBE without clearing LIMITPTR which in trbe_drain_and_disable_local()131 * at event_stop(). So disable the TRBE here and leave in trbe_stop_and_truncate_event()140 * TRBE Buffer Management142 * The TRBE buffer spans from the base pointer till the limit pointer. When enabled,145 * wrapped around again to the base pointer. This is called a TRBE wrap event, which147 * uses FILL mode, where the TRBE stops the trace collection at wrap event. The IRQ148 * handler updates the AUX buffer and re-enables the TRBE with updated WRITE and[all …]
179 tristate "Trace Buffer Extension (TRBE) driver"182 This driver provides support for percpu Trace Buffer Extension (TRBE).183 TRBE always needs to be used along with it's corresponding percpu ETE184 component. ETE generates trace data which is then captured with TRBE.185 Unlike traditional sink devices, TRBE is a CPU feature accessible via190 called coresight-trbe.
4 * Trace Buffer Extension (TRBE) driver in the coresight framework.23 unsigned int trbe = cpuid_feature_extract_unsigned_field(aa64dfr0, ID_AA64DFR0_TRBE_SHIFT); in is_trbe_available() local25 return trbe >= 0b0001; in is_trbe_available()
27 obj-$(CONFIG_CORESIGHT_TRBE) += coresight-trbe.o
5 $id: "http://devicetree.org/schemas/arm/trbe.yaml#"14 Arm Trace Buffer Extension (TRBE) is a per CPU component22 const: "trbe"30 TRBE is only supported on a subset of the CPUs, please consult45 trbe {
20 Arm Trace Buffer Extension (TRBE)). Since the ETE can be connected to
1 What: /sys/bus/coresight/devices/trbe<cpu>/align5 Description: (Read) Shows the TRBE write pointer alignment. This value8 What: /sys/bus/coresight/devices/trbe<cpu>/flag12 Description: (Read) Shows if TRBE updates in the memory are with access
59 /* Check if the TRBE is enabled */ in __debug_save_trace()
73 cbnz x0, .Lskip_trace_\@ // If TRBE is available at EL2
421 #define KVM_ARM64_DEBUG_STATE_SAVE_TRBE (1 << 13) /* Save TRBE context if active */
340 * TRBE Registers
118 // Use EL2 translations for SPE & TRBE and disable access from EL1
285 /* Check if we have TRBE implemented and available at the host */ in kvm_arch_vcpu_load_debug_state_flags()
3105 pr_warning("CS ETM warning: Coresight decode and TRBE support requires random file access.\n" in cs_etm__process_auxtrace_info()
1857 F: Documentation/devicetree/bindings/arm/trbe.yaml
