3  * This driver enables Trace Buffer Extension (TRBE) as a per-cpu coresight
19 #include "coresight-trbe.h"
26  * data which could not be decoded. TRBE doesn't support
106 	 * Disable the TRBE without clearing LIMITPTR which  in trbe_drain_and_disable_local()
131 	 * at event_stop(). So disable the TRBE here and leave  in trbe_stop_and_truncate_event()
140  * TRBE Buffer Management
142  * The TRBE buffer spans from the base pointer till the limit pointer. When enabled,
145  * wrapped around again to the base pointer. This is called a TRBE wrap event, which
147  * uses FILL mode, where the TRBE stops the trace collection at wrap event. The IRQ
148  * handler updates the AUX buffer and re-enables the TRBE with updated WRITE and
162  * pointer can be aligned to the implementation defined TRBE trace buffer alignment
175  * the wakeup is behind the tail. Enabled TRBE buffer span needs to be adjusted and
178  * consumed from the user space. The enabled TRBE buffer area is a moving subset of
204  * TRBE Limit Calculation
206  * The following markers are used to illustrate various TRBE buffer situations.
227 	 *	head	TRBE align	tail  in __trbe_normal_offset()
235 	 * needs to be aligned before TRBE can be configured. Pad the alignment  in __trbe_normal_offset()
268 	 * Lets calculate the buffer area which TRBE could write into. There  in __trbe_normal_offset()
270 	 * PAGE_SIZE per the TRBE requirement. Always avoid clobbering the  in __trbe_normal_offset()
281 	 * TRBE could write into [head..tail] area. Unless the tail is right at  in __trbe_normal_offset()
293 	 * TRBE should just write into [head..base + nr_pages] area even though  in __trbe_normal_offset()
306 	 * TRBE should just write into [head..base + nr_pages] area even though  in __trbe_normal_offset()
333 	 * the head and hence TRBE cannot be configured.  in __trbe_normal_offset()
425 	 * TRBE for trace capture. In this particular mode, the trace  in set_trbe_limit_pointer_enabled()
430 	 * the TRBE.  in set_trbe_limit_pointer_enabled()
435 	 * Trigger mode is not used here while configuring the TRBE for  in set_trbe_limit_pointer_enabled()
445 	/* Synchronize the TRBE enable event */  in set_trbe_limit_pointer_enabled()
461 	 * till now before enabling the TRBE.  in trbe_enable_hw()
495 	 * TRBE LIMIT and TRBE WRITE pointers must be page aligned. But with  in arm_trbe_alloc_buffer()
497 	 * into a partially filled TRBE buffer after the page size alignment.  in arm_trbe_alloc_buffer()
560 	 * We are about to disable the TRBE. And this could in turn  in arm_trbe_update_buffer()
571 	 * If the TRBE was disabled due to lack of space in the AUX buffer or a  in arm_trbe_update_buffer()
582 	 * perf handle structure needs to be shared with the TRBE IRQ handler for  in arm_trbe_update_buffer()
585 	 * while a TRBE IRQ also getting processed. This happens due the release  in arm_trbe_update_buffer()
587 	 * the TRBE here will ensure that no IRQ could be generated when the perf  in arm_trbe_update_buffer()
720 		 * thus leave the TRBE disabled. The etm-perf driver  in trbe_handle_overflow()
873 	desc.name = devm_kasprintf(dev, GFP_KERNEL, "trbe%d", cpu);  in arm_trbe_register_coresight_cpu()
905 		pr_err("TRBE is not implemented on cpu %d\n", cpu);  in arm_trbe_probe_cpu()
911 		pr_err("TRBE is owned in higher exception level on cpu %d\n", cpu);  in arm_trbe_probe_cpu()
979 		 * If this CPU was not probed for TRBE,  in arm_trbe_cpu_startup()
1136 		pr_err("TRBE wouldn't work if kernel gets unmapped at EL0\n");  in arm_trbe_init()
1156 MODULE_DESCRIPTION("Arm Trace Buffer Extension (TRBE) driver");