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/Linux-v6.1/Documentation/devicetree/bindings/clock/
Dmarvell,armada-3700-uart-clock.yaml23 "TBG-A-P", "TBG-B-P", "TBG-A-S", "TBG-B-S", "xtal"
26 It is suggest to specify at least one TBG clock to achieve
32 - const: TBG-A-P
33 - const: TBG-B-P
34 - const: TBG-A-S
35 - const: TBG-B-S
56 clocks = <&tbg 0>, <&tbg 1>, <&tbg 2>, <&tbg 3>, <&xtalclk>;
57 clock-names = "TBG-A-P", "TBG-B-P", "TBG-A-S", "TBG-B-S", "xtal";
Darmada3700-tbg-clock.txt6 The TBG clock consumer should specify the desired clock by having the
10 0 = TBG A P
11 1 = TBG B P
12 2 = TBG A S
13 3 = TBG B S
16 - compatible : shall be "marvell,armada-3700-tbg-clock"
22 tbg: tbg@13200 {
23 compatible = "marvell,armada-3700-tbg-clock";
Darmada3700-periph-clock.txt60 TBG-A P, TBG-B P, TBG-A S, TBG-B S and finally the xtal clock.
68 clocks = <&tbg 0>, <&tbg 1>, <&tbg 2>,
69 <&tbg 3>, <&xtalclk>;
/Linux-v6.1/drivers/clk/mvebu/
Darmada-37xx-tbg.c47 static const struct tbg_def tbg[NUM_TBG] = { variable
48 {"TBG-A-P", TBG_A_REFDIV, TBG_A_FBDIV, TBG_CTRL8, TBG_A_VCODIV_DIFF},
49 {"TBG-B-P", TBG_B_REFDIV, TBG_B_FBDIV, TBG_CTRL8, TBG_B_VCODIV_DIFF},
50 {"TBG-A-S", TBG_A_REFDIV, TBG_A_FBDIV, TBG_CTRL1, TBG_A_VCODIV_SE},
51 {"TBG-B-S", TBG_B_REFDIV, TBG_B_FBDIV, TBG_CTRL1, TBG_B_VCODIV_SE},
117 name = tbg[i].name; in armada_3700_tbg_clock_probe()
118 mult = tbg_get_mult(reg, &tbg[i]); in armada_3700_tbg_clock_probe()
119 div = tbg_get_div(reg, &tbg[i]); in armada_3700_tbg_clock_probe()
123 dev_err(dev, "Can't register TBG clock %s\n", name); in armada_3700_tbg_clock_probe()
142 { .compatible = "marvell,armada-3700-tbg-clock", },
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Darmada-37xx-periph.c11 * TBG-A-P --| | | | | | ______
12 * TBG-B-P --| Mux |--| /div1 |--| /div2 |--| Gate |--> perip_clk
13 * TBG-A-S --| | | | | | |______|
14 * TBG-B-S --|_____| |_______| |_______|
202 .parent_names = (const char *[]){ "TBG-A-P", \
203 "TBG-B-P", "TBG-A-S", "TBG-B-S"}, \
212 .parent_names = (const char *[]){ "TBG-A-P", \
213 "TBG-B-P", "TBG-A-S", "TBG-B-S"}, \
238 .parent_names = (const char *[]){ "TBG-A-P", \
239 "TBG-B-P", "TBG-A-S", "TBG-B-S"}, \
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DMakefile12 obj-$(CONFIG_ARMADA_37XX_CLK) += armada-37xx-tbg.o
/Linux-v6.1/arch/arm64/boot/dts/marvell/
Darmada-37xx.dtsi138 clocks = <&tbg 0>, <&tbg 1>, <&tbg 2>,
139 <&tbg 3>, <&xtalclk>;
140 clock-names = "TBG-A-P", "TBG-B-P", "TBG-A-S",
141 "TBG-B-S", "xtal";
172 clocks = <&tbg 0>, <&tbg 1>, <&tbg 2>,
173 <&tbg 3>, <&xtalclk>;
180 clocks = <&tbg 0>, <&tbg 1>, <&tbg 2>,
181 <&tbg 3>, <&xtalclk>;
185 tbg: tbg@13200 { label
186 compatible = "marvell,armada-3700-tbg-clock";
Darmada-3720-turris-mox.dts211 assigned-clock-parents = <&tbg 1>;
/Linux-v6.1/arch/x86/kernel/
Dtboot.c261 #define TB_COPY_GAS(tbg, g) \ in tboot_copy_fadt() argument
262 tbg.space_id = g.space_id; \ in tboot_copy_fadt()
263 tbg.bit_width = g.bit_width; \ in tboot_copy_fadt()
264 tbg.bit_offset = g.bit_offset; \ in tboot_copy_fadt()
265 tbg.access_width = g.access_width; \ in tboot_copy_fadt()
266 tbg.address = g.address; in tboot_copy_fadt()
/Linux-v6.1/drivers/tty/serial/
Dmvebu-uart.c495 * > d1 * d2 ("TBG divisors"): can divide only TBG clock from 1 to 6 in mvebu_uart_baud_rate_set()
503 * baudrate = tbg / (d1 * d2 * d * 16) in mvebu_uart_baud_rate_set()
507 * baudrate = 10 * tbg / (d1*d2 * d * (3 * (m1 + m2) + 2 * (m3 + m4))) in mvebu_uart_baud_rate_set()
525 * Member port->uartclk is either xtal clock rate or TBG clock rate in mvebu_uart_baud_rate_set()
1168 /* Do not use XTAL, select TBG clock and TBG d1 * d2 divisors */ in mvebu_uart_clock_prepare()
1177 /* Use XTAL, TBG bits are then ignored */ in mvebu_uart_clock_prepare()
1358 static const char *const parent_clk_names[] = { "TBG-A-P", "TBG-B-P", in mvebu_uart_clock_probe()
1359 "TBG-A-S", "TBG-B-S", in mvebu_uart_clock_probe()
1455 * Calculate the smallest TBG d1 and d2 divisors that in mvebu_uart_clock_probe()
1484 * Choose TBG clock source with the smallest divisors. Use XTAL in mvebu_uart_clock_probe()
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/Linux-v6.1/Documentation/devicetree/bindings/serial/
Dmvebu-uart.txt19 of UART. TBG clock (with UART TBG divisors d1=d2=1) or xtal clock
/Linux-v6.1/drivers/cpufreq/
Darmada-37xx-cpufreq.c140 /* Determine to which TBG clock is CPU connected */ in armada37xx_cpufreq_dvfs_setup()
157 /* Set cpu clock source, for all the level we use TBG */ in armada37xx_cpufreq_dvfs_setup()
162 /* Set TBG index, for all levels we use the same TBG */ in armada37xx_cpufreq_dvfs_setup()
/Linux-v6.1/drivers/ata/
Dsata_promise.c46 PDC_TBG_MODE = 0x41C, /* TBG mode (not SATAII) */
1128 /* don't initialise TBG or SLEW on 2nd generation chips */ in pdc_host_init()
1132 /* reduce TBG clock to 133 Mhz. */ in pdc_host_init()