Searched full:pru (Results 1 – 19 of 19) sorted by relevance
| /Linux-v5.15/drivers/remoteproc/ |
| D | pru_rproc.c | 3 * PRU-ICSS remoteproc driver for various TI SoCs 49 /* PRU/RTU/Tx_PRU Core IRAM address masks */ 58 /* PRU device addresses for various type of PRU RAMs */ 67 * enum pru_iomem - PRU core memory/register range identifiers 69 * @PRU_IOMEM_IRAM: PRU Instruction RAM range 70 * @PRU_IOMEM_CTRL: PRU Control register range 71 * @PRU_IOMEM_DEBUG: PRU Debug register range 82 * enum pru_type - PRU core type identifier 97 * struct pru_private_data - device data for a PRU core 98 * @type: type of the PRU core (PRU, RTU, Tx_PRU) [all …]
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| D | pru_rproc.h | 13 * struct pruss_int_map - PRU system events _to_ channel and host mapping 18 * PRU system events are mapped to channels, and these channels are mapped 31 * struct pru_irq_rsc - PRU firmware section header for IRQ data 34 * @pru_intc_map: PRU interrupt routing description 36 * The PRU firmware blob can contain optional .pru_irq_map ELF section, which
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| D | Kconfig | 131 tristate "TI PRU remoteproc support" 135 Support for TI PRU remote processors present within a PRU-ICSS 138 Say Y or M here to support the Programmable Realtime Unit (PRU) 140 not interested in the PRU or if you are unsure.
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| /Linux-v5.15/Documentation/devicetree/bindings/remoteproc/ |
| D | ti,pru-rproc.yaml | 4 $id: http://devicetree.org/schemas/remoteproc/ti,pru-rproc.yaml# 7 title: TI Programmable Realtime Unit (PRU) cores 14 (PRU-ICSS or PRUSS) has two 32-bit load/store RISC CPU cores called 15 Programmable Real-Time Units (PRUs), each represented by a node. Each PRU 17 use the Data RAMs present within the PRU-ICSS for code execution. 20 PRU cores called RTUs with slightly different IP integration. The K3 SoCs 22 auxiliary Transmit PRU cores called Tx_PRUs that augment the PRUs. Each RTU 23 or Tx_PRU core can also be used independently like a PRU, or alongside a 24 corresponding PRU core to provide/implement auxiliary functionality/support. 26 Each PRU, RTU or Tx_PRU core node should be defined as a child node of the [all …]
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| /Linux-v5.15/Documentation/devicetree/bindings/soc/ti/ |
| D | ti,pruss.yaml | 16 (PRU-ICSS a.k.a. PRUSS) is present on various TI SoCs such as AM335x, AM437x, 34 A PRU-ICSS subsystem can have up to three shared data memories. A PRU core 36 0x0, but also has access to a secondary Data RAM (primary to the other PRU 38 by both the PRU cores. The Interrupt Controller (INTC) and a CFG module are 39 common to both the PRU cores. Each PRU core also has a private instruction 42 Various sub-modules within a PRU-ICSS subsystem are represented as individual 48 PRU-ICSS Node 50 Each PRU-ICSS instance is represented as its own node with the individual PRU 98 The various Data RAMs within a single PRU-ICSS unit are represented as a 129 PRU-ICSS configuration space. CFG sub-module represented as a SysCon. [all …]
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| /Linux-v5.15/Documentation/devicetree/bindings/interrupt-controller/ |
| D | ti,pruss-intc.yaml | 7 title: TI PRU-ICSS Local Interrupt Controller 13 Each PRU-ICSS has a single interrupt controller instance that is common 14 to all the PRU cores. Most interrupt controllers can route 64 input events 18 interrupts (0, 1) are fed exclusively to the internal PRU cores, with the 77 Client users shall use the PRU System event number (the interrupt source 78 that the client is interested in) [cell 1], PRU channel [cell 2] and PRU 113 /* AM33xx PRU-ICSS */ 136 /* AM4376 PRU-ICSS */
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| /Linux-v5.15/arch/arm/boot/dts/ |
| D | am57-pruss.dtsi | 88 pru1_0: pru@34000 { 89 compatible = "ti,am5728-pru"; 97 pru1_1: pru@38000 { 98 compatible = "ti,am5728-pru"; 197 pru2_0: pru@34000 { 198 compatible = "ti,am5728-pru"; 206 pru2_1: pru@38000 { 207 compatible = "ti,am5728-pru";
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| D | am4372.dtsi | 497 pru1_0: pru@34000 { 498 compatible = "ti,am4376-pru"; 506 pru1_1: pru@38000 { 507 compatible = "ti,am4376-pru"; 584 pru0_0: pru@74000 { 585 compatible = "ti,am4376-pru"; 593 pru0_1: pru@78000 { 594 compatible = "ti,am4376-pru";
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| D | am335x-icev2.dts | 471 /* ETH1 mux: Low for MII-PRU, high for RMII-CPSW */
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| D | am33xx-l4.dtsi | 909 pru0: pru@34000 { 910 compatible = "ti,am3356-pru"; 918 pru1: pru@38000 { 919 compatible = "ti,am3356-pru";
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| /Linux-v5.15/drivers/soc/ti/ |
| D | Kconfig | 87 tristate "TI PRU-ICSS Subsystem Platform drivers" 91 TI PRU-ICSS Subsystem platform specific support. 93 Say Y or M here to support the Programmable Realtime Unit (PRU) 95 not interested in the PRU or if you are unsure.
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| D | pruss.c | 3 * PRU-ICSS platform driver for various TI SoCs 357 MODULE_DESCRIPTION("PRU-ICSS Subsystem Driver");
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| /Linux-v5.15/arch/arm64/boot/dts/ti/ |
| D | k3-am65-main.dtsi | 996 pru0_0: pru@34000 { 997 compatible = "ti,am654-pru"; 1015 compatible = "ti,am654-tx-pru"; 1023 pru0_1: pru@38000 { 1024 compatible = "ti,am654-pru"; 1042 compatible = "ti,am654-tx-pru"; 1137 pru1_0: pru@34000 { 1138 compatible = "ti,am654-pru"; 1156 compatible = "ti,am654-tx-pru"; 1164 pru1_1: pru@38000 { [all …]
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| D | k3-j721e-main.dtsi | 1738 pru0_0: pru@34000 { 1739 compatible = "ti,j721e-pru"; 1757 compatible = "ti,j721e-tx-pru"; 1765 pru0_1: pru@38000 { 1766 compatible = "ti,j721e-pru"; 1784 compatible = "ti,j721e-tx-pru"; 1879 pru1_0: pru@34000 { 1880 compatible = "ti,j721e-pru"; 1898 compatible = "ti,j721e-tx-pru"; 1906 pru1_1: pru@38000 { [all …]
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| /Linux-v5.15/include/linux/ |
| D | pruss_driver.h | 3 * PRU-ICSS sub-system specific definitions
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| /Linux-v5.15/drivers/uio/ |
| D | uio_pruss.c | 45 * firmware and user space application, async notification from PRU firmware 132 /* Power on PRU in case its not done as part of boot-loader */ in pruss_probe()
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| /Linux-v5.15/drivers/irqchip/ |
| D | Kconfig | 494 This enables support for the PRU-ICSS Local Interrupt Controller 495 present within a PRU-ICSS subsystem present on various TI SoCs.
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| D | irq-pruss-intc.c | 3 * PRU-ICSS INTC IRQChip driver for various TI SoCs 218 * Undo whatever was done in pruss_intc_map() for a PRU core. 660 MODULE_DESCRIPTION("TI PRU-ICSS INTC Driver");
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| /Linux-v5.15/include/linux/mfd/ |
| D | da8xx-cfgchip.h | 132 /* CFGCHIP3 (EMAC/uPP/PLL1/ASYNC3/PRU/DIV4.5/EMIFA) register bits */
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