Searched full:mx8qxp (Results 1 – 25 of 25) sorted by relevance
| /Linux-v6.1/drivers/gpu/drm/bridge/imx/ |
| D | Kconfig | 13 tristate "Freescale i.MX8QXP LVDS display bridge"
19 Freescale i.MX8qxp processor. Official name of LDB is pixel mapper.
40 tristate "Freescale i.MX8QXP pixel link to display pixel interface"
45 found in Freescale i.MX8qxp processor.
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| D | imx8qxp-pixel-link.c | 427 MODULE_DESCRIPTION("i.MX8QXP/QM display pixel link bridge driver");
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| D | imx8qxp-pxl2dpi.c | 485 MODULE_DESCRIPTION("i.MX8QXP pixel link to DPI bridge driver");
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| D | imx8qxp-ldb-drv.c | 720 MODULE_DESCRIPTION("i.MX8QXP LVDS Display Bridge(LDB)/Pixel Mapper bridge driver");
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| /Linux-v6.1/Documentation/devicetree/bindings/display/bridge/ |
| D | fsl,imx8qxp-pxl2dpi.yaml | 7 title: Freescale i.MX8qxp Pixel Link to Display Pixel Interface
13 The Freescale i.MX8qxp Pixel Link to Display Pixel Interface(PXL2DPI)
19 The i.MX8qxp PXL2DPI is controlled by Control and Status Registers(CSR) module.
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| D | fsl,imx8qxp-ldb.yaml | 19 For i.MX8qxp LDB, each channel supports up to 24bpp parallel input color
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| /Linux-v6.1/drivers/firmware/imx/ |
| D | Kconfig | 8 DSP exists on some i.MX8 processors (e.g i.MX8QM, i.MX8QXP).
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| /Linux-v6.1/Documentation/devicetree/bindings/phy/ |
| D | mixel,mipi-dsi-phy.yaml | 17 The Mixel PHY IP block found on i.MX8qxp is a combo PHY that can work
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| /Linux-v6.1/Documentation/devicetree/bindings/media/ |
| D | nxp,imx8-jpeg.yaml | 7 title: i.MX8QXP/QM JPEG decoder/encoder
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| D | amphion,vpu.yaml | 53 separately. NXP i.MX8QM SoC has one decoder and two encoder, i.MX8QXP SoC
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| /Linux-v6.1/Documentation/devicetree/bindings/clock/ |
| D | imx8qxp-lpcg.yaml | 7 title: NXP i.MX8QXP LPCG (Low-Power Clock Gating) Clock bindings
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| /Linux-v6.1/drivers/media/platform/nxp/imx-jpeg/ |
| D | mxc-jpeg.h | 3 * i.MX8QXP/i.MX8QM JPEG encoder/decoder v4l2 driver
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| D | mxc-jpeg-hw.h | 3 * i.MX8QXP/i.MX8QM JPEG encoder/decoder v4l2 driver
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| D | mxc-jpeg-hw.c | 3 * i.MX8QXP/i.MX8QM JPEG encoder/decoder v4l2 driver
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| D | mxc-jpeg.c | 3 * V4L2 driver for the JPEG encoder/decoder from i.MX8QXP/i.MX8QM application
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| /Linux-v6.1/arch/arm64/boot/dts/freescale/ |
| D | imx8qxp-ai_ml.dts | 12 model = "Einfochips i.MX8QXP AI_ML";
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| D | imx8qxp-mek.dts | 11 model = "Freescale i.MX8QXP MEK";
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| /Linux-v6.1/drivers/pinctrl/freescale/ |
| D | pinctrl-imx8qxp.c | 239 MODULE_DESCRIPTION("NXP i.MX8QXP pinctrl driver");
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| /Linux-v6.1/drivers/remoteproc/ |
| D | imx_dsp_rproc.c | 258 /* Specific configuration for i.MX8QXP */
736 * On i.MX8QM and i.MX8QXP there is multiple power domains
819 * For i.MX8QXP and i.MX8QM, DSP should be started and stopped by System
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| /Linux-v6.1/Documentation/devicetree/bindings/arm/ |
| D | fsl.yaml | 1037 - description: i.MX8QXP based Boards
1040 - einfochips,imx8qxp-ai_ml # i.MX8QXP AI_ML Board
1041 - fsl,imx8qxp-mek # i.MX8QXP MEK Board
1051 - description: i.MX8QXP Boards with Toradex Coilbri iMX8X Modules
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| /Linux-v6.1/sound/soc/fsl/ |
| D | fsl_mqs.c | 200 * But in i.MX8QM/i.MX8QXP the control register is moved in fsl_mqs_probe()
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| D | fsl_asrc.c | 77 * i.MX8QM/i.MX8QXP uses the same map for input and output.
80 * clk_map_imx8qxp[0] is for i.MX8QXP asrc0
81 * clk_map_imx8qxp[1] is for i.MX8QXP asrc1
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| /Linux-v6.1/drivers/clk/imx/ |
| D | clk-imx8qxp.c | 315 MODULE_DESCRIPTION("NXP i.MX8QXP clock driver");
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| D | clk-imx8qxp-lpcg.c | 376 MODULE_DESCRIPTION("NXP i.MX8QXP LPCG clock driver");
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| /Linux-v6.1/drivers/iio/adc/ |
| D | imx8qxp-adc.c | 3 * NXP i.MX8QXP ADC driver
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