| /Linux-v5.10/drivers/mailbox/ |
| D | stm32-ipcc.c | 53 spinlock_t lock; /* protect access to IPCC registers */
83 struct stm32_ipcc *ipcc = data; in stm32_ipcc_rx_irq() local
84 struct device *dev = ipcc->controller.dev; in stm32_ipcc_rx_irq()
90 proc_offset = ipcc->proc_id ? -IPCC_PROC_OFFST : IPCC_PROC_OFFST; in stm32_ipcc_rx_irq()
91 tosr = readl_relaxed(ipcc->reg_proc + proc_offset + IPCC_XTOYSR); in stm32_ipcc_rx_irq()
92 mr = readl_relaxed(ipcc->reg_proc + IPCC_XMR); in stm32_ipcc_rx_irq()
97 for (chan = 0; chan < ipcc->n_chans; chan++) { in stm32_ipcc_rx_irq()
103 mbox_chan_received_data(&ipcc->controller.chans[chan], NULL); in stm32_ipcc_rx_irq()
105 stm32_ipcc_set_bits(&ipcc->lock, ipcc->reg_proc + IPCC_XSCR, in stm32_ipcc_rx_irq()
116 struct stm32_ipcc *ipcc = data; in stm32_ipcc_tx_irq() local
[all …]
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| D | qcom-ipcc.c | 14 #include <dt-bindings/mailbox/qcom-ipcc.h>
18 /* IPCC Register offsets */
44 * @base: Base address of the IPCC frame associated to APSS
74 struct qcom_ipcc *ipcc = data; in qcom_ipcc_irq_fn() local
79 hwirq = readl(ipcc->base + IPCC_REG_RECV_ID); in qcom_ipcc_irq_fn()
83 virq = irq_find_mapping(ipcc->irq_domain, hwirq); in qcom_ipcc_irq_fn()
84 writel(hwirq, ipcc->base + IPCC_REG_RECV_SIGNAL_CLEAR); in qcom_ipcc_irq_fn()
93 struct qcom_ipcc *ipcc = irq_data_get_irq_chip_data(irqd); in qcom_ipcc_mask_irq() local
96 writel(hwirq, ipcc->base + IPCC_REG_RECV_SIGNAL_DISABLE); in qcom_ipcc_mask_irq()
101 struct qcom_ipcc *ipcc = irq_data_get_irq_chip_data(irqd); in qcom_ipcc_unmask_irq() local
[all …]
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| D | Kconfig | 203 tristate "STM32 IPCC Mailbox"
207 with hardware for Inter-Processor Communication Controller (IPCC)
248 bool "Qualcomm Technologies, Inc. IPCC driver"
252 (IPCC) driver for MSM devices. The driver provides mailbox support for
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| D | Makefile | 46 obj-$(CONFIG_STM32_IPCC) += stm32-ipcc.o
56 obj-$(CONFIG_QCOM_IPCC) += qcom-ipcc.o
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| /Linux-v5.10/Documentation/devicetree/bindings/mailbox/ |
| D | qcom-ipcc.yaml | 4 $id: http://devicetree.org/schemas/mailbox/qcom-ipcc.yaml#
13 The Inter-Processor Communication Controller (IPCC) is a centralized hardware
20 protocol (protocol-id is 0). Refer include/dt-bindings/mailbox/qcom-ipcc.h
27 - qcom,sm8250-ipcc
28 - const: qcom,ipcc
62 #include <dt-bindings/mailbox/qcom-ipcc.h>
65 compatible = "qcom,sm8250-ipcc", "qcom,ipcc";
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| D | st,stm32-ipcc.yaml | 4 $id: "http://devicetree.org/schemas/mailbox/st,stm32-ipcc.yaml#"
10 The IPCC block provides a non blocking signaling mechanism to post and
21 const: st,stm32mp1-ipcc
70 ipcc: mailbox@4c001000 {
71 compatible = "st,stm32mp1-ipcc";
79 clocks = <&rcc_clk IPCC>;
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| /Linux-v5.10/sound/soc/intel/catpt/ |
| D | ipc.c | 64 catpt_writel_shim(cdev, IPCC, header); in catpt_dsp_send_tx()
268 u32 isc, ipcc; in catpt_dsp_irq_handler() local
278 ipcc = catpt_readl_shim(cdev, IPCC); in catpt_dsp_irq_handler()
279 trace_catpt_ipc_reply(ipcc); in catpt_dsp_irq_handler()
280 catpt_dsp_copy_rx(cdev, ipcc); in catpt_dsp_irq_handler()
284 catpt_updatel_shim(cdev, IPCC, CATPT_IPCC_DONE, 0); in catpt_dsp_irq_handler()
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| D | dsp.c | 324 catpt_writel_shim(cdev, IPCC, CATPT_IPCC_DEFAULT); in catpt_dsp_set_regs_defaults()
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| /Linux-v5.10/arch/arm/boot/dts/ |
| D | stm32mp15xx-osd32.dtsi | 214 &ipcc {
221 mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
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| D | stm32mp157c-odyssey-som.dtsi | 234 &ipcc {
246 mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
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| D | stm32mp157c-ed1.dts | 292 &ipcc {
304 mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
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| D | stm32mp15xx-dhcom-som.dtsi | 300 &ipcc {
312 mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
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| D | stm32mp15xx-dkx.dtsi | 415 &ipcc {
441 mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
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| D | stm32mp151.dtsi | 1079 ipcc: mailbox@4c001000 { label
1080 compatible = "st,stm32mp1-ipcc";
1089 clocks = <&rcc IPCC>;
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| /Linux-v5.10/arch/arm64/boot/dts/qcom/ |
| D | sm8250.dtsi | 11 #include <dt-bindings/mailbox/qcom-ipcc.h>
333 interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
336 mboxes = <&ipcc IPCC_CLIENT_LPASS
357 interrupts-extended = <&ipcc IPCC_CLIENT_CDSP
360 mboxes = <&ipcc IPCC_CLIENT_CDSP
381 interrupts-extended = <&ipcc IPCC_CLIENT_SLPI
384 mboxes = <&ipcc IPCC_CLIENT_SLPI
423 ipcc: mailbox@408000 { label
424 compatible = "qcom,sm8250-ipcc", "qcom,ipcc";
1414 interrupts-extended = <&ipcc IPCC_CLIENT_SLPI
[all …]
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| /Linux-v5.10/include/dt-bindings/clock/ |
| D | stm32mp1-clks.h | 96 #define IPCC 83 macro
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| /Linux-v5.10/sound/soc/sof/intel/ |
| D | shim.h | 85 /* IPCX / IPCC */
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| /Linux-v5.10/drivers/clk/ |
| D | clk-stm32mp1.c | 1875 PCLK(IPCC, "ipcc", "ck_mcu", 0, G_IPCC),
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| /Linux-v5.10/ |
| D | MAINTAINERS | 14533 QUALCOMM IPCC MAILBOX DRIVER
14537 F: Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml
14538 F: drivers/mailbox/qcom-ipcc.c
14539 F: include/dt-bindings/mailbox/qcom-ipcc.h
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