Home
last modified time | relevance | path

Searched full:hvs (Results 1 – 24 of 24) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/vc4/
Dvc4_hvs.c7 * DOC: VC4 HVS module.
9 * The Hardware Video Scaler (HVS) is the piece of hardware that does
16 * There is a single global HVS, with multiple output FIFOs that can
18 * the HVS, while the vc4_crtc.c code actually drives HVS setup for
68 void vc4_hvs_dump_state(struct vc4_hvs *hvs) in vc4_hvs_dump_state() argument
70 struct drm_device *drm = &hvs->vc4->base; in vc4_hvs_dump_state()
71 struct drm_printer p = drm_info_printer(&hvs->pdev->dev); in vc4_hvs_dump_state()
77 drm_print_regset32(&p, &hvs->regset); in vc4_hvs_dump_state()
79 DRM_INFO("HVS ctx:\n"); in vc4_hvs_dump_state()
83 readl((u32 __iomem *)hvs->dlist + i + 0), in vc4_hvs_dump_state()
[all …]
Dvc4_plane.c9 * Each DRM plane is a layer of pixels being scanned out by the HVS.
11 * At atomic modeset check time, we compute the HVS display element
15 * into the region of the HVS that it has allocated for us.
35 u32 hvs; /* HVS_FORMAT_* */ member
42 .hvs = HVS_PIXEL_FORMAT_RGBA8888,
48 .hvs = HVS_PIXEL_FORMAT_RGBA8888,
54 .hvs = HVS_PIXEL_FORMAT_RGBA8888,
60 .hvs = HVS_PIXEL_FORMAT_RGBA8888,
66 .hvs = HVS_PIXEL_FORMAT_RGB565,
71 .hvs = HVS_PIXEL_FORMAT_RGB565,
[all …]
Dvc4_crtc.c12 * the HVS at that timing, and feeds it to the encoder.
16 * responsible for writing the display list for the HVS channel that
75 struct vc4_hvs *hvs = vc4->hvs; in vc4_crtc_get_cob_allocation() local
95 struct vc4_hvs *hvs = vc4->hvs; in vc4_crtc_get_scanout_position() local
112 * pixelvalve by the HVS, and also the scaler status. in vc4_crtc_get_scanout_position()
122 /* Vertical position of hvs composed scanline. */ in vc4_crtc_get_scanout_position()
130 if (vc4_hvs_get_fifo_frame_count(hvs, vc4_crtc_state->assigned_channel) % 2) in vc4_crtc_get_scanout_position()
135 /* This is the offset we need for translating hvs -> pv scanout pos. */ in vc4_crtc_get_scanout_position()
141 /* HVS more than fifo_lines into frame for compositing? */ in vc4_crtc_get_scanout_position()
145 * from HVS. The actual PV scanout can not trail behind more in vc4_crtc_get_scanout_position()
[all …]
Dvc4_kms.c161 struct vc4_hvs *hvs = vc4->hvs; in vc4_ctm_commit() local
235 struct vc4_hvs *hvs = vc4->hvs; in vc4_hvs_pv_muxing_commit() local
276 struct vc4_hvs *hvs = vc4->hvs; in vc5_hvs_pv_muxing_commit() local
351 struct vc4_hvs *hvs = vc4->hvs; in vc4_atomic_commit_tail() local
374 vc4_hvs_mask_underrun(hvs, vc4_crtc_state->assigned_channel); in vc4_atomic_commit_tail()
408 WARN_ON(clk_set_min_rate(hvs->core_clk, core_rate)); in vc4_atomic_commit_tail()
438 * Request a clock rate based on the current HVS in vc4_atomic_commit_tail()
441 WARN_ON(clk_set_min_rate(hvs->core_clk, new_hvs_state->core_clock_rate)); in vc4_atomic_commit_tail()
444 clk_get_rate(hvs->core_clk)); in vc4_atomic_commit_tail()
634 /* HVS clock is supposed to run @ 250Mhz, let's take a margin and in vc4_load_tracker_atomic_check()
[all …]
Dvc4_drv.h85 struct vc4_hvs *hvs; member
199 * demanding in term of memory or HVS bandwidth which is hard to guess
333 /* Memory manager for the LBM memory used by HVS scaling. */
411 /* Load of this plane on the HVS block. The load is expressed in HVS
461 /* Bitmask of channels (FIFOs) of the HVS that the output can source from */
464 /* Which output of the HVS this pixelvalve sources from. */
510 * set in the HVS for that CRTC. Protected by @irq_lock, and
517 * @current_hvs_channel: HVS channel currently assigned to the
578 #define HVS_READ(offset) readl(hvs->regs + offset)
579 #define HVS_WRITE(offset, val) writel(val, hvs->regs + offset)
[all …]
Dvc4_drv.c277 { .compatible = "brcm,bcm2711-hvs" },
278 { .compatible = "brcm,bcm2835-hvs" },
416 * but after the HVS to set the possible_crtc field properly
417 * - The HDMI driver needs to be bound after the HVS so that we can
418 * lookup the HVS maximum core clock rate and figure out if we
Dvc4_regs.h221 /* Global register for clock gating the HVS */
386 /* Last pixel in the COB (display FIFO memory) allocated to this HVS
392 /* First pixel in the COB (display FIFO memory) allocated to this HVS
481 /* Slave addresses for DMAing from HVS composition output to other
806 /* HVS display list information. */
Dvc4_txp.c50 /* Pre-rotation width/height of the image. Must match HVS config.
133 /* Request odd field from HVS. */
Dvc4_hdmi.c3486 long max_rate = clk_round_rate(vc4->hvs->core_clk, 550000000); in vc4_hdmi_bind()
/Linux-v6.1/net/vmw_vsock/
Dhyperv_transport.c251 struct hvsock *hvs = vsk->trans; in hvs_channel_cb() local
252 struct vmbus_channel *chan = hvs->chan; in hvs_channel_cb()
303 struct hvsock *hvs = NULL; in hvs_open_connection() local
353 hvs = vsock_sk(sk)->trans; in hvs_open_connection()
354 hvs->chan = chan; in hvs_open_connection()
393 hvs->chan = NULL; in hvs_open_connection()
444 struct hvsock *hvs; in hvs_sock_init() local
447 hvs = kzalloc(sizeof(*hvs), GFP_KERNEL); in hvs_sock_init()
448 if (!hvs) in hvs_sock_init()
451 vsk->trans = hvs; in hvs_sock_init()
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/display/
Dbrcm,bcm2835-hvs.yaml4 $id: http://devicetree.org/schemas/display/brcm,bcm2835-hvs.yaml#
15 - brcm,bcm2711-hvs
16 - brcm,bcm2835-hvs
39 const: brcm,bcm2711-hvs
47 hvs@7e400000 {
48 compatible = "brcm,bcm2835-hvs";
Dbrcm,bcm2835-vc4.yaml14 with HDMI output and the HVS (Hardware Video Scaler) for compositing
/Linux-v6.1/Documentation/gpu/
Dvc4.rst21 HVS section in Display Hardware Handling
25 :doc: VC4 HVS module.
27 HVS planes
/Linux-v6.1/tools/testing/selftests/net/
Dtest_vxlan_under_vrf.sh7 # two for the HVs, two for the VMs.
88 # Check connectivity between HVs by pinging hv-2 from hv-1
Dtest_vxlan_vnifiltering.sh7 # six namespaces: two for the HVs, four for the VMs. Each VM is
/Linux-v6.1/arch/arm/boot/dts/
Dbcm2711-rpi.dtsi52 &hvs {
Dbcm283x.dtsi431 hvs@7e400000 {
432 compatible = "brcm,bcm2835-hvs";
Dbcm2711.dtsi292 hvs: hvs@7e400000 { label
293 compatible = "brcm,bcm2711-hvs";
/Linux-v6.1/drivers/clk/bcm/
Dclk-raspberrypi.c95 * The clock is shared between the HVS and the CSI
97 * on the pixels composited on the HVS and the capture
/Linux-v6.1/Documentation/virt/hyperv/
Dclocks.rst67 timer 0. Interrupts from stimer0 are recorded on the "HVS" line in
/Linux-v6.1/drivers/net/ethernet/broadcom/bnx2x/
Dbnx2x_vfpf.h29 /* Common definitions for all HVs */
/Linux-v6.1/arch/x86/kernel/
Dirq.c156 seq_printf(p, "%*s: ", prec, "HVS"); in arch_show_interrupts()
/Linux-v6.1/drivers/media/i2c/
Dimx274.c230 {0x3018, 0xA2}, /* output XVS, HVS */
271 {0x3018, 0xA2}, /* output XVS, HVS */
311 {0x3018, 0xA2}, /* output XVS, HVS */
351 {0x3018, 0xA2}, /* output XVS, HVS */
/Linux-v6.1/include/uapi/drm/
Ddrm_fourcc.h941 * HVS, it is only valid for H.264 (NV12/21) and RGBA modes.