Lines Matching full:hvs
85 struct vc4_hvs *hvs; member
199 * demanding in term of memory or HVS bandwidth which is hard to guess
333 /* Memory manager for the LBM memory used by HVS scaling. */
411 /* Load of this plane on the HVS block. The load is expressed in HVS
461 /* Bitmask of channels (FIFOs) of the HVS that the output can source from */
464 /* Which output of the HVS this pixelvalve sources from. */
510 * set in the HVS for that CRTC. Protected by @irq_lock, and
517 * @current_hvs_channel: HVS channel currently assigned to the
578 #define HVS_READ(offset) readl(hvs->regs + offset)
579 #define HVS_WRITE(offset, val) writel(val, hvs->regs + offset)
946 void vc4_hvs_stop_channel(struct vc4_hvs *hvs, unsigned int output);
947 int vc4_hvs_get_fifo_from_output(struct vc4_hvs *hvs, unsigned int output);
948 u8 vc4_hvs_get_fifo_frame_count(struct vc4_hvs *hvs, unsigned int fifo);
954 void vc4_hvs_dump_state(struct vc4_hvs *hvs);
955 void vc4_hvs_unmask_underrun(struct vc4_hvs *hvs, int channel);
956 void vc4_hvs_mask_underrun(struct vc4_hvs *hvs, int channel);