| /Linux-v5.10/drivers/perf/ |
| D | arm_pmu_acpi.c | 23 struct acpi_madt_generic_interrupt *gicc; in arm_pmu_acpi_register_irq() local
26 gicc = acpi_cpu_get_madt_gicc(cpu); in arm_pmu_acpi_register_irq()
28 gsi = gicc->performance_interrupt; in arm_pmu_acpi_register_irq()
40 if (gicc->flags & ACPI_MADT_PERFORMANCE_IRQ_MODE) in arm_pmu_acpi_register_irq()
46 * Helpfully, the MADT GICC doesn't have a polarity flag for the in arm_pmu_acpi_register_irq()
61 struct acpi_madt_generic_interrupt *gicc; in arm_pmu_acpi_unregister_irq() local
64 gicc = acpi_cpu_get_madt_gicc(cpu); in arm_pmu_acpi_unregister_irq()
66 gsi = gicc->performance_interrupt; in arm_pmu_acpi_unregister_irq()
98 * Sanity check all the GICC tables for the same interrupt number. in arm_spe_acpi_register_device()
102 struct acpi_madt_generic_interrupt *gicc; in arm_spe_acpi_register_device() local
[all …]
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| /Linux-v5.10/arch/arm64/include/asm/ |
| D | acpi.h | 23 /* Macros for consistency checks of the GICC subtable of MADT */
26 * MADT GICC minimum length refers to the MADT GICC structure table length as
30 * struct acpi_madt_generic_interrupt to represent the MADT GICC structure
32 * is therefore used to delimit the MADT GICC structure minimum length
85 * obtained from GICC with 0 and not print some error message as well.
86 * Since MADT must provide at least one GICC structure for GIC
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| /Linux-v5.10/drivers/irqchip/ |
| D | irq-gic-v3.c | 1854 gicv_idx += 3; /* Also skip GICD, GICC, GICH */ in gic_of_setup_kvm_info()
1982 struct acpi_madt_generic_interrupt *gicc = in gic_acpi_parse_madt_gicc() local
1988 /* GICC entry which has !ACPI_MADT_ENABLED is not unusable so skip */ in gic_acpi_parse_madt_gicc()
1989 if (!(gicc->flags & ACPI_MADT_ENABLED)) in gic_acpi_parse_madt_gicc()
1992 redist_base = ioremap(gicc->gicr_base_address, size); in gic_acpi_parse_madt_gicc()
1996 gic_acpi_register_redist(gicc->gicr_base_address, redist_base); in gic_acpi_parse_madt_gicc()
2031 struct acpi_madt_generic_interrupt *gicc = in gic_acpi_match_gicc() local
2035 * If GICC is enabled and has valid gicr base address, then it means in gic_acpi_match_gicc()
2036 * GICR base is presented via GICC in gic_acpi_match_gicc()
2038 if ((gicc->flags & ACPI_MADT_ENABLED) && gicc->gicr_base_address) { in gic_acpi_match_gicc()
[all …]
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| D | irq-gic.c | 1642 pr_err("No valid GICC entries exist\n"); in gic_v2_acpi_init()
1648 pr_err("Unable to map GICC registers\n"); in gic_v2_acpi_init()
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| /Linux-v5.10/Documentation/devicetree/bindings/interrupt-controller/ |
| D | arm,gic-v3.yaml | 77 - GIC CPU interface (GICC)
81 GICC, GICH and GICV are optional.
213 <0x2c000000 0x2000>, // GICC
241 <0x2c040000 0x2000>, // GICC
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| /Linux-v5.10/drivers/acpi/ |
| D | processor_core.c | 90 struct acpi_madt_generic_interrupt *gicc = in map_gicc_mpidr() local
93 if (!(gicc->flags & ACPI_MADT_ENABLED)) in map_gicc_mpidr()
101 if (device_declaration && (gicc->uid == acpi_id)) { in map_gicc_mpidr()
102 *mpidr = gicc->arm_mpidr; in map_gicc_mpidr()
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| D | tables.c | 192 pr_debug("GICC (acpi_id[0x%04x] address[%llx] MPIDR[0x%llx] %s)\n", in acpi_table_print_madt_entry()
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| /Linux-v5.10/arch/arm64/boot/dts/marvell/ |
| D | armada-ap810-ap0.dtsi | 53 <0x00c0000 0x2000>, /* GICC */
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| D | armada-37xx.dtsi | 470 <0x1d80000 0x2000>, /* GICC */
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| /Linux-v5.10/arch/arm64/boot/dts/amazon/ |
| D | alpine-v2.dtsi | 120 <0x0 0xf0100000 0x0 0x2000>, /* GICC */
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| D | alpine-v3.dtsi | 323 <0x0 0xf0000000 0 0x2000>, /* GICC */
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| /Linux-v5.10/arch/arm64/boot/dts/microchip/ |
| D | sparx5.dtsi | 116 <0x6 0x00200000 0x2000>, /* GICC */
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| /Linux-v5.10/arch/arm64/boot/dts/arm/ |
| D | fvp-base-revc.dts | 124 <0x0 0x2c000000 0 0x2000>, // GICC
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| /Linux-v5.10/arch/arm64/boot/dts/hisilicon/ |
| D | hip05.dtsi | 240 <0x0 0xfe000000 0 0x10000>, /* GICC */
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| D | hi3798cv200.dtsi | 61 <0x0 0xf1002000 0x0 0x100>; /* GICC */
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| D | hi3670.dtsi | 118 <0x0 0xe82b2000 0 0x2000>, /* GICC */
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| /Linux-v5.10/arch/arm64/boot/dts/mediatek/ |
| D | mt6797.dtsi | 481 <0 0x10240000 0 0x2000>; /* GICC */
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| D | mt8183.dtsi | 246 <0 0x0c400000 0 0x2000>, /* GICC */
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| /Linux-v5.10/arch/arm64/boot/dts/qcom/ |
| D | ipq6018.dtsi | 340 <0x0 0x0b002000 0x0 0x1000>, /*GICC*/
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| /Linux-v5.10/arch/arm64/boot/dts/freescale/ |
| D | fsl-ls1012a.dtsi | 92 <0x0 0x1402000 0 0x2000>, /* GICC */
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| D | fsl-ls1046a.dtsi | 262 <0x0 0x1420000 0 0x20000>, /* GICC */
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| D | fsl-ls1088a.dtsi | 117 <0x0 0x0c0c0000 0 0x2000>, /* GICC */
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| /Linux-v5.10/Documentation/arm64/ |
| D | acpi_object_usage.rst | 349 Optional, but if used, only the GICC Affinity structures are read.
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| /Linux-v5.10/arch/arm64/kernel/ |
| D | smp.c | 567 /* Check if GICC structure of boot CPU is available in the MADT */ in acpi_map_gic_cpu_interface()
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| /Linux-v5.10/include/acpi/ |
| D | actbl3.h | 252 /* 3: GICC Affinity (ACPI 5.1) */
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