| /Linux-v5.4/drivers/gpu/drm/i915/ | 
| D | Makefile | 70 i915-$(CONFIG_DEBUG_FS) += i915_debugfs.o display/intel_pipe_crc.o160 obj-y += display/
 162 	display/intel_atomic.o \
 163 	display/intel_atomic_plane.o \
 164 	display/intel_audio.o \
 165 	display/intel_bios.o \
 166 	display/intel_bw.o \
 167 	display/intel_cdclk.o \
 168 	display/intel_color.o \
 169 	display/intel_combo_phy.o \
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| D | i915_pci.c | 31 #include "display/intel_fbdev.h"151 	.display.has_overlay = 1, \
 152 	.display.cursor_needs_physical = 1, \
 153 	.display.overlay_needs_physical = 1, \
 154 	.display.has_gmch = 1, \
 169 	.display.has_overlay = 1, \
 170 	.display.overlay_needs_physical = 1, \
 171 	.display.has_gmch = 1, \
 196 	.display.has_fbc = 1,
 207 	.display.has_gmch = 1, \
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| /Linux-v5.4/drivers/media/platform/vsp1/ | 
| D | vsp1_dl.c | 3  * vsp1_dl.c  --  R-Car VSP1 Display List41  * struct vsp1_dl_ext_header - Extended display list header
 45  * @pre_ext_dl_plist: start address of pre-extended display list bodies
 47  * @post_ext_dl_plist: start address of post-extended display list bodies
 79  * struct vsp1_pre_ext_dl_body - Pre Extended Display List Body
 80  * @opcode: Extended display list command operation code
 93  * struct vsp1_dl_body - Display list body
 94  * @list: entry in the display list list of bodies
 121  * struct vsp1_dl_body_pool - display list body pool
 145  * struct vsp1_cmd_pool - Display List commands pool
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| /Linux-v5.4/Documentation/gpu/ | 
| D | amdgpu-dc.rst | 2 drm/amd/display - Display Core (DC)7 Because it is partially shared with other operating systems, the Display Core
 10 1. **Display Core (DC)** contains the OS-agnostic components. Things like
 12 2. **Display Manager (DM)** contains the OS-dependent components. Hooks to the
 24 ``Display Core initialized with <version number here>``
 26 AMDgpu Display Manager
 29 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
 32 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
 38 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
 41 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
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| D | i915.rst | 6 models) integrated GFX chipsets with both Intel display and rendering13 This section covers core driver infrastructure used by both the display
 67 Display Hardware Handling
 70 This section covers everything related to the display hardware including
 72 display, output probing and related topics.
 79 its own tailor-made infrastructure for executing a display configuration
 85 .. kernel-doc:: drivers/gpu/drm/i915/display/intel_frontbuffer.c
 88 .. kernel-doc:: drivers/gpu/drm/i915/display/intel_frontbuffer.h
 91 .. kernel-doc:: drivers/gpu/drm/i915/display/intel_frontbuffer.c
 94 Display FIFO Underrun Reporting
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| D | tegra.rst | 2  drm/tegra NVIDIA Tegra GPU and display driver5 NVIDIA Tegra SoCs support a set of display, graphics and video functions via
 21   - A KMS driver that supports the display controllers as well as a number of
 64 The display hardware has remained mostly backwards compatible over the various
 68 Display Controllers
 71 Tegra SoCs have two display controllers, each of which can be associated with
 72 zero or more outputs. Outputs can also share a single display controller, but
 73 only if they run with compatible display timings. Two display controllers can
 75 on two outputs don't match. A display controller is modelled as a CRTC in KMS
 78 On Tegra186, the number of display controllers has been increased to three. A
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| D | komeda-kms.rst | 4  drm/komeda Arm display driver7 The drm/komeda driver supports the Arm display processor D71 and later products,
 11 Overview of D71 like display IPs
 14 From D71, Arm display IP begins to adopt a flexible and modularized
 15 architecture. A display pipeline is made up of multiple individual and
 34 for layer scaling, or connected to compositor and scale the whole display
 40 Compositor blends multiple layers or pixel data flows into one single display
 44 the display frame first and and then write to memory.
 58 Final stage of display pipeline, Timing controller is not for the pixel
 59 handling, but only for controlling the display timing.
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| /Linux-v5.4/drivers/video/fbdev/omap2/omapfb/ | 
| D | omapfb-ioctl.c | 206 	struct omap_dss_device *display = fb2display(fbi);  in omapfb_setup_mem()  local216 	if (display && display->driver->sync)  in omapfb_setup_mem()
 217 		display->driver->sync(display);  in omapfb_setup_mem()
 281 	struct omap_dss_device *display = fb2display(fbi);  in omapfb_update_window()  local
 284 	if (!display)  in omapfb_update_window()
 290 	display->driver->get_resolution(display, &dw, &dh);  in omapfb_update_window()
 295 	return display->driver->update(display, x, y, w, h);  in omapfb_update_window()
 301 	struct omap_dss_device *display = fb2display(fbi);  in omapfb_set_update_mode()  local
 307 	if (!display)  in omapfb_set_update_mode()
 315 	d = get_display_data(fbdev, display);  in omapfb_set_update_mode()
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| /Linux-v5.4/Documentation/devicetree/bindings/display/ | 
| D | simple-framebuffer.yaml | 4 $id: http://devicetree.org/schemas/display/simple-framebuffer.yaml#15   the bootloader, with the assumption that the display hardware has
 23   If the devicetree contains nodes for the display hardware used by a
 25   display, which contains a phandle pointing to the primary display
 30   It is advised to add display# aliases to help the OS determine how
 31   to number things. If display# aliases are used, then if the simplefb
 32   node contains a display property then the /aliases/display# path
 33   must point to the display hw node the display property points to,
 38   to it, or to the primary display hw node, as with display#
 39   aliases. If display aliases are used then it should be set to the
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| D | cirrus,clps711x-fb.txt | 8 - display   : phandle to a display node as described in9               Documentation/devicetree/bindings/display/panel/display-timing.txt.
 10               Additionally, the display node has to define properties:
 25 		display = <&display>;
 28 	display: display {
 34 		display-timings {
 
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| D | mxsfb.txt | 22 	lcdif1: display-controller@2220000 {45 - display:	phandle to display node (see below for details)
 47 * display node
 54 - display-timings:	Refer to binding doc display-timing.txt for details.
 63 	display: display {
 67 		display-timings {
 
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| /Linux-v5.4/drivers/staging/fbtft/ | 
| D | fbtft-core.c | 262 			 "%s: start_line=%u is larger than end_line=%u. Shouldn't happen, will do full display update\n",  in fbtft_update_display()270 …"%s: start_line=%u or end_line=%u is larger than max=%d. Shouldn't happen, will do full display up…  in fbtft_update_display()
 289 			"%s: write_vmem failed to update display buffer\n",  in fbtft_update_display()
 306 			 "Display update: %ld kB/s, fps=%ld\n",  in fbtft_update_display()
 323 	/* Mark display lines/area as dirty */  in fbtft_mkdirty()
 331 	/* Schedule deferred_io to update display (no-op if already on queue)*/  in fbtft_mkdirty()
 347 	/* set display line markers as clean */  in fbtft_deferred_io()
 352 	/* Mark display lines as dirty */  in fbtft_deferred_io()
 530  * @display: pointer to structure describing the display
 545 struct fb_info *fbtft_framebuffer_alloc(struct fbtft_display *display,  in fbtft_framebuffer_alloc()  argument
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| D | fb_ssd1305.c | 46 	/* Set Display OFF */  in init_display()49 	/* Set Display Clock Divide Ratio/ Oscillator Frequency */  in init_display()
 60 	/* Set Display Offset */  in init_display()
 64 	/* Set Display Start Line */  in init_display()
 69 	/* A[2] = 1b, Enable charge pump during display on */  in init_display()
 104 	 * Entire Display ON  in init_display()
 105 	 * Resume to RAM content display. Output follows RAM content  in init_display()
 110 	 * Set Normal Display  in init_display()
 111 	 *  0 in RAM: OFF in display panel  in init_display()
 112 	 *  1 in RAM: ON in display panel  in init_display()
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| D | fbtft.h | 39  * @write_vmem: Writes video memory to display43  * @mkdirty: Marks display lines for update
 44  * @update_display: Updates the display
 45  * @init_display: Initializes the display
 46  * @blank: Blank the display (optional)
 88  * struct fbtft_display - Describes the display properties
 89  * @width: Width of display in pixels
 90  * @height: Height of display in pixels
 92  * @buswidth: Display interface bus width in bits
 124  * struct fbtft_platform_data - Passes display specific data to the driver
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| /Linux-v5.4/Documentation/devicetree/bindings/display/sunxi/ | 
| D | sun4i-drm.txt | 1 Allwinner A10 Display Pipeline4 The Allwinner A10 Display pipeline is composed of several components
 7 For all connections between components up to the TCONs in the display
 74 Documentation/devicetree/bindings/display/bridge/dw_hdmi.txt with the
 212 TCON TOPs main purpose is to configure whole display pipeline. It determines
 217 It allows display pipeline to be configured in very different ways:
 296 Display Engine Backend
 299 The display engine backend exposes layers and sprites to the
 304     * allwinner,sun4i-a10-display-backend
 305     * allwinner,sun5i-a13-display-backend
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| /Linux-v5.4/drivers/acpi/acpica/ | 
| D | utbuffer.c | 22  *              display             - BYTE, WORD, DWORD, or QWORD display:27  *              base_offset         - Beginning buffer offset (display only)
 34 void acpi_ut_dump_buffer(u8 *buffer, u32 count, u32 display, u32 base_offset)  in acpi_ut_dump_buffer()  argument
 47 		display = DB_BYTE_DISPLAY;  in acpi_ut_dump_buffer()
 65 				acpi_os_printf("%*s", ((display * 2) + 1), " ");  in acpi_ut_dump_buffer()
 66 				j += display;  in acpi_ut_dump_buffer()
 70 			switch (display) {  in acpi_ut_dump_buffer()
 72 			default:	/* Default is BYTE display */  in acpi_ut_dump_buffer()
 105 			j += display;  in acpi_ut_dump_buffer()
 150  *              display             - BYTE, WORD, DWORD, or QWORD display:
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| /Linux-v5.4/include/video/ | 
| D | s1d13xxxfb.h | 44 #define S1DREG_LCD_DISP_HWIDTH		0x0032	/* LCD Horizontal Display Width Register: ((val)+1)*8)=pix/l…45 #define S1DREG_LCD_NDISP_HPER		0x0034	/* LCD Horizontal Non-Display Period Register: ((val)+1)*8)=N…
 48 #define S1DREG_LCD_DISP_VHEIGHT0	0x0038	/* LCD Vertical Display Height Register 0 */
 49 #define S1DREG_LCD_DISP_VHEIGHT1	0x0039	/* LCD Vertical Display Height Register 1 */
 50 #define S1DREG_LCD_NDISP_VPER		0x003A	/* LCD Vertical Non-Display Period Register: (val)+1=NDlines …
 53 #define S1DREG_LCD_DISP_MODE		0x0040	/* LCD Display Mode Register */
 55 #define S1DREG_LCD_DISP_START0		0x0042	/* LCD Display Start Address Register 0 */
 56 #define S1DREG_LCD_DISP_START1		0x0043	/* LCD Display Start Address Register 1 */
 57 #define S1DREG_LCD_DISP_START2		0x0044	/* LCD Display Start Address Register 2 */
 61 #define S1DREG_LCD_DISP_FIFO_HTC	0x004A	/* LCD Display FIFO High Threshold Control Register */
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| /Linux-v5.4/drivers/gpu/drm/sun4i/ | 
| D | sun4i_drv.c | 49 	.desc			= "Allwinner sun4i Display Engine",156 	return of_device_is_compatible(node, "allwinner,sun4i-a10-display-frontend") ||  in sun4i_drv_node_is_frontend()
 157 		of_device_is_compatible(node, "allwinner,sun5i-a13-display-frontend") ||  in sun4i_drv_node_is_frontend()
 158 		of_device_is_compatible(node, "allwinner,sun6i-a31-display-frontend") ||  in sun4i_drv_node_is_frontend()
 159 		of_device_is_compatible(node, "allwinner,sun7i-a20-display-frontend") ||  in sun4i_drv_node_is_frontend()
 160 		of_device_is_compatible(node, "allwinner,sun8i-a23-display-frontend") ||  in sun4i_drv_node_is_frontend()
 161 		of_device_is_compatible(node, "allwinner,sun8i-a33-display-frontend") ||  in sun4i_drv_node_is_frontend()
 162 		of_device_is_compatible(node, "allwinner,sun9i-a80-display-frontend");  in sun4i_drv_node_is_frontend()
 223  * Also, in a dual display pipeline setup, both frontends can feed
 396 	{ .compatible = "allwinner,sun4i-a10-display-engine" },
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| /Linux-v5.4/Documentation/devicetree/bindings/display/imx/ | 
| D | ldb.txt | 1 Device-Tree bindings for LVDS Display Bridge (ldb)3 LVDS Display Bridge
 6 The LVDS Display Bridge device tree node contains up to two lvds-channel
 14                 multiplexer in the front to select any of the four IPU display
 20                         the display interface selector clocks, as described in
 48 or a display-timings node that describes the video timings for the connected
 49 LVDS display as well as the fsl,data-mapping and fsl,data-width properties.
 62    display-timings are used instead.
 64 Optional properties (required if display-timings are used):
 66  - display-timings : A node that describes the display timings as defined in
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| D | fsl-imx-drm.txt | 5 IPU or other display interface nodes that comprise the graphics subsystem.8 - compatible: Should be "fsl,imx-display-subsystem"
 9 - ports: Should contain a list of phandles pointing to display interface ports
 14 display-subsystem {
 15 	compatible = "fsl,display-subsystem";
 113 Parallel display support
 117 - compatible: Should be "fsl,imx-parallel-display"
 119 - interface-pix-fmt: How this display is connected to the
 120   display interface. Currently supported types: "rgb24", "rgb565", "bgr666"
 122 - edid: verbatim EDID data block describing attached display.
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| D | fsl,imx-fb.txt | 11 - display: Phandle to a display node as described in12 	Documentation/devicetree/bindings/display/panel/display-timing.txt
 13 	Additional, the display node has to define properties:
 16 	A display node may optionally define
 34 		display = <&display0>;
 44 		display-timings {
 
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| /Linux-v5.4/Documentation/devicetree/bindings/display/panel/ | 
| D | ilitek,ili9322.txt | 23   - pixelclk-active: see display/panel/display-timing.txt24   - de-active: see display/panel/display-timing.txt
 25   - hsync-active: see display/panel/display-timing.txt
 26   - vsync-active: see display/panel/display-timing.txt
 37 panel: display@0 {
 
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| D | panel-common.yaml | 4 $id: http://devicetree.org/schemas/display/panel/panel-common.yaml#7 title: Common Properties for Display Panels
 15   display panels. It doesn't constitue a device tree binding specification by
 50       Display rotation in degrees counter clockwise (0,90,180,270)
 55   # Display Timings
 59       Most display panels are restricted to a single resolution and
 60       require specific display timings. The panel-timing subnode expresses those
 61       timings as specified in the timing subnode section of the display timing
 63       Documentation/devicetree/bindings/display/panel/display-timing.txt.
 94   # Many display panels can be controlled through pins driven by GPIOs. The nature
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| /Linux-v5.4/Documentation/arm/omap/ | 
| D | dss.rst | 2 OMAP2/3 Display Subsystem7 TV-out and multiple display support, but there are lots of small improvements
 47 flexible way to enable non-common multi-display configuration. In addition to
 49 managers. These can be used when updating a display with CPU or system DMA.
 53 There exist several display technologies and standards that support audio as
 65 certain configurations audio is not supported (e.g., an HDMI display using a
 67 the current configuration of the display supports audio.
 70 parameters of the display. In order to make the function independent of any
 108 dynamic display architecture.
 135       the overlay is smaller than the display.
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| /Linux-v5.4/Documentation/devicetree/bindings/auxdisplay/ | 
| D | hit,hd44780.txt | 4 that can display one or more lines of text. It exposes an M6800 bus interface,18   - display-height-chars: Height of the display, in character cells,
 19   - display-width-chars: Width of the display, in character cells.
 28     with 1 or 2 lines, and display-width-chars for displays with more than 2
 43 		display-height-chars = <2>;
 44 		display-width-chars = <16>;
 
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