| /Linux-v6.1/Documentation/devicetree/bindings/clock/ |
| D | samsung,exynos5433-clock.yaml | 29 - samsung,exynos5433-cmu-top
31 - samsung,exynos5433-cmu-cpif
33 - samsung,exynos5433-cmu-mif
36 - samsung,exynos5433-cmu-peric
38 - samsung,exynos5433-cmu-peris
40 - samsung,exynos5433-cmu-fsys
41 - samsung,exynos5433-cmu-g2d
43 - samsung,exynos5433-cmu-disp
44 - samsung,exynos5433-cmu-aud
45 - samsung,exynos5433-cmu-bus0
[all …]
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| D | samsung,exynosautov9-clock.yaml | 17 Exynos Auto v9 clock controller is comprised of several CMU units, generating
18 clocks for different domains. Those CMU units are modeled as separate device
23 CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
35 - samsung,exynosautov9-cmu-top
36 - samsung,exynosautov9-cmu-busmc
37 - samsung,exynosautov9-cmu-core
38 - samsung,exynosautov9-cmu-fsys0
39 - samsung,exynosautov9-cmu-fsys1
40 - samsung,exynosautov9-cmu-fsys2
41 - samsung,exynosautov9-cmu-peric0
[all …]
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| D | samsung,exynos850-clock.yaml | 17 Exynos850 clock controller is comprised of several CMU units, generating
18 clocks for different domains. Those CMU units are modeled as separate device
23 CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
34 - samsung,exynos850-cmu-top
35 - samsung,exynos850-cmu-apm
36 - samsung,exynos850-cmu-aud
37 - samsung,exynos850-cmu-cmgp
38 - samsung,exynos850-cmu-core
39 - samsung,exynos850-cmu-dpu
40 - samsung,exynos850-cmu-hsi
[all …]
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| D | actions,owl-cmu.txt | 1 * Actions Semi Owl Clock Management Unit (CMU)
10 "actions,s900-cmu"
11 "actions,s700-cmu"
12 "actions,s500-cmu"
23 dt-bindings/clock/actions,s900-cmu.h or actions,s700-cmu.h or
24 actions,s500-cmu.h header and can be used in device tree sources.
31 Actions Semi S900 CMU also requires one more clock:
36 cmu: clock-controller@e0160000 {
37 compatible = "actions,s900-cmu";
51 clocks = <&cmu CLK_UART5>;
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| D | samsung,exynos7885-clock.yaml | 17 Exynos7885 clock controller is comprised of several CMU units, generating
18 clocks for different domains. Those CMU units are modeled as separate device
23 CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
34 - samsung,exynos7885-cmu-top
35 - samsung,exynos7885-cmu-core
36 - samsung,exynos7885-cmu-fsys
37 - samsung,exynos7885-cmu-peri
58 const: samsung,exynos7885-cmu-top
74 const: samsung,exynos7885-cmu-core
96 const: samsung,exynos7885-cmu-fsys
[all …]
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| D | samsung,exynos-clock.yaml | 23 - samsung,exynos3250-cmu
24 - samsung,exynos3250-cmu-dmc
25 - samsung,exynos3250-cmu-isp
|
| D | tesla,fsd-clock.yaml | 15 (CMU), which generates clocks for various inteernal SoC blocks.
24 - tesla,fsd-clock-cmu
51 const: tesla,fsd-clock-cmu
|
| /Linux-v6.1/drivers/clk/samsung/ |
| D | clk-exynos-arm64.c | 26 * @np: CMU device tree node with "reg" property (CMU addr)
60 * exynos_arm64_register_cmu - Register specified Exynos CMU domain
63 * @np: CMU device tree node
64 * @cmu: CMU data
66 * Register specified CMU domain, which includes next steps:
68 * 1. Enable parent clock of @cmu CMU
69 * 2. Set initial registers configuration for @cmu CMU clocks
70 * 3. Register @cmu CMU clocks using Samsung clock framework API
73 struct device_node *np, const struct samsung_cmu_info *cmu) in exynos_arm64_register_cmu() argument
75 /* Keep CMU parent clock running (needed for CMU registers access) */ in exynos_arm64_register_cmu()
[all …]
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| D | clk.c | 329 * for each CMU. It also add CMU register list to register cache.
333 const struct samsung_cmu_info *cmu) in samsung_cmu_register_one() argument
344 ctx = samsung_clk_init(np, reg_base, cmu->nr_clk_ids); in samsung_cmu_register_one()
346 if (cmu->pll_clks) in samsung_cmu_register_one()
347 samsung_clk_register_pll(ctx, cmu->pll_clks, cmu->nr_pll_clks, in samsung_cmu_register_one()
349 if (cmu->mux_clks) in samsung_cmu_register_one()
350 samsung_clk_register_mux(ctx, cmu->mux_clks, in samsung_cmu_register_one()
351 cmu->nr_mux_clks); in samsung_cmu_register_one()
352 if (cmu->div_clks) in samsung_cmu_register_one()
353 samsung_clk_register_div(ctx, cmu->div_clks, cmu->nr_div_clks); in samsung_cmu_register_one()
[all …]
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| D | clk-exynos5-subcmu.c | 17 static const struct exynos5_subcmu_info **cmu; variable
48 * Pass the needed clock provider context and register sub-CMU clocks
62 cmu = _cmu; in exynos5_subcmus_init()
166 if (strcmp(cmu[i]->pd_name, name) == 0) in exynos5_clk_probe()
168 cmu[i], np); in exynos5_clk_probe()
|
| /Linux-v6.1/arch/arm/boot/dts/ |
| D | exynos3250.dtsi | 69 clocks = <&cmu CLK_ARM_CLK>;
92 clocks = <&cmu CLK_ARM_CLK>;
179 clocks = <&cmu CLK_FIN_PLL>;
224 cmu: clock-controller@10030000 { label
225 compatible = "samsung,exynos3250-cmu";
228 assigned-clocks = <&cmu CLK_MOUT_ACLK_400_MCUISP_SUB>,
229 <&cmu CLK_MOUT_ACLK_266_SUB>;
230 assigned-clock-parents = <&cmu CLK_FIN_PLL>,
231 <&cmu CLK_FIN_PLL>;
235 compatible = "samsung,exynos3250-cmu-dmc";
[all …]
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| D | owl-s500.dtsi | 8 #include <dt-bindings/clock/actions,s500-cmu.h>
136 clocks = <&cmu CLK_UART0>;
144 clocks = <&cmu CLK_UART1>;
152 clocks = <&cmu CLK_UART2>;
160 clocks = <&cmu CLK_UART3>;
168 clocks = <&cmu CLK_UART4>;
176 clocks = <&cmu CLK_UART5>;
184 clocks = <&cmu CLK_UART6>;
188 cmu: clock-controller@b0160000 { label
189 compatible = "actions,s500-cmu";
[all …]
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| D | exynos3250-artik5-eval.dts | 45 assigned-clocks = <&cmu CLK_MOUT_SPI0>, <&cmu CLK_DIV_SPI0>,
46 <&cmu CLK_DIV_SPI0_PRE>, <&cmu CLK_SCLK_SPI0>;
47 assigned-clock-parents = <&cmu CLK_DIV_MPLL_PRE>, /* for: CLK_MOUT_SPI0 */
48 <&cmu CLK_MOUT_SPI0>, /* for: CLK_DIV_SPI0 */
49 <&cmu CLK_DIV_SPI0>, /* for: CLK_DIV_SPI0_PRE */
50 <&cmu CLK_DIV_SPI0_PRE>; /* for: CLK_SCLK_SPI0 */
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| D | exynos3250-artik5.dtsi | 54 assigned-clocks = <&cmu CLK_SCLK_TSADC>;
58 &cmu {
398 clocks = <&cmu CLK_RTC>, <&s2mps14_osc S2MPS11_CLK_AP>;
404 assigned-clocks = <&cmu CLK_SCLK_UART0>;
|
| /Linux-v6.1/arch/arm64/boot/dts/actions/ |
| D | s900.dtsi | 6 #include <dt-bindings/clock/actions,s900-cmu.h>
125 clocks = <&cmu CLK_UART0>;
133 clocks = <&cmu CLK_UART1>;
141 clocks = <&cmu CLK_UART2>;
149 clocks = <&cmu CLK_UART3>;
157 clocks = <&cmu CLK_UART4>;
165 clocks = <&cmu CLK_UART5>;
173 clocks = <&cmu CLK_UART6>;
184 cmu: clock-controller@e0160000 { label
185 compatible = "actions,s900-cmu";
[all …]
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| D | s700.dtsi | 6 #include <dt-bindings/clock/actions,s700-cmu.h>
119 clocks = <&cmu CLK_UART0>;
127 clocks = <&cmu CLK_UART1>;
135 clocks = <&cmu CLK_UART2>;
143 clocks = <&cmu CLK_UART3>;
151 clocks = <&cmu CLK_UART4>;
159 clocks = <&cmu CLK_UART5>;
167 clocks = <&cmu CLK_UART6>;
172 cmu: clock-controller@e0168000 { label
173 compatible = "actions,s700-cmu";
[all …]
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| /Linux-v6.1/Documentation/devicetree/bindings/net/ |
| D | actions,owl-emac.yaml | 72 #include <dt-bindings/clock/actions,s500-cmu.h>
80 clocks = <&cmu 59 /*CLK_ETHERNET*/>, <&cmu CLK_RMII_REF>;
82 resets = <&cmu RESET_ETHERNET>;
|
| /Linux-v6.1/include/dt-bindings/clock/ |
| D | exynos3250.h | 22 * Main CMU
260 * Total number of clocks of main CMU.
266 * CMU DMC
287 * Total number of clocks of main CMU.
293 * CMU ISP
|
| /Linux-v6.1/arch/arm64/boot/dts/exynos/ |
| D | exynos850.dtsi | 237 compatible = "samsung,exynos850-cmu-peri";
249 compatible = "samsung,exynos850-cmu-apm";
258 compatible = "samsung,exynos850-cmu-cmgp";
267 compatible = "samsung,exynos850-cmu-core";
281 compatible = "samsung,exynos850-cmu-top";
290 compatible = "samsung,exynos850-cmu-mfcmscl";
305 compatible = "samsung,exynos850-cmu-dpu";
314 compatible = "samsung,exynos850-cmu-hsi";
327 compatible = "samsung,exynos850-cmu-is";
341 compatible = "samsung,exynos850-cmu-aud";
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| D | exynos5433.dtsi | 373 compatible = "samsung,exynos5433-cmu-top";
388 compatible = "samsung,exynos5433-cmu-cpif";
397 compatible = "samsung,exynos5433-cmu-mif";
408 compatible = "samsung,exynos5433-cmu-peric";
414 compatible = "samsung,exynos5433-cmu-peris";
420 compatible = "samsung,exynos5433-cmu-fsys";
447 compatible = "samsung,exynos5433-cmu-g2d";
461 compatible = "samsung,exynos5433-cmu-disp";
487 compatible = "samsung,exynos5433-cmu-aud";
496 compatible = "samsung,exynos5433-cmu-bus0";
[all …]
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| D | exynos7885.dtsi | 193 compatible = "samsung,exynos7885-cmu-peri";
220 compatible = "samsung,exynos7885-cmu-core";
235 compatible = "samsung,exynos7885-cmu-top";
244 compatible = "samsung,exynos7885-cmu-fsys";
|
| /Linux-v6.1/Documentation/devicetree/bindings/mmc/ |
| D | owl-mmc.yaml | 60 clocks = <&cmu 56>;
61 resets = <&cmu 23>;
|
| /Linux-v6.1/Documentation/devicetree/bindings/i2c/ |
| D | i2c-owl.yaml | 52 #include <dt-bindings/clock/actions,s900-cmu.h>
58 clocks = <&cmu CLK_I2C0>;
|
| /Linux-v6.1/arch/powerpc/platforms/44x/ |
| D | fsp2.c | 32 #define FSP2_CMU_ERR "ibm,cmu-error-irq"
132 pr_err("CMU Error\n"); in cmu_err_handler()
134 panic("CMU Error\n"); in cmu_err_handler()
260 * recorded in the CMU FIR and leading to erroneous interrupt requests in fsp2_probe()
261 * once the CMU interrupt is unmasked. in fsp2_probe()
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| /Linux-v6.1/Documentation/devicetree/bindings/iio/adc/ |
| D | samsung,exynos-adc.yaml | 157 clocks = <&cmu CLK_TSADC>,
158 <&cmu CLK_SCLK_TSADC>;
|
