Lines Matching full:cmu
69 clocks = <&cmu CLK_ARM_CLK>;
92 clocks = <&cmu CLK_ARM_CLK>;
179 clocks = <&cmu CLK_FIN_PLL>;
224 cmu: clock-controller@10030000 { label
225 compatible = "samsung,exynos3250-cmu";
228 assigned-clocks = <&cmu CLK_MOUT_ACLK_400_MCUISP_SUB>,
229 <&cmu CLK_MOUT_ACLK_266_SUB>;
230 assigned-clock-parents = <&cmu CLK_FIN_PLL>,
231 <&cmu CLK_FIN_PLL>;
235 compatible = "samsung,exynos3250-cmu-dmc";
253 clocks = <&cmu CLK_TMU_APBIF>;
283 clocks = <&cmu CLK_FIN_PLL>, <&cmu CLK_MCT>;
308 clocks = <&cmu CLK_JPEG>, <&cmu CLK_SCLK_JPEG>;
311 assigned-clocks = <&cmu CLK_MOUT_CAM_BLK>, <&cmu CLK_SCLK_JPEG>;
313 assigned-clock-parents = <&cmu CLK_DIV_MPLL_PRE>;
323 clocks = <&cmu CLK_SMMUJPEG>, <&cmu CLK_JPEG>;
335 clocks = <&cmu CLK_SCLK_FIMD0>, <&cmu CLK_FIMD0>;
351 clocks = <&cmu CLK_DSIM0>, <&cmu CLK_SCLK_MIPI0>;
363 clocks = <&cmu CLK_SMMUFIMD0>, <&cmu CLK_FIMD0>;
372 clocks = <&cmu CLK_USBOTG>;
383 clocks = <&cmu CLK_SDMMC0>, <&cmu CLK_SCLK_MMC0>;
395 clocks = <&cmu CLK_SDMMC1>, <&cmu CLK_SCLK_MMC1>;
407 clocks = <&cmu CLK_SDMMC2>, <&cmu CLK_SCLK_MMC2>;
419 clocks = <&cmu CLK_USBOTG>, <&cmu CLK_SCLK_UPLL>;
429 clocks = <&cmu CLK_PDMA0>;
438 clocks = <&cmu CLK_PDMA1>;
448 clocks = <&cmu CLK_TSADC>, <&cmu CLK_SCLK_TSADC>;
479 clocks = <&cmu CLK_G3D>,
480 <&cmu CLK_SCLK_G3D>;
492 clocks = <&cmu CLK_MFC>, <&cmu CLK_SCLK_MFC>;
502 clocks = <&cmu CLK_SMMUMFC_L>, <&cmu CLK_MFC>;
511 clocks = <&cmu CLK_UART0>, <&cmu CLK_SCLK_UART0>;
522 clocks = <&cmu CLK_UART1>, <&cmu CLK_SCLK_UART1>;
533 clocks = <&cmu CLK_UART2>, <&cmu CLK_SCLK_UART2>;
546 clocks = <&cmu CLK_I2C0>;
559 clocks = <&cmu CLK_I2C1>;
572 clocks = <&cmu CLK_I2C2>;
585 clocks = <&cmu CLK_I2C3>;
598 clocks = <&cmu CLK_I2C4>;
611 clocks = <&cmu CLK_I2C5>;
624 clocks = <&cmu CLK_I2C6>;
637 clocks = <&cmu CLK_I2C7>;
652 clocks = <&cmu CLK_SPI0>, <&cmu CLK_SCLK_SPI0>;
668 clocks = <&cmu CLK_SPI1>, <&cmu CLK_SCLK_SPI1>;
680 clocks = <&cmu CLK_I2S>, <&cmu CLK_SCLK_I2S>;
722 clocks = <&cmu CLK_PPMURIGHT>;
730 clocks = <&cmu CLK_PPMULEFT>;
738 clocks = <&cmu CLK_PPMUCAMIF>;
746 clocks = <&cmu CLK_PPMULCD0>;
754 clocks = <&cmu CLK_PPMUFILE>;
762 clocks = <&cmu CLK_PPMUG3D>;
770 clocks = <&cmu CLK_PPMUMFC_L>;
810 clocks = <&cmu CLK_DIV_GDL>;
818 clocks = <&cmu CLK_DIV_GDR>;
826 clocks = <&cmu CLK_DIV_ACLK_160>;
834 clocks = <&cmu CLK_DIV_ACLK_200>;
842 clocks = <&cmu CLK_DIV_ACLK_400_MCUISP>;
850 clocks = <&cmu CLK_DIV_ACLK_266>;
858 clocks = <&cmu CLK_DIV_ACLK_100>;
866 clocks = <&cmu CLK_SCLK_MFC>;