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Searched full:clk_top_msdc50_2_h_sel (Results 1 – 4 of 4) sorted by relevance

/Linux-v6.1/include/dt-bindings/clock/
Dmt8173-clk.h127 #define CLK_TOP_MSDC50_2_H_SEL 117 macro
/Linux-v6.1/Documentation/devicetree/bindings/mmc/
Dmtk-sd.yaml235 <&topckgen CLK_TOP_MSDC50_2_H_SEL>;
/Linux-v6.1/drivers/clk/mediatek/
Dclk-mt8173.c591 MUX_GATE(CLK_TOP_MSDC50_2_H_SEL, "msdc50_2_h_sel", msdc50_2_h_parents, 0x00d0, 0, 3, 7),
/Linux-v6.1/arch/arm64/boot/dts/mediatek/
Dmt8173.dtsi919 <&topckgen CLK_TOP_MSDC50_2_H_SEL>;