Searched full:clk_top_msdc50_0_h_sel (Results 1 – 9 of 9) sorted by relevance
| /Linux-v6.6/include/dt-bindings/clock/ |
| D | mediatek,mt6795-clk.h | 103 #define CLK_TOP_MSDC50_0_H_SEL 92 macro
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| D | mt8173-clk.h | 105 #define CLK_TOP_MSDC50_0_H_SEL 95 macro
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| D | mt8192-clk.h | 35 #define CLK_TOP_MSDC50_0_H_SEL 23 macro
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| /Linux-v6.6/Documentation/devicetree/bindings/mmc/ |
| D | mtk-sd.yaml | 319 <&topckgen CLK_TOP_MSDC50_0_H_SEL>;
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| /Linux-v6.6/drivers/clk/mediatek/ |
| D | clk-mt6795-topckgen.c | 471 TOP_MUX_GATE(CLK_TOP_MSDC50_0_H_SEL, "msdc50_0_h_sel", msdc50_0_h_parents,
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| D | clk-mt8173-topckgen.c | 550 MUX_GATE_FLAGS(CLK_TOP_MSDC50_0_H_SEL, "msdc50_0_h_sel", msdc50_0_h_parents,
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| D | clk-mt8192.c | 602 MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_MSDC50_0_H_SEL, "msdc50_0_h_sel",
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| /Linux-v6.6/arch/arm64/boot/dts/mediatek/ |
| D | mt6795.dtsi | 644 <&topckgen CLK_TOP_MSDC50_0_H_SEL>,
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| D | mt8173.dtsi | 888 <&topckgen CLK_TOP_MSDC50_0_H_SEL>;
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