Searched full:clk_top_cci400_sel (Results 1 – 8 of 8) sorted by relevance
/Linux-v6.1/Documentation/devicetree/bindings/media/ |
D | mediatek,vcodec-decoder.yaml | 144 <&topckgen CLK_TOP_CCI400_SEL>, 159 <&topckgen CLK_TOP_CCI400_SEL>,
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/Linux-v6.1/include/dt-bindings/clock/ |
D | mediatek,mt6795-clk.h | 115 #define CLK_TOP_CCI400_SEL 104 macro
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D | mt8173-clk.h | 118 #define CLK_TOP_CCI400_SEL 108 macro
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D | mt2712-clk.h | 155 #define CLK_TOP_CCI400_SEL 124 macro
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/Linux-v6.1/drivers/clk/mediatek/ |
D | clk-mt8173.c | 579 MUX_GATE(CLK_TOP_CCI400_SEL, "cci400_sel", cci400_parents, 0x00a0, 16, 3, 23), 852 clk_prepare_enable(mt8173_top_clk_data->hws[CLK_TOP_CCI400_SEL]->clk); in mtk_clk_enable_critical()
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D | clk-mt6795-topckgen.c | 492 TOP_MUX_GATE(CLK_TOP_CCI400_SEL, "cci400_sel", cci400_parents,
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D | clk-mt2712.c | 795 MUX_GATE(CLK_TOP_CCI400_SEL, "cci400_sel",
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/Linux-v6.1/arch/arm64/boot/dts/mediatek/ |
D | mt8173.dtsi | 1399 <&topckgen CLK_TOP_CCI400_SEL>, 1414 <&topckgen CLK_TOP_CCI400_SEL>,
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