Searched full:agilex (Results 1 – 12 of 12) sorted by relevance
| /Linux-v5.10/Documentation/devicetree/bindings/clock/ |
| D | intel,agilex.yaml | 4 $id: http://devicetree.org/schemas/clock/intel,agilex.yaml#
7 title: Intel SoCFPGA Agilex platform clock controller binding
13 The Intel Agilex Clock controller is an integrated clock controller, which
18 const: intel,agilex-clkmgr
41 compatible = "intel,agilex-clkmgr";
|
| /Linux-v5.10/Documentation/devicetree/bindings/net/ |
| D | socfpga-dwmac.txt | 10 "altr,socfpga-stmmac". For Arria10/Agilex/Stratix10 SoCs
17 on the Arria10/Stratix10/Agilex platforms, the register shift represents
|
| /Linux-v5.10/Documentation/devicetree/bindings/fpga/ |
| D | intel-stratix10-soc-fpga-mgr.txt | 8 "intel,agilex-soc-fpga-mgr"
|
| /Linux-v5.10/arch/arm64/ |
| D | Kconfig.platforms | 12 bool "Intel's Agilex SoCFPGA Family"
14 This enables support for Intel's Agilex SoCFPGA Family.
|
| /Linux-v5.10/arch/arm64/boot/dts/intel/ |
| D | socfpga_agilex.dtsi | 9 #include <dt-bindings/clock/agilex-clock.h>
12 compatible = "intel,socfpga-agilex";
106 compatible = "intel,agilex-clkmgr";
621 compatible = "intel,agilex-svc";
626 compatible = "intel,agilex-soc-fpga-mgr";
|
| D | socfpga_agilex_socdk_nand.dts | 8 model = "SoCFPGA Agilex SoCDK";
|
| D | socfpga_agilex_socdk.dts | 8 model = "SoCFPGA Agilex SoCDK";
|
| /Linux-v5.10/drivers/clk/socfpga/ |
| D | Makefile | 6 obj-$(CONFIG_ARCH_AGILEX) += clk-agilex.o
|
| D | clk-agilex.c | 11 #include <dt-bindings/clock/agilex-clock.h>
427 { .compatible = "intel,agilex-clkmgr",
435 .name = "agilex-clkmgr",
|
| /Linux-v5.10/Documentation/devicetree/bindings/firmware/ |
| D | intel,stratix10-svc.txt | 26 - compatible: "intel,stratix10-svc" or "intel,agilex-svc"
|
| /Linux-v5.10/drivers/fpga/ |
| D | stratix10-soc.c | 464 {.compatible = "intel,agilex-soc-fpga-mgr"},
|
| /Linux-v5.10/drivers/firmware/ |
| D | stratix10-svc.c | 960 {.compatible = "intel,agilex-svc"},
|
