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/Linux-v6.1/Documentation/PCI/endpoint/
Dpci-test-howto.rst22 51000000.pcie_ep
27 51000000.pcie_ep
95 # ln -s functions/pci_epf_test/func1 controllers/51000000.pcie_ep/
107 # echo 1 > controllers/51000000.pcie_ep/start
/Linux-v6.1/arch/arm/boot/dts/
Dtegra30-asus-tf201.dts126 timing-51000000 {
127 clock-frequency = <51000000>;
181 timing-51000000 {
182 clock-frequency = <51000000>;
263 timing-51000000 {
264 clock-frequency = <51000000>;
444 timing-51000000 {
445 clock-frequency = <51000000>;
Dtegra30-asus-tf300t.dts160 timing-51000000 {
161 clock-frequency = <51000000>;
225 timing-51000000 {
226 clock-frequency = <51000000>;
290 timing-51000000 {
291 clock-frequency = <51000000>;
383 timing-51000000 {
384 clock-frequency = <51000000>;
601 timing-51000000 {
602 clock-frequency = <51000000>;
[all …]
Dtegra30-asus-tf300tg.dts234 timing-51000000 {
235 clock-frequency = <51000000>;
299 timing-51000000 {
300 clock-frequency = <51000000>;
364 timing-51000000 {
365 clock-frequency = <51000000>;
457 timing-51000000 {
458 clock-frequency = <51000000>;
675 timing-51000000 {
676 clock-frequency = <51000000>;
[all …]
Dtegra30-cpu-opp-microvolt.dtsi5 opp-51000000-800 {
9 opp-51000000-850 {
13 opp-51000000-912 {
Dtegra30-asus-tf700t.dts155 timing-51000000 {
156 clock-frequency = <51000000>;
220 timing-51000000 {
221 clock-frequency = <51000000>;
313 timing-51000000 {
314 clock-frequency = <51000000>;
531 timing-51000000 {
532 clock-frequency = <51000000>;
Dtegra30-cpu-opp.dtsi8 opp-51000000-800 {
11 opp-hz = /bits/ 64 <51000000>;
14 opp-51000000-850 {
17 opp-hz = /bits/ 64 <51000000>;
20 opp-51000000-912 {
23 opp-hz = /bits/ 64 <51000000>;
Dtegra30-pegatron-chagall.dts1540 timing-51000000 {
1541 clock-frequency = <51000000>;
1595 timing-51000000 {
1596 clock-frequency = <51000000>;
1650 timing-51000000 {
1651 clock-frequency = <51000000>;
1705 timing-51000000 {
1706 clock-frequency = <51000000>;
1788 timing-51000000 {
1789 clock-frequency = <51000000>;
[all …]
Dtegra30-peripherals-opp.dtsi120 opp-51000000-950 {
122 opp-hz = /bits/ 64 <51000000>;
127 opp-51000000-1000 {
129 opp-hz = /bits/ 64 <51000000>;
134 opp-51000000-1250 {
136 opp-hz = /bits/ 64 <51000000>;
396 opp-51000000 {
397 opp-hz = /bits/ 64 <51000000>;
1108 opp-51000000-950 {
1110 opp-hz = /bits/ 64 <51000000>;
Dtegra30-asus-nexus7-grouper-memory-timings.dtsi33 timing-51000000 {
34 clock-frequency = <51000000>;
187 timing-51000000 {
188 clock-frequency = <51000000>;
422 timing-51000000 {
423 clock-frequency = <51000000>;
1047 timing-51000000 {
1048 clock-frequency = <51000000>;
Ds3c24xx.dtsi42 timer: pwm@51000000 {
Dtegra30-ouya.dts2225 timing-51000000 {
2226 clock-frequency = <51000000>;
2373 timing-51000000 {
2374 clock-frequency = <51000000>;
2521 timing-51000000 {
2522 clock-frequency = <51000000>;
2749 timing-51000000 {
2750 clock-frequency = <51000000>;
3362 timing-51000000 {
3363 clock-frequency = <51000000>;
[all …]
Dlpc4357-myd-lpc4357.dts574 spi-max-frequency = <51000000>;
Ddra7.dtsi185 axi0: target-module@51000000 {
203 pcie1_rc: pcie@51000000 {
235 pcie1_ep: pcie_ep@51000000 {
Ds5pv210-aries.dtsi43 mfc_right: region@51000000 {
/Linux-v6.1/Documentation/devicetree/bindings/media/
Ds5p-mfc.txt59 mfc_left: region@51000000 {
/Linux-v6.1/arch/arm/mach-s3c/
Dpll-s3c2410.c26 { .frequency = 51000000, .driver_data = PLLVAL(161, 3, 3), },
/Linux-v6.1/Documentation/devicetree/bindings/pci/
Dti-pci.txt76 pcie@51000000 {
/Linux-v6.1/Documentation/devicetree/bindings/firmware/
Darm,scmi.yaml417 sram@51000000 {
/Linux-v6.1/drivers/clk/tegra/
Dclk-tegra124.c1307 { TEGRA124_CLK_DFLL_SOC, TEGRA124_CLK_PLL_P, 51000000, 1 },
1308 { TEGRA124_CLK_DFLL_REF, TEGRA124_CLK_PLL_P, 51000000, 1 },
1339 { TEGRA124_CLK_SOC_THERM, TEGRA124_CLK_PLL_P, 51000000, 0 },
1349 { TEGRA124_CLK_SOC_THERM, TEGRA124_CLK_PLL_P, 51000000, 1 },
Dclk-tegra114.c1147 { TEGRA114_CLK_DFLL_SOC, TEGRA114_CLK_PLL_P, 51000000, 1 },
1148 { TEGRA114_CLK_DFLL_REF, TEGRA114_CLK_PLL_P, 51000000, 1 },
Dclk-tegra210.c3562 { TEGRA210_CLK_DFLL_SOC, TEGRA210_CLK_PLL_P, 51000000, 1 },
3563 { TEGRA210_CLK_DFLL_REF, TEGRA210_CLK_PLL_P, 51000000, 1 },
3588 { TEGRA210_CLK_SOC_THERM, TEGRA210_CLK_PLL_P, 51000000, 0 },
3598 { TEGRA210_CLK_HDA, TEGRA210_CLK_PLL_P, 51000000, 0 },
Dclk-dfll.c200 #define REF_CLOCK_RATE 51000000UL
/Linux-v6.1/drivers/media/dvb-frontends/
Dtda18271c2dd_maps.h51 { 51000000, 0x20 },