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/Linux-v6.6/drivers/gpu/drm/i915/display/
Dintel_qp_tables.c1 // SPDX-License-Identifier: MIT
46 { 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0,
48 { 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0,
50 { 5, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1,
52 { 5, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1,
54 { 5, 5, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1,
56 { 5, 5, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2,
58 { 5, 5, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2,
60 { 6, 5, 5, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
61 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 0, 0, 0 },
[all …]
/Linux-v6.6/arch/powerpc/crypto/
Dchacha-p10le-8x.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 # Copyright 2023- IBM Corp. All rights reserved
16 # 3. a += b; d ^= a; d <<<= 8;
43 #include <asm/asm-offsets.h>
44 #include <asm/asm-compat.h>
81 stdu 1,-752(1)
102 addi 9, 1, 256
103 SAVE_VRS 20, 0, 9
104 SAVE_VRS 21, 16, 9
105 SAVE_VRS 22, 32, 9
[all …]
Dpoly1305-p10le_64.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 # Copyright 2023- IBM Corp. All rights reserved
10 # Poly1305 - this version mainly using vector/VSX/Scalar
11 # - 26 bits limbs
12 # - Handle multiple 64 byte blcok.
17 # p = 2^130 - 5
25 # 07/22/21 - this revison based on the above sum of products. Setup r^4, r^3, r^2, r and s3, s2, …
26 # to 9 vectors for multiplications.
28 # setup r^4, r^3, r^2, r vectors
29 # vs [r^1, r^3, r^2, r^4]
[all …]
Daes-gcm-p10.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 # Accelerated AES-GCM stitched implementation for ppc64le.
5 # Copyright 2022- IBM Inc. All rights reserved
14 # X1 * H^4 + X2 * H^3 + x3 * H^2 + X4 * H =
22 # Hash keys = v3 - v14
25 # ( H^3.l, H^3, H^3.h)
29 # v31 - counter 1
32 # vs0 - vs14 for round keys
35 # This implementation uses stitched AES-GCM approach to improve overall performance.
48 # v15 - v18 - input states
[all …]
/Linux-v6.6/arch/arm64/include/asm/
Dsysreg.h1 /* SPDX-License-Identifier: GPL-2.0-only */
14 #include <linux/kasan-tags.h>
16 #include <asm/gpr-num.h>
22 * [20-19] : Op0
23 * [18-16] : Op1
24 * [15-12] : CRn
25 * [11-8] : CRm
26 * [7-5] : Op2
83 * As per Arm ARM for v8-A, Section "C.5.1.3 op0 == 0b00, architectural hints,
96 #define PSTATE_UAO pstate_field(0, 3)
[all …]
/Linux-v6.6/drivers/net/wireless/broadcom/brcm80211/brcmsmac/
Drate.c29 /* 0 1 2 3 4 5 6 7 8 9 */
46 {6500, 13500, CEIL(6500 * 10, 9), CEIL(13500 * 10, 9), 0x00,
49 {13000, 27000, CEIL(13000 * 10, 9), CEIL(27000 * 10, 9), 0x08,
51 /* MCS 2: SS 1, MOD: QPSK, CR 3/4 */
52 {19500, 40500, CEIL(19500 * 10, 9), CEIL(40500 * 10, 9), 0x0A,
54 /* MCS 3: SS 1, MOD: 16QAM, CR 1/2 */
55 {26000, 54000, CEIL(26000 * 10, 9), CEIL(54000 * 10, 9), 0x10,
57 /* MCS 4: SS 1, MOD: 16QAM, CR 3/4 */
58 {39000, 81000, CEIL(39000 * 10, 9), CEIL(81000 * 10, 9), 0x12,
60 /* MCS 5: SS 1, MOD: 64QAM, CR 2/3 */
[all …]
/Linux-v6.6/include/dt-bindings/memory/
Dmt8195-memory-port.h1 /* SPDX-License-Identifier: GPL-2.0-only */
9 #include <dt-bindings/memory/mtk-memory-port.h>
20 * modules dma-address-region larbs-ports
21 * disp 0 ~ 4G larb0/1/2/3
26 * CCU1 0x24400_0000 ~ 0x247ff_ffff larb18: port 2/3
29 * iommu-vdo: larb0/2/5/7/9/10/11/13/17/19/21/24/25/28
30 * iommu-vpp: larb1/3/4/6/8/12/14/16/18/20/22/23/26/27
38 #define M4U_PORT_L0_DISP_OVL0_RDMA1 MTK_M4U_ID(0, 3)
46 #define M4U_PORT_L1_DISP_OVL0_RDMA1 MTK_M4U_ID(1, 3)
54 #define M4U_PORT_L2_MDP_RDMA6 MTK_M4U_ID(2, 3)
[all …]
Dmt8186-memory-port.h1 /* SPDX-License-Identifier: GPL-2.0-only */
11 #include <dt-bindings/memory/mtk-memory-port.h>
22 * modules dma-address-region larbs-ports
27 * CCU0 0x24000_0000 ~ 0x243ff_ffff larb13: port 9/10
32 /* LARB 0 -- MMSYS */
36 #define IOMMU_PORT_L0_DISP_FAKE0 MTK_M4U_ID(0, 3)
38 /* LARB 1 -- MMSYS */
42 #define IOMMU_PORT_L1_DISP_WDMA0 MTK_M4U_ID(1, 3)
45 /* LARB 2 -- MMSYS */
49 #define IOMMU_PORT_L2_MDP_WROT1 MTK_M4U_ID(2, 3)
[all …]
Dmt8192-larb-port.h1 /* SPDX-License-Identifier: GPL-2.0-only */
11 #include <dt-bindings/memory/mtk-memory-port.h>
18 * modules dma-address-region larbs-ports
21 * cam/mdp 8G ~ 12G larb2/9/11/13/14/16/17/18/19/20
22 * CCU0 0x4000_0000 ~ 0x43ff_ffff larb13: port 9/10
32 #define M4U_PORT_L0_DISP_RDMA0 MTK_M4U_ID(0, 3)
40 #define M4U_PORT_L1_OVL_2L_RDMA2 MTK_M4U_ID(1, 3)
50 #define M4U_PORT_L2_MDP_WROT1 MTK_M4U_ID(2, 3)
59 #define M4U_PORT_L4_VDEC_PRED_RD_EXT MTK_M4U_ID(4, 3)
65 #define M4U_PORT_L4_VDEC_AVC_MV_EXT MTK_M4U_ID(4, 9)
[all …]
/Linux-v6.6/drivers/staging/media/ipu3/
Dipu3-tables.c1 // SPDX-License-Identifier: GPL-2.0
4 #include "ipu3-tables.h"
24 .even = { { 0, 3, 122, 7, 3, 0, 0 },
25 { 0, 0, 122, 7, 7, -1, 0 },
26 { 0, -3, 122, 7, 10, -1, 0 },
27 { 0, -5, 121, 7, 14, -2, 0 },
28 { 0, -7, 120, 7, 18, -3, 0 },
29 { 0, -9, 118, 7, 23, -4, 0 },
30 { 0, -11, 116, 7, 27, -4, 0 },
31 { 0, -12, 113, 7, 32, -5, 0 },
[all …]
/Linux-v6.6/drivers/gpu/drm/display/
Ddrm_dsc_helper.c1 // SPDX-License-Identifier: MIT
34 * drm_dsc_dp_pps_header_init() - Initializes the PPS Header
48 pps_header->HB1 = DP_SDP_PPS; in drm_dsc_dp_pps_header_init()
49 pps_header->HB2 = DP_SDP_PPS_HEADER_PAYLOAD_BYTES_MINUS_1; in drm_dsc_dp_pps_header_init()
54 * drm_dsc_dp_rc_buffer_size - get rc buffer size in bytes
56 * @rc_buffer_size: number of blocks - 1, according to DPCD offset 63h
81 * drm_dsc_pps_payload_pack() - Populates the DSC PPS
109 pps_payload->dsc_version = in drm_dsc_pps_payload_pack()
110 dsc_cfg->dsc_version_minor | in drm_dsc_pps_payload_pack()
111 dsc_cfg->dsc_version_major << DSC_PPS_VERSION_MAJOR_SHIFT; in drm_dsc_pps_payload_pack()
[all …]
/Linux-v6.6/arch/arm/mach-omap1/
Dmux.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * linux/arch/arm/mach-omap1/mux.c
7 * Copyright (C) 2003 - 2008 Nokia Corporation
15 #include <linux/soc/ti/omap1-io.h>
30 MUX_CFG("UART1_TX", 9, 21, 1, 2, 3, 0, NA, 0, 0)
31 MUX_CFG("UART1_RTS", 9, 12, 1, 2, 0, 0, NA, 0, 0)
34 MUX_CFG("UART2_TX", C, 27, 1, 3, 3, 0, NA, 0, 0)
35 MUX_CFG("UART2_RX", C, 18, 0, 3, 1, 1, NA, 0, 0)
36 MUX_CFG("UART2_CTS", C, 21, 0, 3, 1, 1, NA, 0, 0)
37 MUX_CFG("UART2_RTS", C, 24, 1, 3, 2, 0, NA, 0, 0)
[all …]
/Linux-v6.6/arch/csky/lib/
Dusercopy.c1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
15 " mov %3, %1 \n" in raw_copy_from_user()
16 " or %3, %2 \n" in raw_copy_from_user()
17 " andi %3, 3 \n" in raw_copy_from_user()
18 " cmpnei %3, 0 \n" in raw_copy_from_user()
22 " bt 3f \n" in raw_copy_from_user()
23 "2: ldw %3, (%2, 0) \n" in raw_copy_from_user()
25 " stw %3, (%1, 0) \n" in raw_copy_from_user()
27 "11: ldw %3, (%2, 8) \n" in raw_copy_from_user()
[all …]
/Linux-v6.6/tools/arch/arm64/include/asm/
Dsysreg.h1 /* SPDX-License-Identifier: GPL-2.0-only */
19 * [20-19] : Op0
20 * [18-16] : Op1
21 * [15-12] : CRn
22 * [11-8] : CRm
23 * [7-5] : Op2
80 * As per Arm ARM for v8-A, Section "C.5.1.3 op0 == 0b00, architectural hints,
92 #define PSTATE_UAO pstate_field(0, 3)
93 #define PSTATE_SSBS pstate_field(3, 1)
94 #define PSTATE_TCO pstate_field(3, 4)
[all …]
/Linux-v6.6/drivers/pinctrl/stm32/
Dpinctrl-stm32mp257.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
10 #include "pinctrl-stm32.h"
18 STM32_FUNCTION(3, "SPI5_RDY"),
24 STM32_FUNCTION(9, "TIM5_CH2"),
35 STM32_FUNCTION(3, "SPI6_MISO"),
40 STM32_FUNCTION(9, "I2C4_SDA"),
53 STM32_FUNCTION(3, "SPI7_MISO"),
56 STM32_FUNCTION(9, "I3C1_SDA"),
65 PINCTRL_PIN(3, "PA3"),
[all …]
/Linux-v6.6/drivers/staging/media/rkvdec/
Drkvdec-h264.c1 // SPDX-License-Identifier: GPL-2.0
9 * Jeffy Chen <jeffy.chen@rock-chips.com>
12 #include <media/v4l2-h264.h>
13 #include <media/v4l2-mem2mem.h>
16 #include "rkvdec-regs.h"
23 #define RKVDEC_NUM_REFLIST 3
47 #define BIT_DEPTH_LUMA PS_FIELD(15, 3)
48 #define BIT_DEPTH_CHROMA PS_FIELD(18, 3)
55 #define PIC_WIDTH_IN_MBS PS_FIELD(38, 9)
56 #define PIC_HEIGHT_IN_MBS PS_FIELD(47, 9)
[all …]
/Linux-v6.6/arch/mips/include/asm/
Dpgtable-32.h19 #include <asm-generic/pgtable-nopmd.h>
26 * Regarding 32-bit MIPS huge page support (and the tradeoff it entails):
28 * We use the same huge page sizes as 64-bit MIPS. Assuming a 4KB page size,
29 * our 2-level table layout would normally have a PGD entry cover a contiguous
30 * 4MB virtual address region (pointing to a 4KB PTE page of 1,024 32-bit pte_t
37 * increases to match 64-bit MIPS, but PTE lookups remain CPU cache-friendly.
39 * NOTE: We don't yet support huge pages if extended-addressing is enabled
40 * (i.e. EVA, XPA, 36-bit Alchemy/Netlogic).
46 * - add_temporary_entry() add a temporary TLB entry. We use TLB entries
56 * Basically we have the same two-level (which is the logical three level
[all …]
/Linux-v6.6/lib/crypto/
Dblake2s-generic.c1 // SPDX-License-Identifier: GPL-2.0 OR MIT
3 * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
20 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 },
21 { 14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3 },
22 { 11, 8, 12, 0, 5, 2, 15, 13, 10, 14, 3, 6, 7, 1, 9, 4 },
23 { 7, 9, 3, 1, 13, 12, 11, 14, 2, 6, 5, 10, 4, 0, 15, 8 },
24 { 9, 0, 5, 7, 2, 4, 10, 15, 14, 1, 11, 12, 6, 8, 3, 13 },
25 { 2, 12, 6, 10, 0, 11, 8, 3, 4, 13, 7, 5, 15, 14, 1, 9 },
26 { 12, 5, 1, 15, 14, 13, 4, 10, 0, 7, 6, 3, 9, 2, 8, 11 },
27 { 13, 11, 7, 14, 12, 1, 3, 9, 5, 0, 15, 4, 8, 6, 2, 10 },
[all …]
/Linux-v6.6/Documentation/userspace-api/media/v4l/
Dpixfmt-yuv-luma.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _yuv-luma-only:
6 Luma-Only Formats
14 - In all the tables that follow, bit 7 is the most significant bit in a byte.
15 - Formats are described with the minimum number of pixels needed to create a
16 byte-aligned repeating pattern. `...` indicates repetition of the pattern.
17 - Y'\ :sub:`x`\ [9:2] denotes bits 9 to 2 of the Y' value for pixel at column
19 - `0` denotes padding bits set to 0.
28 .. flat-table:: Luma-Only Image Formats
29 :header-rows: 1
[all …]
/Linux-v6.6/drivers/pinctrl/mediatek/
Dpinctrl-mt8192.c1 // SPDX-License-Identifier: GPL-2.0
9 #include "pinctrl-mtk-mt8192.h"
10 #include "pinctrl-paris.h"
48 PIN_FIELD_BASE(3, 3, 4, 0x00f0, 0x10, 8, 1),
50 PIN_FIELD_BASE(5, 5, 4, 0x00f0, 0x10, 9, 1),
51 PIN_FIELD_BASE(6, 6, 4, 0x00f0, 0x10, 9, 1),
52 PIN_FIELD_BASE(7, 7, 4, 0x00f0, 0x10, 9, 1),
53 PIN_FIELD_BASE(8, 8, 4, 0x00f0, 0x10, 9, 1),
54 PIN_FIELD_BASE(9, 9, 4, 0x00f0, 0x10, 5, 1),
58 PIN_FIELD_BASE(13, 13, 6, 0x0070, 0x10, 3, 1),
[all …]
/Linux-v6.6/tools/testing/selftests/tc-testing/tc-tests/actions/
Dpolice.json20 "matchPattern": "action order [0-9]*: police 0x1 rate 1Kbit burst 10Kb",
27 "id": "3abe",
40 "$TC actions add action police rate 4Mbit burst 120k index 9"
42 "cmdUnderTest": "$TC actions add action police rate 8kbit burst 24k index 9",
45 "matchPattern": "action order [0-9]*: police 0x9",
69 "matchPattern": "action order [0-9]*: police 0x62 rate 90Kbit burst 10Kb mtu 1Kb",
90 …UnderTest": "$TC actions add action police rate 90kbit burst 10k mtu 2kb peakrate 100kbit index 3",
93 …"matchPattern": "action order [0-9]*: police 0x3 rate 90Kbit burst 10Kb mtu 2Kb peakrate 100Kbit",
114 … "cmdUnderTest": "$TC actions add action police rate 5kbit burst 6kb peakrate 10kbit index 9",
117 "matchPattern": "action order [0-9]*: police 0x9 rate 5Kb burst 10Kb",
[all …]
/Linux-v6.6/Documentation/tools/rtla/
Drtla-timerlat-top.rst2 rtla-timerlat-top
4 -------------------------------------------
6 -------------------------------------------
22 seem with the option **-T**.
35 **--aa-only** *us*
38 Print the auto-analysis if the system hits the stop tracing condition. This option
45 In the example below, the timerlat tracer is dispatched in cpus *1-23* in the
49 # timerlat -a 40 -c 1-23 -q
53 1 #12322 | 0 0 1 15 | 10 3 9 31
54 2 #12322 | 3 0 1 12 | 10 3 9 23
[all …]
/Linux-v6.6/drivers/pinctrl/sunplus/
Dsppctl_sp7021.c1 // SPDX-License-Identifier: GPL-2.0
18 D_PIS(0, 0), D_PIS(0, 1), D_PIS(0, 2), D_PIS(0, 3),
20 D_PIS(1, 0), D_PIS(1, 1), D_PIS(1, 2), D_PIS(1, 3),
22 D_PIS(2, 0), D_PIS(2, 1), D_PIS(2, 2), D_PIS(2, 3),
24 D_PIS(3, 0), D_PIS(3, 1), D_PIS(3, 2), D_PIS(3, 3),
25 D_PIS(3, 4), D_PIS(3, 5), D_PIS(3, 6), D_PIS(3, 7),
26 D_PIS(4, 0), D_PIS(4, 1), D_PIS(4, 2), D_PIS(4, 3),
28 D_PIS(5, 0), D_PIS(5, 1), D_PIS(5, 2), D_PIS(5, 3),
30 D_PIS(6, 0), D_PIS(6, 1), D_PIS(6, 2), D_PIS(6, 3),
32 D_PIS(7, 0), D_PIS(7, 1), D_PIS(7, 2), D_PIS(7, 3),
[all …]
/Linux-v6.6/arch/arm/boot/dts/intel/ixp/
Dintel-ixp43x-gateworks-gw2358.dts1 // SPDX-License-Identifier: ISC
3 * Device Tree file for Gateworks IXP43x-based Cambria GW2358
6 /dts-v1/;
8 #include "intel-ixp43x.dtsi"
13 #address-cells = <1>;
14 #size-cells = <1>;
24 stdout-path = "uart0:115200n8";
32 compatible = "gpio-leds";
33 led-user {
36 default-state = "on";
[all …]
/Linux-v6.6/arch/arm64/tools/
Dsysreg1 # SPDX-License-Identifier: GPL-2.0-only
44 # NI - Not implemented
45 # IMP - Implemented
91 Sysreg OSDTRTX_EL1 2 0 0 3 2
106 Sysreg ID_PFR0_EL1 3 0 0 1 0
141 UnsignedEnum 3:0 State0
147 Sysreg ID_PFR1_EL1 3 0 0 1 1
181 UnsignedEnum 3:0 ProgMod
187 Sysreg ID_DFR0_EL1 3 0 0 1 2
223 Enum 3:0 CopDbg
[all …]

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