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/Linux-v5.10/arch/arm64/crypto/
Daes-ce-ccm-core.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * aesce-ccm-core.S - AES-CCM transform for ARMv8 with Crypto Extensions
5 * Copyright (C) 2013 - 2017 Linaro Ltd <ard.biesheuvel@linaro.org>
12 .arch armv8-a+crypto
20 ld1 {v0.16b}, [x0] /* load mac */
21 cbz w8, 1f
24 0: ldrb w7, [x1], #1 /* get 1 byte of input */
25 subs w2, w2, #1
26 add w8, w8, #1
28 ext v1.16b, v1.16b, v1.16b, #1 /* rotate in the input bytes */
[all …]
Daes-ce-core.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2013 - 2017 Linaro Ltd <ard.biesheuvel@linaro.org>
9 .arch armv8-a+crypto
13 ld1 {v0.16b}, [x2]
22 1: aese v0.16b, v2.16b
23 aesmc v0.16b, v0.16b
25 aese v0.16b, v3.16b
26 aesmc v0.16b, v0.16b
29 aese v0.16b, v1.16b
30 aesmc v0.16b, v0.16b
[all …]
Daes-modes.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/arch/arm64/crypto/aes-modes.S - chaining mode wrappers for AES
5 * Copyright (C) 2013 - 2017 Linaro Ltd <ard.biesheuvel@linaro.org>
8 /* included by aes-ce.S and aes-neon.S */
26 encrypt_block4x v0, v1, v2, v3, w3, x2, x8, w7
31 decrypt_block4x v0, v1, v2, v3, w3, x2, x8, w7
37 encrypt_block5x v0, v1, v2, v3, v4, w3, x2, x8, w7
42 decrypt_block5x v0, v1, v2, v3, v4, w3, x2, x8, w7
55 stp x29, x30, [sp, #-16]!
63 ld1 {v0.16b-v3.16b}, [x1], #64 /* get 4 pt blocks */
[all …]
Dsm3-ce-core.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * sm3-ce-core.S - SM3 secure hash using ARMv8.2 Crypto Extensions
11 .irp b, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12
45 shl \t1\().4s, \t0\().4s, #1
62 round \ab, \s0, v12, v11, 1
78 ld1 {v8.4s-v9.4s}, [x0]
88 0: ld1 {v0.16b-v3.16b}, [x1], #64
89 sub w2, w2, #1
94 CPU_LE( rev32 v0.16b, v0.16b )
101 qround a, v0, v1, v2, v3, v4
[all …]
Dcrct10dif-ce-core.S2 // Accelerated CRC-T10DIF using arm64 NEON and Crypto Extensions instructions
14 // Implement fast CRC-T10DIF computation with SSE and PCLMULQDQ instructions
62 // /white-papers/fast-crc-computation-generic-polynomials-pclmulqdq-paper.pdf
69 .arch armv8-a+crypto
136 ext t4.8b, ad.8b, ad.8b, #1 // A1
253 pmull \rd\().1q, \rn\().1d, \rm\().1d
255 pmull2 \rd\().1q, \rn\().2d, \rm\().2d
281 CPU_LE( rev64 v0.16b, v0.16b )
289 CPU_LE( ext v0.16b, v0.16b, v0.16b, #8 )
301 eor v0.16b, v0.16b, v8.16b
[all …]
/Linux-v5.10/arch/mips/include/asm/mach-cavium-octeon/
Dkernel-entry-init.h6 * Copyright (C) 2005-2008 Cavium Networks, Inc
14 #define CP0_DCACHE_ERR_REG $27, 1
25 # a2 = 1 if init core, zero otherwise
30 dmfc0 v0, CP0_CVMMEMCTL_REG
32 dins v0, $0, 0, 6
33 ori v0, CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE
34 dmtc0 v0, CP0_CVMMEMCTL_REG # Write the cavium mem control register
35 dmfc0 v0, CP0_CVMCTL_REG # Read the cavium control register
38 or v0, v0, 0x5001
39 xor v0, v0, 0x1001
[all …]
/Linux-v5.10/tools/testing/selftests/powerpc/math/
Dvmx_asm.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
9 # Should be safe from C, only touches r4, r5 and v0,v1,v2
13 li r3,1 # assume a bad result
15 lvx v0,r5,r4
16 vcmpequd. v1,v0,v20
20 lvx v0,r5,r4
21 vcmpequd. v1,v0,v21
25 lvx v0,r5,r4
26 vcmpequd. v1,v0,v22
30 lvx v0,r5,r4
[all …]
/Linux-v5.10/drivers/gpu/drm/amd/amdkfd/
Dcwsr_trap_handler_gfx10.asm26 * cpp -DASIC_TARGET_NAVI1X=1 cwsr_trap_handler_gfx10.asm -P -o nv1x.sp3
27 * sp3-nv1x nv1x.sp3 -hex nv1x.hex
30 * cpp -DASIC_TARGET_NAVI1X=0 cwsr_trap_handler_gfx10.asm -P -o gfx10.sp3
31 * sp3-gfx10 gfx10.sp3 -hex gfx10.hex
36 var SINGLE_STEP_MISSED_WORKAROUND = 1 //workaround for lost MODE.DEBUG_EN exception when SAVECTX r…
52 var SQ_WAVE_IB_STS2_WAVE64_SIZE = 1
70 var SQ_WAVE_IB_STS_REPLAY_W64H_SIZE = 1
72 var SQ_WAVE_IB_STS_FIRST_REPLAY_SIZE = 1
190 // Second-level trap already handled exception if STATUS.HALT=1.
194 // Second-level trap will halt wave and RFE, re-entering for SAVECTX.
[all …]
Dcwsr_trap_handler_gfx9.asm24 * PROJECT=greenland ./sp3 cwsr_trap_handler_gfx9.asm -hex tmp.hex
27 var ACK_SQC_STORE = 1 //workaround for suspected SQC store bug causing incorrect stores u…
28 var SAVE_AFTER_XNACK_ERROR = 1 //workaround for TCP store failure after XNACK error when A…
29 var SINGLE_STEP_MISSED_WORKAROUND = 1 //workaround for lost MODE.DEBUG_EN exception when SAV…
36 var SQ_WAVE_STATUS_SPI_PRIO_SHIFT = 1
40 var SQ_WAVE_STATUS_PRE_SPI_PRIO_SIZE = 1
188 // Second-level trap already handled exception if STATUS.HALT=1.
192 // Second-level trap will halt wave and RFE, re-entering for SAVECTX.
202 // ********* Handle non-CWSR traps *******************
204 // Illegal instruction is a non-maskable exception which blocks context save.
[all …]
/Linux-v5.10/arch/powerpc/crypto/
Dcrc32-vpmsum_core.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
16 * 32 bits of 0s to the end - this matches what a CRC does. We just
28 #include <asm/ppc-opcode.h>
66 std r31,-8(r1)
67 std r30,-16(r1)
68 std r29,-24(r1)
69 std r28,-32(r1)
70 std r27,-40(r1)
71 std r26,-48(r1)
72 std r25,-56(r1)
[all …]
/Linux-v5.10/drivers/gpu/drm/nouveau/nvkm/engine/device/
Dctrl.c38 struct nvif_control_pstate_info_v0 v0; in nvkm_control_mthd_pstate_info() member
40 struct nvkm_clk *clk = ctrl->device->clk; in nvkm_control_mthd_pstate_info()
41 int ret = -ENOSYS; in nvkm_control_mthd_pstate_info()
43 nvif_ioctl(&ctrl->object, "control pstate info size %d\n", size); in nvkm_control_mthd_pstate_info()
44 if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { in nvkm_control_mthd_pstate_info()
45 nvif_ioctl(&ctrl->object, "control pstate info vers %d\n", in nvkm_control_mthd_pstate_info()
46 args->v0.version); in nvkm_control_mthd_pstate_info()
51 args->v0.count = clk->state_nr; in nvkm_control_mthd_pstate_info()
52 args->v0.ustate_ac = clk->ustate_ac; in nvkm_control_mthd_pstate_info()
53 args->v0.ustate_dc = clk->ustate_dc; in nvkm_control_mthd_pstate_info()
[all …]
Duser.c51 return -EINVAL; in nvkm_udevice_info_subdev()
57 return -ENODEV; in nvkm_udevice_info_subdev()
64 if (args->mthd & NV_DEVICE_INFO_UNIT) { in nvkm_udevice_info_v1()
65 if (nvkm_udevice_info_subdev(device, args->mthd, &args->data)) in nvkm_udevice_info_v1()
66 args->mthd = NV_DEVICE_INFO_INVALID; in nvkm_udevice_info_v1()
70 switch (args->mthd) { in nvkm_udevice_info_v1()
72 for (_i = (B), args->data = 0ULL; _i <= (C); _i++) { \ in nvkm_udevice_info_v1()
74 args->data |= BIT_ULL(_i); \ in nvkm_udevice_info_v1()
97 args->mthd = NV_DEVICE_INFO_INVALID; in nvkm_udevice_info_v1()
105 struct nvkm_object *object = &udev->object; in nvkm_udevice_info()
[all …]
/Linux-v5.10/lib/
Dsiphash.c5 * SipHash: a fast short-input PRF
8 * This implementation is specifically for SipHash2-4 for a secure PRF
9 * and HalfSipHash1-3/SipHash1-3 for an insecure PRF only suitable for
18 #include <asm/word-at-a-time.h>
23 v0 += v1; v1 = rol64(v1, 13); v1 ^= v0; v0 = rol64(v0, 32); \
25 v0 += v3; v3 = rol64(v3, 21); v3 ^= v0; \
30 u64 v0 = 0x736f6d6570736575ULL; \
35 v3 ^= key->key[1]; \
36 v2 ^= key->key[0]; \
37 v1 ^= key->key[1]; \
[all …]
/Linux-v5.10/drivers/gpu/drm/nouveau/nvkm/core/
Dioctl.c36 struct nvif_ioctl_nop_v0 v0; in nvkm_ioctl_nop() member
38 int ret = -ENOSYS; in nvkm_ioctl_nop()
41 if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { in nvkm_ioctl_nop()
42 nvif_ioctl(object, "nop vers %lld\n", args->v0.version); in nvkm_ioctl_nop()
43 args->v0.version = NVIF_VERSION_LATEST; in nvkm_ioctl_nop()
54 struct nvif_ioctl_sclass_v0 v0; in nvkm_ioctl_sclass() member
57 int ret = -ENOSYS, i = 0; in nvkm_ioctl_sclass()
60 if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, true))) { in nvkm_ioctl_sclass()
62 args->v0.version, args->v0.count); in nvkm_ioctl_sclass()
63 if (size != args->v0.count * sizeof(args->v0.oclass[0])) in nvkm_ioctl_sclass()
[all …]
Dclient.c39 struct nvif_client_v0 v0; in nvkm_uclient_new() member
42 int ret = -ENOSYS; in nvkm_uclient_new()
44 if (!(ret = nvif_unpack(ret, &argv, &argc, args->v0, 0, 0, false))){ in nvkm_uclient_new()
45 args->v0.name[sizeof(args->v0.name) - 1] = 0; in nvkm_uclient_new()
46 ret = nvkm_client_new(args->v0.name, args->v0.device, NULL, in nvkm_uclient_new()
47 NULL, oclass->client->ntfy, &client); in nvkm_uclient_new()
53 client->object.client = oclass->client; in nvkm_uclient_new()
54 client->object.handle = oclass->handle; in nvkm_uclient_new()
55 client->object.route = oclass->route; in nvkm_uclient_new()
56 client->object.token = oclass->token; in nvkm_uclient_new()
[all …]
/Linux-v5.10/drivers/gpu/drm/nouveau/nvkm/engine/disp/
Drootnv50.c40 struct nv50_disp_mthd_v0 v0; in nv50_disp_root_mthd_() member
44 struct nv50_disp *disp = root->disp; in nv50_disp_root_mthd_()
48 int hidx, ret = -ENOSYS; in nv50_disp_root_mthd_()
51 return -EINVAL; in nv50_disp_root_mthd_()
54 if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, true))) { in nv50_disp_root_mthd_()
56 args->v0.version, args->v0.method, args->v0.head); in nv50_disp_root_mthd_()
57 mthd = args->v0.method; in nv50_disp_root_mthd_()
58 hidx = args->v0.head; in nv50_disp_root_mthd_()
60 if (!(ret = nvif_unpack(ret, &data, &size, args->v1, 1, 1, true))) { in nv50_disp_root_mthd_()
63 args->v1.version, args->v1.method, in nv50_disp_root_mthd_()
[all …]
/Linux-v5.10/arch/mips/lib/
Dstrncpy_user.S11 #include <asm/asm-offsets.h>
22 * Returns: -EFAULT if exception before terminator, N if the entire
34 LONG_L v0, TI_ADDR_LIMIT($28) # pointer ok?
35 and v0, a1
36 bnez v0, .Lfault\@
41 1: EX(lbu, v0, (v1), .Lfault\@)
43 1: EX(lbue, v0, (v1), .Lfault\@)
45 PTR_ADDIU v1, 1
47 sb v0, (a0)
48 beqz v0, 2f
[all …]
Dstrnlen_user.S10 #include <asm/asm-offsets.h>
26 * bytes. There's nothing secret there. On 64-bit accessing beyond
31 LONG_L v0, TI_ADDR_LIMIT($28) # pointer ok?
32 and v0, a0
33 bnez v0, .Lfault\@
35 move v0, a0
37 1:
40 li AT, 1
42 beq v0, a1, 1f # limit reached?
44 EX(lb, t0, (v0), .Lfault\@)
[all …]
/Linux-v5.10/arch/mips/kernel/
Dscall32-o32.S6 * Copyright (C) 1995-99, 2000- 02, 06 Ralf Baechle <ralf@linux-mips.org>
23 #include <asm/asm-offsets.h>
54 bltz t5, bad_stack # -> sp is bad
86 bnez t0, syscall_trace_entry # -> yes
88 subu v0, v0, __NR_O32_Linux # check syscall number
89 sltiu t0, v0, __NR_O32_Linux_syscalls
92 sll t0, v0, 2
101 li t0, -EMAXERRNO - 1 # error?
102 sltu t0, t0, v0
104 beqz t0, 1f
[all …]
Dbmips_5xxx_init.S7 * Copyright (C) 2011-2012 by Broadcom Corporation
31 subu t2, linesize, 1 ; \
34 addiu t1, t1, -1 ; \
59 #define CP0_BRCM_MODE $22, 1
63 #define CP0_ICACHE_DATA_LO $28, 1
67 #define CP0_ICACHE_DATA_HI $29, 1
70 #define CP0_BRCM_MODE_Luc_MASK (1 << 11)
71 #define CP0_BRCM_CONFIG0_CWF_MASK (1 << 20)
72 #define CP0_BRCM_CONFIG0_TSE_MASK (1 << 19)
73 #define CP0_BRCM_MODE_SET_MASK (1 << 7)
[all …]
Dscall64-o32.S6 * Copyright (C) 1995 - 2000, 2001 by Ralf Baechle
13 * to ABI64 calling convention. 64-bit syscalls are also processed
36 dsubu t0, v0, __NR_O32_Linux # check syscall number
43 move a1, v0
88 dsll t0, v0, 3 # offset into table
89 ld t2, (sys32_call_table - (__NR_O32_Linux * 8))(t0)
93 li t0, -EMAXERRNO - 1 # error?
94 sltu t0, t0, v0
96 beqz t0, 1f
99 dnegu v0 # error
[all …]
/Linux-v5.10/drivers/gpu/drm/nouveau/nvkm/engine/pm/
Dbase.c41 list_for_each_entry(dom, &pm->domains, head) in nvkm_pm_count_perfdom()
53 for (i = 0; i < dom->signal_nr; i++) { in nvkm_perfdom_count_perfsig()
54 if (dom->signal[i].name) in nvkm_perfdom_count_perfsig()
67 list_for_each_entry(dom, &pm->domains, head) { in nvkm_perfdom_find()
86 if (!dom->signal[si].name) in nvkm_perfsig_find()
88 return &dom->signal[si]; in nvkm_perfsig_find()
96 for (i = 0; i < ARRAY_SIZE(sig->source); i++) { in nvkm_perfsig_count_perfsrc()
97 if (sig->source[i]) in nvkm_perfsig_count_perfsrc()
108 int tmp = 1; /* Sources ID start from 1 */ in nvkm_perfsrc_find()
111 for (i = 0; i < ARRAY_SIZE(sig->source) && sig->source[i]; i++) { in nvkm_perfsrc_find()
[all …]
/Linux-v5.10/drivers/gpu/drm/nouveau/
Dnouveau_usif.c58 list_for_each_entry(ntfy, &cli->notifys, head) { in usif_notify_find()
59 if (ntfy->handle == handle) in usif_notify_find()
68 list_del(&ntfy->head); in usif_notify_dtor()
77 struct nvif_notify_rep_v0 v0; in usif_notify() member
83 if (length == sizeof(rep->v0) && rep->v0.version == 0) { in usif_notify()
84 if (WARN_ON(!(ntfy = (void *)(unsigned long)rep->v0.token))) in usif_notify()
86 BUG_ON(rep->v0.route != NVDRM_NOTIFY_USIF); in usif_notify()
88 if (WARN_ON(1)) in usif_notify()
91 if (WARN_ON(!ntfy->p || ntfy->reply != (length + size))) in usif_notify()
93 filp = ntfy->p->base.file_priv; in usif_notify()
[all …]
/Linux-v5.10/drivers/platform/x86/
Dacerhdf.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * acerhdf - A driver which monitors the temperature
7 * (C) 2009 - Peter Kaestle peter (a) piie.net
12 * o acerfand - Rachel Greenham
13 * o acer_ec.pl - Michael Kurz michi.kurz (at) googlemail.com
14 * - Petr Tomasek tomasek (#) etf,cuni,cz
15 * - Carlos Corbacho cathectic (at) gmail.com
16 * o lkml - Matthew Garrett
17 * - Borislav Petkov
18 * - Andreas Mohr
[all …]
/Linux-v5.10/arch/powerpc/lib/
Dmemcpy_power7.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
11 /* 0 == don't use VMX, 1 == use VMX */
26 std r3,-STACKFRAMESIZE+STK_REG(R31)(r1)
40 clrldi r6,r6,(64-3)
42 bf cr7*4+3,1f
44 addi r4,r4,1
46 addi r3,r3,1
48 1: bf cr7*4+2,2f
54 2: bf cr7*4+1,3f
65 stdu r1,-STACKFRAMESIZE(r1)
[all …]

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