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/Linux-v6.1/Documentation/devicetree/bindings/soc/ti/
Dkeystone-navigator-qmss.txt27 external link ram entries. If the address is specified as "0"
83 0 : None, i.e interrupt on list full only
123 queue-range = <0 0x4000>;
124 linkram0 = <0x100000 0x8000>;
125 linkram1 = <0x0 0x10000>;
132 managed-queues = <0 0x2000>;
133 reg = <0x2a40000 0x20000>,
134 <0x2a06000 0x400>,
135 <0x2a02000 0x1000>,
136 <0x2a03000 0x1000>,
[all …]
/Linux-v6.1/arch/arm/boot/dts/
Dhighbank.dts9 /memreserve/ 0x00000000 0x0001000;
19 #size-cells = <0>;
24 reg = <0x900>;
43 reg = <0x901>;
62 reg = <0x902>;
81 reg = <0x903>;
98 memory@0 {
101 reg = <0x00000000 0xff900000>;
105 ranges = <0x00000000 0x00000000 0xffffffff>;
109 reg = <0xfff00000 0x1000>;
[all …]
Dmilbeaut-m10v.dtsi15 #size-cells = <0>;
20 reg = <0xf00>;
25 reg = <0xf01>;
30 reg = <0xf02>;
35 reg = <0xf03>;
64 reg = <0x1d001000 0x1000>,
65 <0x1d002000 0x1000>; /* CPU I/f base and size */
71 reg = <0x1d021000 0x1000>;
77 reg = <0x1e000050 0x20>;
78 interrupts = <0 91 4>;
[all …]
Dbcm2836.dtsi10 ranges = <0x7e000000 0x3f000000 0x1000000>,
11 <0x40000000 0x40000000 0x00001000>;
12 dma-ranges = <0xc0000000 0x00000000 0x3f000000>;
16 reg = <0x40000000 0x100>;
32 interrupts = <0 IRQ_TYPE_LEVEL_HIGH>, // PHYS_SECURE_PPI
41 #size-cells = <0>;
52 v7_cpu0: cpu@0 {
55 reg = <0xf00>;
57 d-cache-size = <0x8000>;
60 i-cache-size = <0x8000>;
[all …]
Dkeystone-k2e-netcp.dtsi15 queue-range = <0 0x2000>;
16 linkram0 = <0x100000 0x4000>;
17 linkram1 = <0 0x10000>;
24 managed-queues = <0 0x2000>;
25 reg = <0x2a40000 0x20000>,
26 <0x2a06000 0x400>,
27 <0x2a02000 0x1000>,
28 <0x2a03000 0x1000>,
29 <0x23a80000 0x20000>,
30 <0x2a80000 0x20000>;
[all …]
Dkeystone-k2l-netcp.dtsi15 queue-range = <0 0x2000>;
16 linkram0 = <0x100000 0x4000>;
17 linkram1 = <0x70000000 0x10000>; /* 1MB OSR mem */
24 managed-queues = <0 0x2000>;
25 reg = <0x2a40000 0x20000>,
26 <0x2a06000 0x400>,
27 <0x2a02000 0x1000>,
28 <0x2a03000 0x1000>,
29 <0x23a80000 0x20000>,
30 <0x2a80000 0x20000>;
[all …]
Dkeystone-k2hk-netcp.dtsi15 queue-range = <0 0x4000>;
16 linkram0 = <0x100000 0x8000>;
17 linkram1 = <0x0 0x10000>;
24 managed-queues = <0 0x2000>;
25 reg = <0x2a40000 0x20000>,
26 <0x2a06000 0x400>,
27 <0x2a02000 0x1000>,
28 <0x2a03000 0x1000>,
29 <0x23a80000 0x20000>,
30 <0x2a80000 0x20000>;
[all …]
Dartpec6.dtsi55 #size-cells = <0>;
57 cpu0: cpu@0 {
60 reg = <0>;
74 reg = <0xf8000000 0x48>;
80 psci_version = <0x84000000>;
81 cpu_on = <0x84000003>;
82 system_reset = <0x84000009>;
87 reg = <0xfaf00000 0x58>;
92 #clock-cells = <0>;
98 #clock-cells = <0>;
[all …]
Dhisi-x5hd2.dtsi20 #address-cells = <0>;
23 reg = <0xf8a01000 0x1000>, <0xf8a00100 0x100>;
31 ranges = <0 0xf8000000 0x8000000>;
41 reg = <0x00002000 0x1000>;
43 interrupts = <0 24 4>;
55 reg = <0x00a29000 0x1000>;
57 interrupts = <0 25 4>;
64 reg = <0x00a2a000 0x1000>;
66 interrupts = <0 26 4>;
73 reg = <0x00a2b000 0x1000>;
[all …]
Dhi3620.dtsi27 #clock-cells = <0>;
34 #size-cells = <0>;
37 cpu@0 {
40 reg = <0x0>;
72 ranges = <0 0xfc000000 0x2000000>;
76 reg = <0x100000 0x100000>;
77 interrupts = <0 15 4>;
85 #address-cells = <0>;
88 reg = <0x1000 0x1000>, <0x100 0x100>;
95 ranges = <0 0x802000 0x1000>;
[all …]
Drk3036.dtsi34 #size-cells = <0>;
40 reg = <0xf00>;
53 reg = <0xf01>;
84 #clock-cells = <0>;
89 reg = <0x10080000 0x2000>;
92 ranges = <0 0x10080000 0x2000>;
94 smp-sram@0 {
96 reg = <0x00 0x10>;
102 reg = <0x10090000 0x10000>;
122 reg = <0x10108000 0x800>;
[all …]
Dsocfpga_arria10.dtsi15 #size-cells = <0>;
18 cpu0: cpu@0 {
21 reg = <0>;
35 interrupts = <0 124 4>, <0 125 4>;
37 reg = <0xff111000 0x1000>,
38 <0xff113000 0x1000>;
45 reg = <0xffffd000 0x1000>,
46 <0xffffc100 0x100>;
65 reg = <0xffda1000 0x1000>;
66 interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>,
[all …]
Dsocfpga.dtsi23 #size-cells = <0>;
26 cpu0: cpu@0 {
29 reg = <0>;
43 interrupts = <0 176 4>, <0 177 4>;
45 reg = <0xff111000 0x1000>,
46 <0xff113000 0x1000>;
53 reg = <0xfffed000 0x1000>,
54 <0xfffec100 0x100>;
73 reg = <0xffe01000 0x1000>;
74 interrupts = <0 104 4>,
[all …]
Dls1021a.dtsi31 #size-cells = <0>;
36 reg = <0xf00>;
37 clocks = <&clockgen 1 0>;
44 reg = <0xf01>;
45 clocks = <&clockgen 1 0>;
50 memory@0 {
52 reg = <0x0 0x0 0x0 0x0>;
57 #clock-cells = <0>;
80 offset = <0xb0>;
81 mask = <0x02>;
[all …]
Daspeed-g6.dtsi44 #size-cells = <0>;
50 reg = <0xf00>;
56 reg = <0xf01>;
74 reg = <0x1e6e0000 0x174>;
75 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
91 reg = <0x40461000 0x1000>,
92 <0x40462000 0x1000>,
93 <0x40464000 0x2000>,
94 <0x40466000 0x2000>;
98 reg = <0x1e620000 0xc4>, <0x20000000 0x10000000>;
[all …]
Drk322x.dtsi26 #size-cells = <0>;
31 reg = <0xf00>;
43 reg = <0xf01>;
53 reg = <0xf02>;
63 reg = <0xf03>;
71 cpu0_opp_table: opp-table-0 {
127 #clock-cells = <0>;
137 reg = <0x100b0000 0x4000>;
144 pinctrl-0 = <&i2s1_bus>;
150 reg = <0x100c0000 0x4000>;
[all …]
Dimx6qdl.dtsi59 #clock-cells = <0>;
65 #clock-cells = <0>;
66 clock-frequency = <0>;
71 #clock-cells = <0>;
78 #size-cells = <0>;
83 lvds-channel@0 {
85 #size-cells = <0>;
86 reg = <0>;
89 port@0 {
90 reg = <0>;
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/timer/
Darm,global_timer.yaml44 reg = <0x2c000600 0x20>;
45 interrupts = <1 13 0xf01>;
Darm,twd-timer.yaml54 reg = <0x2c000600 0x20>;
55 interrupts = <GIC_PPI 13 0xf01>;
/Linux-v6.1/Documentation/devicetree/bindings/watchdog/
Darm,twd-wdt.yaml48 reg = <0x2c000620 0x20>;
49 interrupts = <GIC_PPI 14 0xf01>;
/Linux-v6.1/include/linux/mlx4/
Dcmd.h43 MLX4_CMD_SYS_EN = 0x1,
44 MLX4_CMD_SYS_DIS = 0x2,
45 MLX4_CMD_MAP_FA = 0xfff,
46 MLX4_CMD_UNMAP_FA = 0xffe,
47 MLX4_CMD_RUN_FW = 0xff6,
48 MLX4_CMD_MOD_STAT_CFG = 0x34,
49 MLX4_CMD_QUERY_DEV_CAP = 0x3,
50 MLX4_CMD_QUERY_FW = 0x4,
51 MLX4_CMD_ENABLE_LAM = 0xff8,
52 MLX4_CMD_DISABLE_LAM = 0xff7,
[all …]
/Linux-v6.1/sound/soc/codecs/
Drt715.c46 if (ret < 0) { in rt715_index_write()
62 if (ret < 0) in rt715_get_gain()
66 val_h |= 0x20; in rt715_get_gain()
69 if (ret < 0) in rt715_get_gain()
85 unsigned int k_vol_changed = 0; in rt715_set_amp_gain_put()
87 for (i = 0; i < 2; i++) { in rt715_set_amp_gain_put()
99 val_h = 0x80; in rt715_set_amp_gain_put()
101 val_h = 0x0; in rt715_set_amp_gain_put()
110 rt715->kctl_2ch_vol_ori[0] = ucontrol->value.integer.value[0]; in rt715_set_amp_gain_put()
112 val_ll = ((ucontrol->value.integer.value[0]) & 0x7f); in rt715_set_amp_gain_put()
[all …]
Drt700.c38 if (ret < 0) in rt700_index_write()
51 *value = 0; in rt700_index_read()
53 if (ret < 0) in rt700_index_read()
62 unsigned int btn_type = 0, val80, val81; in rt700_button_detect()
66 if (ret < 0) in rt700_button_detect()
69 if (ret < 0) in rt700_button_detect()
72 val80 &= 0x0381; in rt700_button_detect()
73 val81 &= 0xff00; in rt700_button_detect()
76 case 0x0200: in rt700_button_detect()
77 case 0x0100: in rt700_button_detect()
[all …]
Drt711.c38 if (ret < 0) in rt711_index_write()
51 *value = 0; in rt711_index_read()
53 if (ret < 0) in rt711_index_read()
67 if (ret < 0) in rt711_index_update_bits()
78 regmap_write(regmap, RT711_FUNC_RESET, 0); in rt711_reset()
86 unsigned int val, loop = 0; in rt711_calibration()
89 int ret = 0; in rt711_calibration()
99 0xf, 0x0); in rt711_calibration()
126 RT711_FSM_CTL, 0xf, RT711_DEPOP_CTL); in rt711_calibration()
138 unsigned int btn_type = 0, val80, val81; in rt711_button_detect()
[all …]
/Linux-v6.1/include/linux/mfd/madera/
Dregisters.h14 #define MADERA_SOFTWARE_RESET 0x00
15 #define MADERA_HARDWARE_REVISION 0x01
16 #define MADERA_CTRL_IF_CFG_1 0x08
17 #define MADERA_CTRL_IF_CFG_2 0x09
18 #define MADERA_CTRL_IF_CFG_3 0x0A
19 #define MADERA_WRITE_SEQUENCER_CTRL_0 0x16
20 #define MADERA_WRITE_SEQUENCER_CTRL_1 0x17
21 #define MADERA_WRITE_SEQUENCER_CTRL_2 0x18
22 #define MADERA_TONE_GENERATOR_1 0x20
23 #define MADERA_TONE_GENERATOR_2 0x21
[all …]

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