Lines Matching +full:0 +full:xf01

44 		#size-cells = <0>;
50 reg = <0xf00>;
56 reg = <0xf01>;
74 reg = <0x1e6e0000 0x174>;
75 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
91 reg = <0x40461000 0x1000>,
92 <0x40462000 0x1000>,
93 <0x40464000 0x2000>,
94 <0x40466000 0x2000>;
98 reg = <0x1e620000 0xc4>, <0x20000000 0x10000000>;
100 #size-cells = <0>;
105 flash@0 {
106 reg = < 0 >;
129 reg = <0x1e630000 0xc4>, <0x30000000 0x10000000>;
131 #size-cells = <0>;
135 flash@0 {
136 reg = < 0 >;
152 reg = <0x1e631000 0xc4>, <0x50000000 0x10000000>;
154 #size-cells = <0>;
158 flash@0 {
159 reg = < 0 >;
183 reg = <0x1e650000 0x8>;
185 #size-cells = <0>;
188 pinctrl-0 = <&pinctrl_mdio1_default>;
194 reg = <0x1e650008 0x8>;
196 #size-cells = <0>;
199 pinctrl-0 = <&pinctrl_mdio2_default>;
205 reg = <0x1e650010 0x8>;
207 #size-cells = <0>;
210 pinctrl-0 = <&pinctrl_mdio3_default>;
216 reg = <0x1e650018 0x8>;
218 #size-cells = <0>;
221 pinctrl-0 = <&pinctrl_mdio4_default>;
227 reg = <0x1e660000 0x180>;
229 #size-cells = <0>;
237 reg = <0x1e680000 0x180>;
239 #size-cells = <0>;
247 reg = <0x1e670000 0x180>;
249 #size-cells = <0>;
257 reg = <0x1e690000 0x180>;
259 #size-cells = <0>;
267 reg = <0x1e6a1000 0x100>;
271 pinctrl-0 = <&pinctrl_usb2ah_default>;
277 reg = <0x1e6a3000 0x100>;
281 pinctrl-0 = <&pinctrl_usb2bh_default>;
287 reg = <0x1e6b0000 0x100>;
300 reg = <0x1e6a0000 0x350>;
306 pinctrl-0 = <&pinctrl_usb2ad_default>;
312 reg = <0x1e6a2000 0x300>;
316 pinctrl-0 = <&pinctrl_usb2bd_default>;
328 reg = <0x1e6d0000 0x200>;
336 reg = <0x1e6e2000 0x1000>;
337 ranges = <0 0x1e6e2000 0x1000>;
349 reg = <0x14 0x4 0x5b0 0x8>;
354 reg = <0x180 0x40>;
360 reg = <0x560 0x4>;
368 reg = <0x570 0x4>;
376 reg = <0x1e6e2524 0x4>;
383 reg = <0x1e6e6000 0x1000>;
394 reg = <0x1e6e7000 0x100>;
407 reg = <0x1e6e9000 0x100>;
417 reg = <0x1e6e9100 0x100>;
427 reg = <0x1e6f2000 0x1000>;
432 reg = <0x1e700000 0x1000>;
444 reg = <0x1e780000 0x400>;
446 gpio-ranges = <&pinctrl 0 0 208>;
457 reg = <0x1e780500 0x100>;
463 pinctrl-0 = <&pinctrl_sgpm1_default>;
471 reg = <0x1e780600 0x100>;
477 pinctrl-0 = <&pinctrl_sgpm2_default>;
485 reg = <0x1e780800 0x800>;
487 gpio-ranges = <&pinctrl 0 208 36>;
496 reg = <0x1e781000 0x18>;
503 reg = <0x1e782000 0x90>;
519 reg = <0x1e783000 0x20>;
527 pinctrl-0 = <&pinctrl_txd1_default &pinctrl_rxd1_default>;
533 reg = <0x1e784000 0x1000>;
542 reg = <0x1e785000 0x40>;
547 reg = <0x1e785040 0x40>;
553 reg = <0x1e785080 0x40>;
559 reg = <0x1e7850C0 0x40>;
565 reg = <0x1e78b000 0x100>;
576 reg = <0x1e789000 0x1000>;
581 ranges = <0x0 0x1e789000 0x1000>;
585 reg = <0x24 0x1>, <0x30 0x1>, <0x3c 0x1>;
594 reg = <0x28 0x1>, <0x34 0x1>, <0x40 0x1>;
602 reg = <0x2c 0x1>, <0x38 0x1>, <0x44 0x1>;
610 reg = <0x114 0x1>, <0x118 0x1>, <0x11c 0x1>;
618 reg = <0x80 0x80>;
625 reg = <0x80 0x80>;
633 reg = <0xa0 0x24 0xc8 0x8>;
638 reg = <0x98 0x4>;
644 reg = <0x98 0x8>;
650 reg = <0x140 0x18>;
659 reg = <0x1e740000 0x100>;
662 ranges = <0 0x1e740000 0x10000>;
668 reg = <0x100 0x100>;
677 reg = <0x200 0x100>;
687 reg = <0x1e750000 0x100>;
690 ranges = <0 0x1e750000 0x10000>;
696 reg = <0x100 0x100>;
701 pinctrl-0 = <&pinctrl_emmc_default>;
707 reg = <0x1e787000 0x40>;
717 reg = <0x1e788000 0x40>;
727 reg = <0x1e78d000 0x20>;
735 pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>;
741 reg = <0x1e78e000 0x20>;
749 pinctrl-0 = <&pinctrl_txd3_default &pinctrl_rxd3_default>;
755 reg = <0x1e78f000 0x20>;
763 pinctrl-0 = <&pinctrl_txd4_default &pinctrl_rxd4_default>;
769 reg = <0x1e790000 0x20>;
776 pinctrl-0 = <&pinctrl_uart6_default>;
783 reg = <0x1e790100 0x20>;
790 pinctrl-0 = <&pinctrl_uart7_default>;
797 reg = <0x1e790200 0x20>;
804 pinctrl-0 = <&pinctrl_uart8_default>;
811 reg = <0x1e790300 0x20>;
818 pinctrl-0 = <&pinctrl_uart9_default>;
827 ranges = <0 0x1e78a000 0x1000>;
832 reg = <0x1e79b000 0x94>;
835 pinctrl-0 = <&pinctrl_fsi1_default>;
842 reg = <0x1e79b100 0x94>;
845 pinctrl-0 = <&pinctrl_fsi2_default>;
858 #size-cells = <0>;
860 reg = <0x80 0x80>;
867 pinctrl-0 = <&pinctrl_i2c1_default>;
873 #size-cells = <0>;
875 reg = <0x100 0x80>;
882 pinctrl-0 = <&pinctrl_i2c2_default>;
888 #size-cells = <0>;
890 reg = <0x180 0x80>;
897 pinctrl-0 = <&pinctrl_i2c3_default>;
903 #size-cells = <0>;
905 reg = <0x200 0x80>;
912 pinctrl-0 = <&pinctrl_i2c4_default>;
918 #size-cells = <0>;
920 reg = <0x280 0x80>;
927 pinctrl-0 = <&pinctrl_i2c5_default>;
933 #size-cells = <0>;
935 reg = <0x300 0x80>;
942 pinctrl-0 = <&pinctrl_i2c6_default>;
948 #size-cells = <0>;
950 reg = <0x380 0x80>;
957 pinctrl-0 = <&pinctrl_i2c7_default>;
963 #size-cells = <0>;
965 reg = <0x400 0x80>;
972 pinctrl-0 = <&pinctrl_i2c8_default>;
978 #size-cells = <0>;
980 reg = <0x480 0x80>;
987 pinctrl-0 = <&pinctrl_i2c9_default>;
993 #size-cells = <0>;
995 reg = <0x500 0x80>;
1002 pinctrl-0 = <&pinctrl_i2c10_default>;
1008 #size-cells = <0>;
1010 reg = <0x580 0x80>;
1017 pinctrl-0 = <&pinctrl_i2c11_default>;
1023 #size-cells = <0>;
1025 reg = <0x600 0x80>;
1032 pinctrl-0 = <&pinctrl_i2c12_default>;
1038 #size-cells = <0>;
1040 reg = <0x680 0x80>;
1047 pinctrl-0 = <&pinctrl_i2c13_default>;
1053 #size-cells = <0>;
1055 reg = <0x700 0x80>;
1062 pinctrl-0 = <&pinctrl_i2c14_default>;
1068 #size-cells = <0>;
1070 reg = <0x780 0x80>;
1077 pinctrl-0 = <&pinctrl_i2c15_default>;
1083 #size-cells = <0>;
1085 reg = <0x800 0x80>;
1092 pinctrl-0 = <&pinctrl_i2c16_default>;