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/Linux-v6.1/arch/arm/boot/dts/
Dkeystone-k2hk-clocks.dtsi10 #clock-cells = <0>;
14 reg = <0x02620370 4>;
19 #clock-cells = <0>;
22 reg = <0x02620350 4>, <0x02310110 4>, <0x02310108 4>;
27 #clock-cells = <0>;
31 reg = <0x02620358 4>;
36 #clock-cells = <0>;
40 reg = <0x02620360 4>;
45 #clock-cells = <0>;
49 reg = <0x02620368 4>;
[all …]
Dkeystone-k2l-clocks.dtsi10 #clock-cells = <0>;
14 reg = <0x02620370 4>;
19 #clock-cells = <0>;
22 reg = <0x02620350 4>, <0x02310110 4>, <0x02310108 4>;
27 #clock-cells = <0>;
31 reg = <0x02620358 4>;
36 #clock-cells = <0>;
40 reg = <0x02620360 4>;
45 #clock-cells = <0>;
50 reg = <0x02350004 0xb00>, <0x02350000 0x400>;
[all …]
Dkeystone-clocks.dtsi14 #clock-cells = <0>;
17 reg = <0x02310108 4>;
24 #clock-cells = <0>;
33 #clock-cells = <0>;
42 #clock-cells = <0>;
45 reg = <0x02310120 4>;
46 bit-shift = <0>;
52 #clock-cells = <0>;
55 reg = <0x02310164 4>;
56 bit-shift = <0>;
[all …]
Dkeystone-k2e-clocks.dtsi10 #clock-cells = <0>;
13 reg = <0x02620350 4>, <0x02310110 4>, <0x02310108 4>;
18 #clock-cells = <0>;
22 reg = <0x02620358 4>;
27 #clock-cells = <0>;
31 reg = <0x02620360 4>;
36 #clock-cells = <0>;
40 reg = <0x02350004 0xb00>, <0x02350000 0x400>;
42 domain-id = <0>;
46 #clock-cells = <0>;
[all …]
Dexynos54xx.dtsi42 <7 0>,
60 reg = <0x02020000 0x54000>;
63 ranges = <0 0x02020000 0x54000>;
65 smp-sram@0 {
67 reg = <0x0 0x1000>;
72 reg = <0x53000 0x1000>;
79 reg = <0x101c0000 0xb00>;
96 reg = <0x101d0000 0x100>;
102 reg = <0x12d10000 0x100>;
111 reg = <0x12ca0000 0x1000>;
[all …]
/Linux-v6.1/drivers/pinctrl/mediatek/
Dpinctrl-mt8127.c20 /* 0E4E8SR 4/8/12/16 */
22 /* 0E2E4SR 2/4/6/8 */
25 MTK_DRV_GRP(2, 16, 0, 2, 2)
29 MTK_PIN_DRV_GRP(0, 0xb00, 0, 1),
30 MTK_PIN_DRV_GRP(1, 0xb00, 0, 1),
31 MTK_PIN_DRV_GRP(2, 0xb00, 0, 1),
32 MTK_PIN_DRV_GRP(3, 0xb00, 0, 1),
33 MTK_PIN_DRV_GRP(4, 0xb00, 0, 1),
34 MTK_PIN_DRV_GRP(5, 0xb00, 0, 1),
35 MTK_PIN_DRV_GRP(6, 0xb00, 0, 1),
[all …]
Dpinctrl-mt6795.c11 PIN_FIELD_CALC(_s_pin, _e_pin, 0, _s_addr, _x_addrs, _s_bit, \
12 _x_bits, 15, 0)
15 PIN_FIELD_CALC(_s_pin, _e_pin, 0, _s_addr, _x_addrs, _s_bit, \
16 _x_bits, 16, 0)
19 PIN_FIELD_CALC(_s_pin, _e_pin, 0, _s_addr, _x_addrs, _s_bit, \
23 PIN_FIELD16(0, 196, 0x0, 0x10, 0, 1),
27 PIN_FIELD16(0, 196, 0x100, 0x10, 0, 1),
31 PIN_FIELD16(0, 196, 0x200, 0x10, 0, 1),
35 PIN_FIELD16(0, 196, 0x400, 0x10, 0, 1),
39 PIN_FIELD16(0, 196, 0x500, 0x10, 0, 1),
[all …]
/Linux-v6.1/drivers/media/pci/cx18/
Dcx18-audio.c15 #define CX18_AUDIO_ENABLE 0xc72014
16 #define CX18_AI1_MUX_MASK 0x30
17 #define CX18_AI1_MUX_I2S1 0x00
18 #define CX18_AI1_MUX_I2S2 0x10
19 #define CX18_AI1_MUX_843_I2S 0x20
37 (u32) in->muxer_input, 0, 0); in cx18_audio_set_io()
40 audio, s_routing, in->audio_input, 0, 0); in cx18_audio_set_io()
72 cx18_write_reg_expect(cx, u | 0xb00, CX18_AUDIO_ENABLE, in cx18_audio_set_io()
75 cx18_write_reg_expect(cx, v | 0xb00, CX18_AUDIO_ENABLE, in cx18_audio_set_io()
77 return 0; in cx18_audio_set_io()
Dcx18-av-firmware.c13 #define CX18_AUDIO_ENABLE 0xc72014
14 #define CX18_AI1_MUX_MASK 0x30
15 #define CX18_AI1_MUX_I2S1 0x00
16 #define CX18_AI1_MUX_I2S2 0x10
17 #define CX18_AI1_MUX_843_I2S 0x20
18 #define CX18_AI1_MUX_INVALID 0x30
25 int ret = 0; in cx18_av_verifyfw()
34 dl_control &= 0x00ffffff; in cx18_av_verifyfw()
35 dl_control |= 0x0f000000; in cx18_av_verifyfw()
38 } while ((dl_control & 0xff000000) != 0x0f000000); in cx18_av_verifyfw()
[all …]
/Linux-v6.1/drivers/staging/rtl8723bs/include/
Dhal_phy_reg_8723b.h14 /* 4. Page9(0x900) */
16 #define rDPDT_control 0x92c
17 #define rfe_ctrl_anta_src 0x930
18 #define rS0S1_PathSwitch 0x948
19 #define AGC_table_select 0xb2c
22 /* PageB(0xB00) */
24 #define rPdp_AntA 0xb00
25 #define rPdp_AntA_4 0xb04
26 #define rPdp_AntA_8 0xb08
27 #define rPdp_AntA_C 0xb0c
[all …]
/Linux-v6.1/arch/sh/include/cpu-sh4a/cpu/
Ddma.h9 #define DMTE0_IRQ evt2irq(0x800)
10 #define DMTE4_IRQ evt2irq(0xb80)
11 #define DMAE0_IRQ evt2irq(0xbc0) /* DMA Error IRQ*/
12 #define SH_DMAC_BASE0 0xFE008020
14 #define DMTE0_IRQ evt2irq(0x800)
15 #define DMTE4_IRQ evt2irq(0xb80)
16 #define DMAE0_IRQ evt2irq(0xbc0) /* DMA Error IRQ*/
17 #define SH_DMAC_BASE0 0xFE008020
19 #define DMTE0_IRQ evt2irq(0x640)
20 #define DMTE4_IRQ evt2irq(0x780)
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/clock/
Dkeystone-gate.txt11 - #clock-cells : from common clock binding; shall be set to 0.
22 #clock-cells = <0>;
26 reg = <0x02350008 0xb00>, <0x02350000 0x400>;
28 domain-id = <0>;
/Linux-v6.1/Documentation/devicetree/bindings/spi/
Dralink,mt7621-spi.yaml50 reg = <0xb00 0x100>;
57 #size-cells = <0>;
60 pinctrl-0 = <&spi_pins>;
/Linux-v6.1/include/dt-bindings/clock/
Dlpc18xx-ccu.h13 #define CLK_APB3_BUS 0x100
14 #define CLK_APB3_I2C1 0x108
15 #define CLK_APB3_DAC 0x110
16 #define CLK_APB3_ADC0 0x118
17 #define CLK_APB3_ADC1 0x120
18 #define CLK_APB3_CAN0 0x128
19 #define CLK_APB1_BUS 0x200
20 #define CLK_APB1_MOTOCON_PWM 0x208
21 #define CLK_APB1_I2C0 0x210
22 #define CLK_APB1_I2S 0x218
[all …]
/Linux-v6.1/drivers/watchdog/
Dsp5100_tco.h15 #define SP5100_WDT_MEM_MAP_SIZE 0x08
16 #define SP5100_WDT_CONTROL(base) ((base) + 0x00) /* Watchdog Control */
17 #define SP5100_WDT_COUNT(base) ((base) + 0x04) /* Watchdog Count */
19 #define SP5100_WDT_START_STOP_BIT BIT(0)
25 #define SP5100_PM_IOPORTS_SIZE 0x02
33 #define SP5100_IO_PM_INDEX_REG 0xCD6
34 #define SP5100_IO_PM_DATA_REG 0xCD7
37 #define SP5100_SB_RESOURCE_MMIO_BASE 0x9C
39 #define SP5100_PM_WATCHDOG_CONTROL 0x69
40 #define SP5100_PM_WATCHDOG_BASE 0x6C
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/powerpc/fsl/
Dpmc.txt61 reg = <0xb00 0x100 0xa00 0x100>;
/Linux-v6.1/arch/sh/kernel/cpu/sh4/
Dsetup-sh7760.c17 UNUSED = 0,
44 INTC_VECT(HUDI, 0x600), INTC_VECT(GPIOI, 0x620),
45 INTC_VECT(DMAC, 0x640), INTC_VECT(DMAC, 0x660),
46 INTC_VECT(DMAC, 0x680), INTC_VECT(DMAC, 0x6a0),
47 INTC_VECT(DMAC, 0x780), INTC_VECT(DMAC, 0x7a0),
48 INTC_VECT(DMAC, 0x7c0), INTC_VECT(DMAC, 0x7e0),
49 INTC_VECT(DMAC, 0x6c0),
50 INTC_VECT(IRQ4, 0x800), INTC_VECT(IRQ5, 0x820),
51 INTC_VECT(IRQ6, 0x840), INTC_VECT(IRQ6, 0x860),
52 INTC_VECT(HCAN20, 0x900), INTC_VECT(HCAN21, 0x920),
[all …]
Dsetup-sh7750.c19 [0] = {
20 .start = 0xffc80000,
21 .end = 0xffc80000 + 0x58 - 1,
26 .start = evt2irq(0x480),
43 DEFINE_RES_MEM(0xffe00000, 0x20),
44 DEFINE_RES_IRQ(evt2irq(0x4e0)),
49 .id = 0,
63 DEFINE_RES_MEM(0xffe80000, 0x100),
64 DEFINE_RES_IRQ(evt2irq(0x700)),
82 DEFINE_RES_MEM(0xffd80000, 0x30),
[all …]
/Linux-v6.1/sound/soc/amd/raven/
Dacp3x.h10 #define I2S_SP_INSTANCE 0x01
11 #define I2S_BT_INSTANCE 0x02
14 #define TDM_DISABLE 0
17 #define ACP3x_PHY_BASE_ADDRESS 0x1240000
18 #define ACP3x_I2S_MODE 0
19 #define ACP3x_REG_START 0x1240000
20 #define ACP3x_REG_END 0x1250200
21 #define ACP3x_I2STDM_REG_START 0x1242400
22 #define ACP3x_I2STDM_REG_END 0x1242410
23 #define ACP3x_BT_TDM_REG_START 0x1242800
[all …]
/Linux-v6.1/sound/soc/amd/vangogh/
Dacp5x.h11 #define ACP5x_PHY_BASE_ADDRESS 0x1240000
12 #define ACP_DEVICE_ID 0x15E2
13 #define ACP_SOFT_RESET_SOFTRESET_AUDDONE_MASK 0x00010001
15 #define ACP_PGFSM_CNTL_POWER_ON_MASK 0x01
16 #define ACP_PGFSM_CNTL_POWER_OFF_MASK 0x00
17 #define ACP_PGFSM_STATUS_MASK 0x03
18 #define ACP_POWERED_ON 0x00
19 #define ACP_POWER_ON_IN_PROGRESS 0x01
20 #define ACP_POWERED_OFF 0x02
21 #define ACP_POWER_OFF_IN_PROGRESS 0x03
[all …]
/Linux-v6.1/drivers/net/ethernet/stmicro/stmmac/
Dstmmac_ptp.h14 #define PTP_XGMAC_OFFSET 0xd00
15 #define PTP_GMAC4_OFFSET 0xb00
16 #define PTP_GMAC3_X_OFFSET 0x700
19 #define PTP_TCR 0x00 /* Timestamp Control Reg */
20 #define PTP_SSIR 0x04 /* Sub-Second Increment Reg */
21 #define PTP_STSR 0x08 /* System Time – Seconds Regr */
22 #define PTP_STNSR 0x0c /* System Time – Nanoseconds Reg */
23 #define PTP_STSUR 0x10 /* System Time – Seconds Update Reg */
24 #define PTP_STNSUR 0x14 /* System Time – Nanoseconds Update Reg */
25 #define PTP_TAR 0x18 /* Timestamp Addend Reg */
[all …]
/Linux-v6.1/drivers/bus/
Domap_l3_noc.h16 #define CUSTOM_ERROR 0x2
17 #define STANDARD_ERROR 0x0
18 #define INBAND_ERROR 0x0
19 #define L3_APPLICATION_ERROR 0x0
20 #define L3_DEBUG_ERROR 0x1
23 #define L3_TARG_STDERRLOG_MAIN 0x48
24 #define L3_TARG_STDERRLOG_HDR 0x4c
25 #define L3_TARG_STDERRLOG_MSTADDR 0x50
26 #define L3_TARG_STDERRLOG_INFO 0x58
27 #define L3_TARG_STDERRLOG_SLVOFSLSB 0x5c
[all …]
/Linux-v6.1/arch/sh/kernel/cpu/sh4a/
Dsetup-shx3.c20 * This intentionally only registers SCIF ports 0, 1, and 3. SCIF 2
34 DEFINE_RES_MEM(0xffc30000, 0x100),
35 DEFINE_RES_IRQ(evt2irq(0x700)),
36 DEFINE_RES_IRQ(evt2irq(0x720)),
37 DEFINE_RES_IRQ(evt2irq(0x760)),
38 DEFINE_RES_IRQ(evt2irq(0x740)),
43 .id = 0,
57 DEFINE_RES_MEM(0xffc40000, 0x100),
58 DEFINE_RES_IRQ(evt2irq(0x780)),
59 DEFINE_RES_IRQ(evt2irq(0x7a0)),
[all …]
/Linux-v6.1/sound/soc/amd/acp/
Damd.h24 #define DMIC_INSTANCE 0x00
25 #define I2S_SP_INSTANCE 0x01
26 #define I2S_BT_INSTANCE 0x02
27 #define I2S_HS_INSTANCE 0x03
29 #define MEM_WINDOW_START 0x4080000
31 #define ACP_I2S_REG_START 0x1242400
32 #define ACP_I2S_REG_END 0x1242810
33 #define ACP3x_I2STDM_REG_START 0x1242400
34 #define ACP3x_I2STDM_REG_END 0x1242410
35 #define ACP3x_BT_TDM_REG_START 0x1242800
[all …]
/Linux-v6.1/arch/powerpc/boot/dts/
Dtqm5200.dts20 #size-cells = <0>;
22 PowerPC,5200@0 {
24 reg = <0>;
27 d-cache-size = <0x4000>; // L1, 16K
28 i-cache-size = <0x4000>; // L1, 16K
29 timebase-frequency = <0>; // from bootloader
30 bus-frequency = <0>; // from bootloader
31 clock-frequency = <0>; // from bootloader
35 memory@0 {
37 reg = <0x00000000 0x04000000>; // 64MB
[all …]

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