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/Linux-v6.1/Documentation/devicetree/bindings/remoteproc/
Dti,k3-r5f-rproc.yaml67 Should be either a value of 1 (LockStep mode) or 0 (Split mode) on
69 omitted; and should be either a value of 0 (Split mode) or 2
90 either of them can be configured to appear at that R5F's address 0x0.
163 enum: [0, 1]
167 either a value of 1 (enabled) or 0 (disabled), default is disabled
172 enum: [0, 1]
176 either a value of 1 (enabled) or 0 (disabled), default is enabled if
181 enum: [0, 1]
184 address 0 (from core's view). Should be either a value of 1 (ATCM
185 at 0x0) or 0 (BTCM at 0x0), default value is 1 if omitted.
[all …]
/Linux-v6.1/arch/arm64/boot/dts/ti/
Dk3-am65.dtsi70 ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
71 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
72 <0x00 0x00900000 0x00 0x00900000 0x00 0x00012000>, /* serdes */
73 <0x00 0x01000000 0x00 0x01000000 0x00 0x0af02400>, /* Most peripherals */
74 <0x00 0x30800000 0x00 0x30800000 0x00 0x0bc00000>, /* MAIN NAVSS */
75 <0x00 0x70000000 0x00 0x70000000 0x00 0x00200000>, /* MSMC SRAM */
76 <0x00 0x10000000 0x00 0x10000000 0x00 0x10000000>, /* PCIe DAT */
78 <0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>,
79 <0x00 0x40200000 0x00 0x40200000 0x00 0x00900100>,
80 <0x00 0x40f00000 0x00 0x40f00000 0x00 0x00020000>, /* CTRL_MMR0 */
[all …]
Dk3-j721s2.dtsi28 #size-cells = <0>;
41 cpu0: cpu@0 {
43 reg = <0x000>;
46 i-cache-size = <0xc000>;
49 d-cache-size = <0x8000>;
57 reg = <0x001>;
60 i-cache-size = <0xc000>;
63 d-cache-size = <0x8000>;
73 cache-size = <0x100000>;
115 ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
[all …]
Dk3-j7200.dtsi41 #size-cells = <0>;
55 cpu0: cpu@0 {
57 reg = <0x000>;
60 i-cache-size = <0xc000>;
63 d-cache-size = <0x8000>;
71 reg = <0x001>;
74 i-cache-size = <0xc000>;
77 d-cache-size = <0x8000>;
87 cache-size = <0x100000>;
127 ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
[all …]
Dk3-j721e.dtsi43 #size-cells = <0>;
57 cpu0: cpu@0 {
59 reg = <0x000>;
62 i-cache-size = <0xC000>;
65 d-cache-size = <0x8000>;
73 reg = <0x001>;
76 i-cache-size = <0xC000>;
79 d-cache-size = <0x8000>;
89 cache-size = <0x100000>;
130 ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
[all …]
Dk3-am65-mcu.dtsi11 reg = <0x0 0x40f00000 0x0 0x20000>;
14 ranges = <0x0 0x0 0x40f00000 0x20000>;
18 reg = <0x4040 0x4>;
25 reg = <0x00 0x40a00000 0x00 0x100>;
34 reg = <0x00 0x41c00000 0x00 0x80000>;
35 ranges = <0x0 0x00 0x41c00000 0x80000>;
42 reg = <0x0 0x40b00000 0x0 0x100>;
45 #size-cells = <0>;
53 reg = <0x0 0x40300000 0x0 0x400>;
58 #size-cells = <0>;
[all …]
Dk3-j7200-mcu-wakeup.dtsi19 reg = <0x00 0x44083000 0x00 0x1000>;
39 reg = <0x00 0x40f00000 0x00 0x20000>;
42 ranges = <0x00 0x00 0x40f00000 0x20000>;
46 reg = <0x4040 0x4>;
53 reg = <0x00 0x43000014 0x00 0x4>;
58 /* Proxy 0 addressing */
59 reg = <0x00 0x4301c000 0x00 0x178>;
62 pinctrl-single,function-mask = <0xffffffff>;
67 reg = <0x00 0x41c00000 0x00 0x100000>;
68 ranges = <0x00 0x00 0x41c00000 0x100000>;
[all …]
Dk3-j721e-mcu-wakeup.dtsi19 reg = <0x00 0x44083000 0x0 0x1000>;
39 reg = <0x0 0x40f00000 0x0 0x20000>;
42 ranges = <0x0 0x0 0x40f00000 0x20000>;
46 reg = <0x4040 0x4>;
53 reg = <0x0 0x43000014 0x0 0x4>;
58 /* Proxy 0 addressing */
59 reg = <0x00 0x4301c000 0x00 0x178>;
62 pinctrl-single,function-mask = <0xffffffff>;
67 reg = <0x00 0x41c00000 0x00 0x100000>;
68 ranges = <0x0 0x00 0x41c00000 0x100000>;
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/virtio/
Dpci-iommu.yaml40 BDF as 0b00000000 bbbbbbbb dddddfff 00000000. The other cells should be
63 reg = <0x0 0x40000000 0x0 0x1000000>;
64 ranges = <0x02000000 0x0 0x41000000 0x0 0x41000000 0x0 0x0f000000>;
70 iommu-map = <0x0 &iommu0 0x0 0x8
71 0x9 &iommu0 0x9 0xfff7>;
74 iommu0: iommu@1,0 {
76 reg = <0x800 0 0 0 0>;
85 reg = <0x0 0x50000000 0x0 0x1000000>;
86 ranges = <0x02000000 0x0 0x51000000 0x0 0x51000000 0x0 0x0f000000>;
90 * with endpoint IDs 0x10000 - 0x1ffff
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/pci/
Dhost-generic-pci.yaml94 property. If no "bus-range" is specified, this will be bus 0 (the
156 bus-range = <0x0 0x1>;
159 reg = <0x0 0x40000000 0x0 0x1000000>;
162 ranges = <0x01000000 0x0 0x01000000 0x0 0x01000000 0x0 0x00010000>,
163 <0x02000000 0x0 0x41000000 0x0 0x41000000 0x0 0x3f000000>;
165 #interrupt-cells = <0x1>;
168 interrupt-map = < 0x0 0x0 0x0 0x1 &gic 0x0 0x4 0x1>,
169 < 0x800 0x0 0x0 0x1 &gic 0x0 0x5 0x1>,
170 <0x1000 0x0 0x0 0x1 &gic 0x0 0x6 0x1>,
171 <0x1800 0x0 0x0 0x1 &gic 0x0 0x7 0x1>;
[all …]
Dcdns,cdns-pcie-host.yaml47 bus-range = <0x0 0xff>;
48 linux,pci-domain = <0>;
49 vendor-id = <0x17cd>;
50 device-id = <0x0200>;
52 reg = <0x0 0xfb000000 0x0 0x01000000>,
53 <0x0 0x41000000 0x0 0x00001000>;
56 ranges = <0x02000000 0x0 0x42000000 0x0 0x42000000 0x0 0x1000000>,
57 <0x01000000 0x0 0x43000000 0x0 0x43000000 0x0 0x0010000>;
58 dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x1 0x00000000>;
60 #interrupt-cells = <0x1>;
[all …]
Dversatile.yaml38 - const: 0x1800
39 - const: 0
40 - const: 0
58 reg = <0x10001000 0x1000>,
59 <0x41000000 0x10000>,
60 <0x42000000 0x100000>;
61 bus-range = <0 0xff>;
67 <0x01000000 0 0x00000000 0x43000000 0 0x00010000>, /* downstream I/O */
68 <0x02000000 0 0x50000000 0x50000000 0 0x10000000>, /* non-prefetchable memory */
69 <0x42000000 0 0x60000000 0x60000000 0 0x10000000>; /* prefetchable memory */
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/sound/
Dmrvl,pxa-ssp.txt22 reg = <0x41000000 0x40>;
24 clock-names = "pxa27x-ssp.0";
29 ssp_dai0: ssp_dai@0 {
32 #sound-dai-cells = <0>;
/Linux-v6.1/Documentation/devicetree/bindings/mtd/
Doxnas-nand.txt17 reg = <0x41000000 0x100000>;
21 #size-cells = <0>;
23 nand@0 {
24 reg = <0>;
30 partition@0 {
32 reg = <0x00000000 0x00e00000>;
38 reg = <0x00e00000 0x07200000>;
/Linux-v6.1/Documentation/devicetree/bindings/watchdog/
Dfaraday,ftwdt010.yaml56 reg = <0x41000000 0x1000>;
63 reg = <0x98500000 0x10>;
/Linux-v6.1/Documentation/devicetree/bindings/serial/
Dmrvl,pxa-ssp.txt23 reg = <0x41000000 0x40>;
26 clock-names = "pxa27x-ssp.0";
34 reg = <0x41700000 0x40>;
45 reg = <0x41900000 0x40>;
47 interrupts = <0>;
56 reg = <0x41a00000 0x40>;
/Linux-v6.1/Documentation/devicetree/bindings/pwm/
Dmicrochip,corepwm.yaml50 default: 0
64 default: 0
77 microchip,sync-update-mask = /bits/ 32 <0>;
79 reg = <0x41000000 0xF0>;
/Linux-v6.1/arch/arm/boot/dts/
Dversatile-pb.dts11 clear-mask = <0xffffffff>;
16 valid-mask = <0x7fe003ff>;
21 reg = <0x101e6000 0x1000>;
33 reg = <0x101e7000 0x1000>;
46 reg = <0x10001000 0x1000
47 0x41000000 0x10000
48 0x42000000 0x100000>;
49 bus-range = <0 0xff>;
54 ranges = <0x01000000 0 0x00000000 0x43000000 0 0x00010000 /* downstream I/O */
55 0x02000000 0 0x50000000 0x50000000 0 0x10000000 /* non-prefetchable memory */
[all …]
Dexynos4412-smdk4412.dts22 reg = <0x40000000 0x40000000>;
26 bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M init=/linuxrc";
33 clock-frequency = <0>;
44 #clock-cells = <0>;
70 pinctrl-0 = <&keypad_rows &keypad_cols>;
117 keypad,row = <0>;
129 keypad,row = <0>;
137 samsung,pins = "gpx2-0", "gpx2-1", "gpx2-2";
144 samsung,pins = "gpx1-0", "gpx1-1", "gpx1-2", "gpx1-3",
159 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4 &sd2_cd>;
Dexynos4210-smdkv310.dts25 reg = <0x40000000 0x80000000>;
29 bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M init=/linuxrc";
47 #clock-cells = <0>;
68 #size-cells = <0>;
75 reg = <0x50>;
80 reg = <0x52>;
90 pinctrl-0 = <&keypad_rows &keypad_cols>;
94 keypad,row = <0>;
100 keypad,row = <0>;
106 keypad,row = <0>;
[all …]
Ddra74x.dtsi49 reg = <0x41500000 0x100>;
55 reg = <0x41501000 0x4>,
56 <0x41501010 0x4>,
57 <0x41501014 0x4>;
65 clocks = <&dsp2_clkctrl DRA7_DSP2_MMU0_DSP2_CLKCTRL 0>;
69 ranges = <0x0 0x41501000 0x1000>;
73 mmu0_dsp2: mmu@0 {
75 reg = <0x0 0x100>;
77 #iommu-cells = <0>;
78 ti,syscon-mmuconfig = <&dsp2_system 0x0>;
[all …]
/Linux-v6.1/arch/arm/include/asm/hardware/
Ddec21285.h9 #define DC21285_PCI_IACK 0x79000000
10 #define DC21285_ARMCSR_BASE 0x42000000
11 #define DC21285_PCI_TYPE_0_CONFIG 0x7b000000
12 #define DC21285_PCI_TYPE_1_CONFIG 0x7a000000
13 #define DC21285_OUTBOUND_WRITE_FLUSH 0x78000000
14 #define DC21285_FLASH 0x41000000
15 #define DC21285_PCI_IO 0x7c000000
16 #define DC21285_PCI_MEM 0x80000000
26 * The footbridge is programmed to expose the system RAM at 0xe0000000.
27 * The requirement is that the RAM isn't placed at bus address 0, which
[all …]
/Linux-v6.1/arch/arm/configs/
Dexynos_defconfig18 CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC1,115200 init=/li…
/Linux-v6.1/arch/arm/mach-footbridge/
Dcommon.c100 return 0; in dc21285_get_irq()
122 mem_fclk_21285 = simple_strtoul(arg, NULL, 0); in early_fclk()
123 return 0; in early_fclk()
131 return 0; in parse_tag_memclk()
141 IRQ_MASK_UART_RX, /* 0 */
189 for (irq = _DC21285_IRQ(0); irq < _DC21285_IRQ(20); irq++) { in __fb_init_irq()
262 soft_restart(0x41000000); in footbridge_restart()
279 *CSR_TIMER4_LOAD = 0x2; in footbridge_restart()
280 *CSR_TIMER4_CLR = 0; in footbridge_restart()
/Linux-v6.1/arch/arm/kernel/
Dhead.S30 * the least significant 16 bits to be 0x8000, but we could probably
31 * relax this restriction to KERNEL_RAM_VADDR >= PAGE_OFFSET + 0x4000.
34 #if (KERNEL_RAM_VADDR & 0xffff) != 0x8000
35 #error KERNEL_RAM_VADDR must start at 0xXXXX8000
40 #define PG_DIR_SIZE 0x5000
43 #define PG_DIR_SIZE 0x4000
60 .long 0
61 .long 0
63 .long 0
64 .long 0
[all …]

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