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/Linux-v6.1/Documentation/devicetree/bindings/pci/
Dqcom,pcie-ep.yaml169 reg = <0x01c00000 0x3000>,
170 <0x40000000 0xf1d>,
171 <0x40000f20 0xc8>,
172 <0x40001000 0x1000>,
173 <0x40002000 0x1000>,
174 <0x01c03000 0x3000>;
188 qcom,perst-regs = <&tcsr 0xb258 0xb270>;
/Linux-v6.1/arch/arm/boot/dts/
Dqcom-sdx55.dtsi20 qcom,msm-id = <357 0x10000>, <368 0x10000>, <418 0x10000>;
25 reg = <0 0>;
31 #clock-cells = <0>;
38 #clock-cells = <0>;
44 #clock-cells = <0>;
51 #size-cells = <0>;
53 cpu0: cpu@0 {
56 reg = <0x0>;
108 reg = <0x8fc00000 0x80000>;
113 reg = <0x8fc80000 0x40000>;
[all …]
Dqcom-ipq4019.dtsi21 #address-cells = <0x1>;
22 #size-cells = <0x1>;
26 reg = <0x87e00000 0x080000>;
31 reg = <0x87e80000 0x180000>;
45 #size-cells = <0>;
46 cpu@0 {
53 reg = <0x0>;
55 clock-frequency = <0>;
67 reg = <0x1>;
69 clock-frequency = <0>;
[all …]
/Linux-v6.1/arch/arm64/boot/dts/qcom/
Dsm8450.dtsi29 #clock-cells = <0>;
35 #clock-cells = <0>;
42 #size-cells = <0>;
44 CPU0: cpu@0 {
47 reg = <0x0 0x0>;
52 qcom,freq-domain = <&cpufreq_hw 0>;
66 reg = <0x0 0x100>;
71 qcom,freq-domain = <&cpufreq_hw 0>;
82 reg = <0x0 0x200>;
87 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
Dsm8150.dtsi29 #clock-cells = <0>;
36 #clock-cells = <0>;
44 #size-cells = <0>;
46 CPU0: cpu@0 {
49 reg = <0x0 0x0>;
54 qcom,freq-domain = <&cpufreq_hw 0>;
73 reg = <0x0 0x100>;
78 qcom,freq-domain = <&cpufreq_hw 0>;
95 reg = <0x0 0x200>;
100 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
Dsdm845.dtsi75 reg = <0 0x80000000 0 0>;
84 reg = <0 0x85700000 0 0x600000>;
89 reg = <0 0x85e00000 0 0x100000>;
94 reg = <0 0x85fc0000 0 0x20000>;
100 reg = <0x0 0x85fe0000 0 0x20000>;
106 reg = <0x0 0x86000000 0 0x200000>;
112 reg = <0 0x86200000 0 0x2d00000>;
118 reg = <0 0x88f00000 0 0x200000>;
126 reg = <0 0x8ab00000 0 0x1400000>;
131 reg = <0 0x8bf00000 0 0x500000>;
[all …]
Dsc7280.dtsi77 #clock-cells = <0>;
83 #clock-cells = <0>;
94 reg = <0x0 0x004cd000 0x0 0x1000>;
98 reg = <0x0 0x80000000 0x0 0x600000>;
103 reg = <0x0 0x80600000 0x0 0x200000>;
108 reg = <0x0 0x80800000 0x0 0x60000>;
113 reg = <0x0 0x80860000 0x0 0x20000>;
119 reg = <0x0 0x80884000 0x0 0x10000>;
124 reg = <0x0 0x808ff000 0x0 0x1000>;
129 reg = <0x0 0x80900000 0x0 0x200000>;
[all …]
Dsm8250.dtsi80 #clock-cells = <0>;
88 #clock-cells = <0>;
94 #size-cells = <0>;
96 CPU0: cpu@0 {
99 reg = <0x0 0x0>;
106 qcom,freq-domain = <&cpufreq_hw 0>;
123 reg = <0x0 0x100>;
130 qcom,freq-domain = <&cpufreq_hw 0>;
144 reg = <0x0 0x200>;
151 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]