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/Linux-v5.15/Documentation/devicetree/bindings/powerpc/fsl/
Ddiu.txt20 reg = <0x2c000 100>;
28 reg = <0x2100 0x100>;
29 interrupts = <64 0x8>;
/Linux-v5.15/Documentation/devicetree/bindings/slimbus/
Dslim-ngd-qcom-ctrl.txt46 Definition: Should be 0
69 reg = <0x91c0000 0x2c000>;
70 interrupts = <0 163 0>;
74 #size-cells = <0>;
81 reg = <1 0>;
/Linux-v5.15/Documentation/devicetree/bindings/net/
Dqcom,ipa.yaml196 iommus = <&apps_smmu 0x720 0x3>;
197 reg = <0x1e40000 0x7000>,
198 <0x1e47000 0x2000>,
199 <0x1e04000 0x2c000>;
206 <&ipa_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
224 qcom,smem-states = <&ipa_smp2p_out 0>,
/Linux-v5.15/arch/powerpc/boot/dts/fsl/
Db4si-post.dtsi37 alloc-ranges = <0 0 0x10000 0>;
42 alloc-ranges = <0 0 0x10000 0>;
47 alloc-ranges = <0 0 0x10000 0>;
54 interrupts = <25 2 0 0>;
57 /* controller at 0x200000 */
63 bus-range = <0x0 0xff>;
64 interrupts = <20 2 0 0>;
66 pcie@0 {
71 reg = <0 0 0 0 0>;
72 interrupts = <20 2 0 0>;
[all …]
Dt2081si-post.dtsi37 alloc-ranges = <0 0 0x10000 0>;
42 alloc-ranges = <0 0 0x10000 0>;
47 alloc-ranges = <0 0 0x10000 0>;
54 interrupts = <25 2 0 0>;
57 /* controller at 0x240000 */
59 compatible = "fsl,t2080-pcie", "fsl,qoriq-pcie-v3.0", "fsl,qoriq-pcie";
63 bus-range = <0x0 0xff>;
64 interrupts = <20 2 0 0>;
66 pcie@0 {
67 reg = <0 0 0 0 0>;
[all …]
Dt4240si-post.dtsi37 alloc-ranges = <0 0 0x10000 0>;
42 alloc-ranges = <0 0 0x10000 0>;
47 alloc-ranges = <0 0 0x10000 0>;
54 interrupts = <25 2 0 0>;
57 /* controller at 0x240000 */
59 compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0";
63 bus-range = <0x0 0xff>;
64 interrupts = <20 2 0 0>;
65 pcie@0 {
70 reg = <0 0 0 0 0>;
[all …]
/Linux-v5.15/arch/powerpc/boot/dts/
Dmpc8308rdb.dts26 #size-cells = <0>;
28 PowerPC,8308@0 {
30 reg = <0x0>;
35 timebase-frequency = <0>; // from bootloader
36 bus-frequency = <0>; // from bootloader
37 clock-frequency = <0>; // from bootloader
43 reg = <0x00000000 0x08000000>; // 128MB at 0
50 reg = <0xe0005000 0x1000>;
51 interrupts = <77 0x8>;
57 ranges = <0x0 0x0 0xfe000000 0x00800000
[all …]
Dmpc8308_p1m.dts25 #size-cells = <0>;
27 PowerPC,8308@0 {
29 reg = <0x0>;
34 timebase-frequency = <0>; // from bootloader
35 bus-frequency = <0>; // from bootloader
36 clock-frequency = <0>; // from bootloader
42 reg = <0x00000000 0x08000000>; // 128MB at 0
49 reg = <0xe0005000 0x1000>;
50 interrupts = <77 0x8>;
53 ranges = <0x0 0x0 0xfc000000 0x04000000
[all …]
Dmpc8610_hpcd.dts26 #size-cells = <0>;
28 PowerPC,8610@0 {
30 reg = <0>;
35 sleep = <&pmc 0x00008000 0 // core
36 &pmc 0x00004000 0>; // timebase
37 timebase-frequency = <0>; // From uboot
38 bus-frequency = <0>; // From uboot
39 clock-frequency = <0>; // From uboot
45 reg = <0x00000000 0x20000000>; // 512M at 0x0
52 reg = <0xe0005000 0x1000>;
[all …]
/Linux-v5.15/include/linux/soundwire/
Dsdw_intel.h10 #define SDW_SHIM_BASE 0x2C000
11 #define SDW_ALH_BASE 0x2C800
12 #define SDW_LINK_BASE 0x30000
13 #define SDW_LINK_SIZE 0x10000
16 #define SDW_SHIM_LCAP 0x0
17 #define SDW_SHIM_LCTL 0x4
18 #define SDW_SHIM_IPPTR 0x8
19 #define SDW_SHIM_SYNC 0xC
21 #define SDW_SHIM_CTLSCAP(x) (0x010 + 0x60 * (x))
22 #define SDW_SHIM_CTLS0CM(x) (0x012 + 0x60 * (x))
[all …]
/Linux-v5.15/drivers/gpu/drm/lima/
Dlima_device.c51 LIMA_IP_DESC(pmu, false, false, 0x02000, 0x02000, pmu, "pmu"),
52 LIMA_IP_DESC(l2_cache0, true, true, 0x01000, 0x10000, l2_cache, NULL),
53 LIMA_IP_DESC(l2_cache1, false, true, -1, 0x01000, l2_cache, NULL),
54 LIMA_IP_DESC(l2_cache2, false, false, -1, 0x11000, l2_cache, NULL),
55 LIMA_IP_DESC(gp, true, true, 0x00000, 0x00000, gp, "gp"),
56 LIMA_IP_DESC(pp0, true, true, 0x08000, 0x08000, pp, "pp0"),
57 LIMA_IP_DESC(pp1, false, false, 0x0A000, 0x0A000, pp, "pp1"),
58 LIMA_IP_DESC(pp2, false, false, 0x0C000, 0x0C000, pp, "pp2"),
59 LIMA_IP_DESC(pp3, false, false, 0x0E000, 0x0E000, pp, "pp3"),
60 LIMA_IP_DESC(pp4, false, false, -1, 0x28000, pp, "pp4"),
[all …]
/Linux-v5.15/arch/arm/boot/dts/
Dqcom-sdx55.dtsi19 qcom,msm-id = <357 0x10000>, <368 0x10000>, <418 0x10000>;
24 reg = <0 0>;
30 #clock-cells = <0>;
37 #clock-cells = <0>;
43 #clock-cells = <0>;
50 #size-cells = <0>;
52 cpu0: cpu@0 {
55 reg = <0x0>;
107 reg = <0x8fc00000 0x80000>;
112 reg = <0x8fc80000 0x40000>;
[all …]
Ddra7-l4.dtsi1 &l4_cfg { /* 0x4a000000 */
4 clocks = <&l4cfg_clkctrl DRA7_L4CFG_L4_CFG_CLKCTRL 0>;
6 reg = <0x4a000000 0x800>,
7 <0x4a000800 0x800>,
8 <0x4a001000 0x1000>;
12 ranges = <0x00000000 0x4a000000 0x100000>, /* segment 0 */
13 <0x00100000 0x4a100000 0x100000>, /* segment 1 */
14 <0x00200000 0x4a200000 0x100000>; /* segment 2 */
16 segment@0 { /* 0x4a000000 */
20 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */
[all …]
/Linux-v5.15/drivers/clk/qcom/
Dgcc-sdx55.c34 { 249600000, 2000000000, 0 },
38 .offset = 0x0,
43 .enable_reg = 0x6d000,
44 .enable_mask = BIT(0),
57 { 0x0, 1 },
58 { 0x1, 2 },
59 { 0x3, 4 },
60 { 0x7, 8 },
65 .offset = 0x0,
82 .offset = 0x76000,
[all …]
Dgcc-msm8998.c39 { P_XO, 0 },
53 { P_XO, 0 },
65 { P_XO, 0 },
81 { P_XO, 0 },
93 { P_XO, 0 },
107 { P_XO, 0 },
132 { 250000000, 2000000000, 0 },
137 .offset = 0x0,
142 .enable_reg = 0x52000,
143 .enable_mask = BIT(0),
[all …]
Dgcc-msm8916.c46 { P_XO, 0 },
56 { P_XO, 0 },
68 { P_XO, 0 },
82 { P_XO, 0 },
94 { P_XO, 0 },
104 { P_XO, 0 },
118 { P_XO, 0 },
130 { P_XO, 0, },
140 { P_XO, 0 },
152 { P_XO, 0 },
[all …]
Dgcc-msm8996.c50 { P_XO, 0 },
60 { P_XO, 0 },
70 { P_XO, 0 },
82 { P_XO, 0 },
94 { P_XO, 0 },
106 { P_XO, 0 },
120 { P_XO, 0 },
134 { P_XO, 0 },
152 { P_XO, 0 },
183 .offset = 0x00000,
[all …]
Dgcc-msm8939.c54 .l_reg = 0x21004,
55 .m_reg = 0x21008,
56 .n_reg = 0x2100c,
57 .config_reg = 0x21010,
58 .mode_reg = 0x21000,
59 .status_reg = 0x2101c,
72 .enable_reg = 0x45000,
73 .enable_mask = BIT(0),
85 .l_reg = 0x20004,
86 .m_reg = 0x20008,
[all …]
Dgcc-ipq8074.c58 { P_XO, 0 },
69 { P_XO, 0 },
81 { P_XO, 0 },
94 { P_XO, 0 },
107 { P_XO, 0 },
120 { P_XO, 0 },
131 { P_USB3PHY_0_PIPE, 0 },
141 { P_USB3PHY_1_PIPE, 0 },
151 { P_PCIE20_PHY0_PIPE, 0 },
161 { P_PCIE20_PHY1_PIPE, 0 },
[all …]
/Linux-v5.15/drivers/rapidio/devices/
Dtsi721.h13 DBG_NONE = 0,
14 DBG_INIT = BIT(0), /* driver init */
26 DBG_ALL = ~0,
36 } while (0)
53 #define DEFAULT_HOPCOUNT 0xff
54 #define DEFAULT_DESTID 0xff
57 #define PCI_DEVICE_ID_TSI721 0x80ab
59 #define BAR_0 0
67 #define TSI721_MAINT_WIN 0 /* Window for outbound maintenance requests */
68 #define IDB_QUEUE 0 /* Inbound Doorbell Queue to use */
[all …]
/Linux-v5.15/drivers/net/wireless/mediatek/mt76/mt7603/
Dregs.h6 #define MT_HW_REV 0x1000
7 #define MT_HW_CHIPID 0x1008
8 #define MT_TOP_MISC2 0x1134
10 #define MT_MCU_BASE 0x2000
13 #define MT_MCU_PCIE_REMAP_1 MT_MCU(0x500)
14 #define MT_MCU_PCIE_REMAP_1_OFFSET GENMASK(17, 0)
17 #define MT_MCU_PCIE_REMAP_2 MT_MCU(0x504)
18 #define MT_MCU_PCIE_REMAP_2_OFFSET GENMASK(18, 0)
21 #define MT_HIF_BASE 0x4000
24 #define MT_INT_SOURCE_CSR MT_HIF(0x200)
[all …]
/Linux-v5.15/arch/arm64/boot/dts/qcom/
Dsdm845.dtsi73 reg = <0 0x80000000 0 0>;
82 reg = <0 0x85700000 0 0x600000>;
87 reg = <0 0x85e00000 0 0x100000>;
92 reg = <0 0x85fc0000 0 0x20000>;
98 reg = <0x0 0x85fe0000 0 0x20000>;
103 reg = <0x0 0x86000000 0 0x200000>;
108 reg = <0 0x86200000 0 0x2d00000>;
114 reg = <0 0x88f00000 0 0x200000>;
122 reg = <0 0x8ab00000 0 0x1400000>;
127 reg = <0 0x8bf00000 0 0x500000>;
[all …]
Dmsm8996.dtsi24 #clock-cells = <0>;
31 #clock-cells = <0>;
39 #size-cells = <0>;
41 CPU0: cpu@0 {
44 reg = <0x0 0x0>;
48 clocks = <&kryocc 0>;
61 reg = <0x0 0x1>;
65 clocks = <&kryocc 0>;
74 reg = <0x0 0x100>;
91 reg = <0x0 0x101>;
[all …]
Dsc7180.dtsi62 #clock-cells = <0>;
68 #clock-cells = <0>;
78 reg = <0x0 0x80000000 0x0 0x600000>;
83 reg = <0x0 0x80600000 0x0 0x200000>;
88 reg = <0x0 0x80800000 0x0 0x20000>;
93 reg = <0x0 0x80820000 0x0 0x20000>;
99 reg = <0x0 0x808ff000 0x0 0x1000>;
104 reg = <0x0 0x80900000 0x0 0x200000>;
109 reg = <0x0 0x80b00000 0x0 0x3900000>;
114 reg = <0 0x8b700000 0 0x10000>;
[all …]
/Linux-v5.15/tools/perf/util/
Dmachine.c62 for (i = 0; i < THREADS__TABLE_SIZE; i++) { in machine__threads_init()
66 threads->nr = 0; in machine__threads_init()
79 machine->pid) < 0) in machine__set_mmap_name()
82 return machine->mmap_name ? 0 : -ENOMEM; in machine__set_mmap_name()
89 memset(machine, 0, sizeof(*machine)); in machine__init()
101 machine->id_hdr_size = 0; in machine__init()
104 machine->kernel_start = 0; in machine__init()
123 thread__set_comm(thread, comm, 0); in machine__init()
128 err = 0; in machine__init()
135 return 0; in machine__init()
[all …]

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