Searched +full:0 +full:x20100000 (Results 1 – 15 of 15) sorted by relevance
/Linux-v6.1/Documentation/devicetree/bindings/dma/ |
D | sprd-dma.txt | 23 reg = <0x20100000 0x4000>;
|
/Linux-v6.1/Documentation/devicetree/bindings/arm/ |
D | arm,coresight-stm.yaml | 90 reg = <0x20100000 0x1000>, 91 <0x28000000 0x180000>;
|
/Linux-v6.1/arch/arm64/boot/dts/sprd/ |
D | whale2.dtsi | 24 reg = <0 0x20210000 0 0x10000>; 29 reg = <0 0x402b0000 0 0x10000>; 34 reg = <0 0x402e0000 0 0x10000>; 39 reg = <0 0x40400000 0 0x10000>; 44 reg = <0 0x415e0000 0 0x1000000>; 49 reg = <0 0x61100000 0 0x10000>; 54 reg = <0 0x62100000 0 0x10000>; 59 reg = <0 0x63100000 0 0x10000>; 64 reg = <0 0x70b00000 0 0x40000>; 71 ranges = <0 0x0 0x70000000 0x10000000>; [all …]
|
/Linux-v6.1/arch/riscv/boot/dts/microchip/ |
D | mpfs.dtsi | 15 #size-cells = <0>; 17 cpu0: cpu@0 { 23 reg = <0>; 173 #clock-cells = <0>; 178 mboxes = <&mbox 0>; 189 reg = <0x0 0x2010000 0x0 0x1000>; 201 reg = <0x0 0x2000000 0x0 0xC000>; 210 compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0"; 211 reg = <0x0 0xc000000 0x0 0x4000000>; 212 #address-cells = <0>; [all …]
|
/Linux-v6.1/drivers/gpu/drm/nouveau/nvkm/engine/gr/ |
D | ctxgf110.c | 32 { 0x001000, 1, 0x01, 0x00000004 }, 33 { 0x0000a9, 1, 0x01, 0x0000ffff }, 34 { 0x000038, 1, 0x01, 0x0fac6881 }, 35 { 0x00003d, 1, 0x01, 0x00000001 }, 36 { 0x0000e8, 8, 0x01, 0x00000400 }, 37 { 0x000078, 8, 0x01, 0x00000300 }, 38 { 0x000050, 1, 0x01, 0x00000011 }, 39 { 0x000058, 8, 0x01, 0x00000008 }, 40 { 0x000208, 8, 0x01, 0x00000001 }, 41 { 0x000081, 1, 0x01, 0x00000001 }, [all …]
|
/Linux-v6.1/arch/arm64/boot/dts/ti/ |
D | k3-am62-main.dtsi | 11 reg = <0x00 0x70000000 0x00 0x10000>; 14 ranges = <0x0 0x00 0x70000000 0x10000>; 24 reg = <0x00 0x01800000 0x00 0x10000>, /* GICD */ 25 <0x00 0x01880000 0x00 0xc0000>, /* GICR */ 26 <0x00 0x01880000 0x00 0xc0000>, /* GICR */ 27 <0x01 0x00000000 0x00 0x2000>, /* GICC */ 28 <0x01 0x00010000 0x00 0x1000>, /* GICH */ 29 <0x01 0x00020000 0x00 0x2000>; /* GICV */ 38 reg = <0x00 0x01820000 0x00 0x10000>; 39 socionext,synquacer-pre-its = <0x1000000 0x400000>; [all …]
|
D | k3-am64-main.dtsi | 13 #clock-cells = <0>; 15 clock-frequency = <0>; 22 reg = <0x00 0x70000000 0x00 0x200000>; 25 ranges = <0x0 0x00 0x70000000 0x200000>; 28 reg = <0x1c0000 0x20000>; 32 reg = <0x1e0000 0x1c000>; 36 reg = <0x1fc000 0x4000>; 42 reg = <0x0 0x43000000 0x0 0x20000>; 45 ranges = <0x0 0x0 0x43000000 0x20000>; 50 mux-reg-masks = <0x4080 0x3>; /* SERDES0 lane0 select */ [all …]
|
/Linux-v6.1/arch/arm64/boot/dts/qcom/ |
D | ipq6018.dtsi | 22 #clock-cells = <0>; 28 #clock-cells = <0>; 34 #size-cells = <0>; 36 CPU0: cpu@0 { 39 reg = <0x0>; 52 reg = <0x1>; 64 reg = <0x2>; 76 reg = <0x3>; 86 cache-level = <0x2>; 149 reg = <0x0 0x60000 0x0 0x6000>; [all …]
|
D | ipq8074.dtsi | 21 #clock-cells = <0>; 27 #clock-cells = <0>; 32 #address-cells = <0x1>; 33 #size-cells = <0x0>; 35 CPU0: cpu@0 { 38 reg = <0x0>; 47 reg = <0x1>; 55 reg = <0x2>; 63 reg = <0x3>; 69 cache-level = <0x2>; [all …]
|
/Linux-v6.1/arch/arm64/boot/dts/arm/ |
D | juno-base.dtsi | 12 reg = <0x0 0x2a810000 0x0 0x10000>; 16 ranges = <0 0x0 0x2a820000 0x20000>; 21 reg = <0x10000 0x10000>; 27 reg = <0x0 0x2b1f0000 0x0 0x1000>; 38 reg = <0x0 0x2b400000 0x0 0x10000>; 50 reg = <0x0 0x2b500000 0x0 0x10000>; 61 reg = <0x0 0x2b600000 0x0 0x10000>; 67 power-domains = <&scpi_devpd 0>; 72 reg = <0x0 0x2c010000 0 0x1000>, 73 <0x0 0x2c02f000 0 0x2000>, [all …]
|
/Linux-v6.1/drivers/soc/tegra/cbb/ |
D | tegra194-cbb.c | 30 #define ERRLOGGER_0_ID_COREID_0 0x00000000 31 #define ERRLOGGER_0_ID_REVISIONID_0 0x00000004 32 #define ERRLOGGER_0_FAULTEN_0 0x00000008 33 #define ERRLOGGER_0_ERRVLD_0 0x0000000c 34 #define ERRLOGGER_0_ERRCLR_0 0x00000010 35 #define ERRLOGGER_0_ERRLOG0_0 0x00000014 36 #define ERRLOGGER_0_ERRLOG1_0 0x00000018 37 #define ERRLOGGER_0_RSVD_00_0 0x0000001c 38 #define ERRLOGGER_0_ERRLOG3_0 0x00000020 39 #define ERRLOGGER_0_ERRLOG4_0 0x00000024 [all …]
|
/Linux-v6.1/drivers/clk/sprd/ |
D | ums512-clk.c | 33 static CLK_FIXED_FACTOR_FW_NAME(clk_26m_aud, "clk-26m-aud", "ext-26m", 1, 1, 0); 34 static CLK_FIXED_FACTOR_FW_NAME(clk_13m, "clk-13m", "ext-26m", 2, 1, 0); 35 static CLK_FIXED_FACTOR_FW_NAME(clk_6m5, "clk-6m5", "ext-26m", 4, 1, 0); 36 static CLK_FIXED_FACTOR_FW_NAME(clk_4m3, "clk-4m3", "ext-26m", 6, 1, 0); 37 static CLK_FIXED_FACTOR_FW_NAME(clk_2m, "clk-2m", "ext-26m", 13, 1, 0); 38 static CLK_FIXED_FACTOR_FW_NAME(clk_1m, "clk-1m", "ext-26m", 26, 1, 0); 39 static CLK_FIXED_FACTOR_FW_NAME(clk_250k, "clk-250k", "ext-26m", 104, 1, 0); 40 static CLK_FIXED_FACTOR_FW_NAME(rco_25m, "rco-25m", "rco-100m", 4, 1, 0); 41 static CLK_FIXED_FACTOR_FW_NAME(rco_4m, "rco-4m", "rco-100m", 25, 1, 0); 42 static CLK_FIXED_FACTOR_FW_NAME(rco_2m, "rco-2m", "rco-100m", 50, 1, 0); [all …]
|
/Linux-v6.1/lib/crypto/ |
D | des.c | 31 0x00, 0x00, 0x40, 0x04, 0x10, 0x10, 0x50, 0x14, 32 0x04, 0x40, 0x44, 0x44, 0x14, 0x50, 0x54, 0x54, 33 0x02, 0x02, 0x42, 0x06, 0x12, 0x12, 0x52, 0x16, 34 0x06, 0x42, 0x46, 0x46, 0x16, 0x52, 0x56, 0x56, 35 0x80, 0x08, 0xc0, 0x0c, 0x90, 0x18, 0xd0, 0x1c, 36 0x84, 0x48, 0xc4, 0x4c, 0x94, 0x58, 0xd4, 0x5c, 37 0x82, 0x0a, 0xc2, 0x0e, 0x92, 0x1a, 0xd2, 0x1e, 38 0x86, 0x4a, 0xc6, 0x4e, 0x96, 0x5a, 0xd6, 0x5e, 39 0x20, 0x20, 0x60, 0x24, 0x30, 0x30, 0x70, 0x34, 40 0x24, 0x60, 0x64, 0x64, 0x34, 0x70, 0x74, 0x74, [all …]
|
/Linux-v6.1/drivers/net/wireless/realtek/rtw88/ |
D | rtw8822c_table.c | 16 0x83000000, 0x00000000, 0x40000000, 0x00000000, 17 0x1D90, 0x300001FF, 18 0x1D90, 0x300101FE, 19 0x1D90, 0x300201FD, 20 0x1D90, 0x300301FC, 21 0x1D90, 0x300401FB, 22 0x1D90, 0x300501FA, 23 0x1D90, 0x300601F9, 24 0x1D90, 0x300701F8, 25 0x1D90, 0x300801F7, [all …]
|
/Linux-v6.1/drivers/net/ethernet/broadcom/bnx2x/ |
D | bnx2x_hsi.h | 17 #define FW_ENCODE_32BIT_PATTERN 0x1e1e1e1e 23 #define BNX2X_MAX_ISCSI_TRGT_CONN_MASK 0xFFFF 24 #define BNX2X_MAX_ISCSI_TRGT_CONN_SHIFT 0 25 #define BNX2X_MAX_ISCSI_INIT_CONN_MASK 0xFFFF0000 31 #define BNX2X_MAX_FCOE_TRGT_CONN_MASK 0xFFFF 32 #define BNX2X_MAX_FCOE_TRGT_CONN_SHIFT 0 33 #define BNX2X_MAX_FCOE_INIT_CONN_MASK 0xFFFF0000 42 #define PIN_CFG_NA 0x00000000 43 #define PIN_CFG_GPIO0_P0 0x00000001 44 #define PIN_CFG_GPIO1_P0 0x00000002 [all …]
|