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/Linux-v5.10/drivers/net/ethernet/broadcom/bnx2x/
Dbnx2x_dump.h22 #define DRV_DUMP_XSTORM_WAITP_ADDRESS 0x2b8a80
23 #define DRV_DUMP_TSTORM_WAITP_ADDRESS 0x1b8a80
24 #define DRV_DUMP_USTORM_WAITP_ADDRESS 0x338a80
25 #define DRV_DUMP_CSTORM_WAITP_ADDRESS 0x238a80
45 #define BNX2X_DUMP_VERSION 0x61111111
65 static const u32 page_vals_e2[] = {0, 128};
68 {0x58000, 4608, DUMP_CHIP_E2, 0x30}
74 static const u32 page_vals_e3[] = {0, 128};
77 {0x58000, 4608, DUMP_CHIP_E3A0 | DUMP_CHIP_E3B0, 0x30}
81 { 0x2000, 1, 0x1f, 0xfff},
[all …]
Dbnx2x_self_test.c6 #define NA 0xCD
8 #define IDLE_CHK_E1 0x01
9 #define IDLE_CHK_E1H 0x02
10 #define IDLE_CHK_E2 0x04
11 #define IDLE_CHK_E3A0 0x08
12 #define IDLE_CHK_E3B0 0x10
118 /*line 2*/{(0x3), 1, 0x2114,
119 NA, 1, 0, pand_neq,
121 "PCIE: ucorr_err_status is not 0",
122 {NA, NA, 0x0FF010, 0, NA, NA} },
[all …]
/Linux-v5.10/drivers/gpu/drm/panel/
Dpanel-leadtek-ltk050h3146w.c43 { 0x22, 0x0A }, /* BGR SS GS */
44 { 0x31, 0x00 }, /* column inversion */
45 { 0x53, 0xA2 }, /* VCOM1 */
46 { 0x55, 0xA2 }, /* VCOM2 */
47 { 0x50, 0x81 }, /* VREG1OUT=5V */
48 { 0x51, 0x85 }, /* VREG2OUT=-5V */
49 { 0x62, 0x0D }, /* EQT Time setting */
54 { 0xA0, 0x00 },
55 { 0xA1, 0x1A },
56 { 0xA2, 0x28 },
[all …]
Dpanel-samsung-s6e8aa0.c34 #define PANELCTL_SS_1_800 (0 << 5)
41 #define PANELCTL_CLK1_000 (0 << 3)
43 #define PANELCTL_CLK2_CON_MASK (7 << 0)
44 #define PANELCTL_CLK2_000 (0 << 0)
45 #define PANELCTL_CLK2_001 (1 << 0)
48 #define PANELCTL_INT1_000 (0 << 3)
50 #define PANELCTL_INT2_CON_MASK (7 << 0)
51 #define PANELCTL_INT2_000 (0 << 0)
52 #define PANELCTL_INT2_001 (1 << 0)
55 #define PANELCTL_BICTL_000 (0 << 3)
[all …]
Dpanel-feixin-k101-im2ba02.c43 /* Switch to page 0 */
44 { .data = { 0xE0, 0x00 } },
47 { .data = { 0xE1, 0x93} },
48 { .data = { 0xE2, 0x65 } },
49 { .data = { 0xE3, 0xF8 } },
51 /* Lane number, 0x02 - 3 lanes, 0x03 - 4 lanes */
52 { .data = { 0x80, 0x03 } },
55 { .data = { 0x70, 0x02 } },
56 { .data = { 0x71, 0x23 } },
57 { .data = { 0x72, 0x06 } },
[all …]
/Linux-v5.10/drivers/net/ethernet/realtek/
Dr8169_phy_config.c23 int oldpage = phy_select_page(phydev, 0x0007); in r8168d_modify_extpage()
25 __phy_write(phydev, 0x1e, extpage); in r8168d_modify_extpage()
28 phy_restore_page(phydev, oldpage, 0); in r8168d_modify_extpage()
34 int oldpage = phy_select_page(phydev, 0x0005); in r8168d_phy_param()
36 __phy_write(phydev, 0x05, parm); in r8168d_phy_param()
37 __phy_modify(phydev, 0x06, mask, val); in r8168d_phy_param()
39 phy_restore_page(phydev, oldpage, 0); in r8168d_phy_param()
45 int oldpage = phy_select_page(phydev, 0x0a43); in r8168g_phy_param()
47 __phy_write(phydev, 0x13, parm); in r8168g_phy_param()
48 __phy_modify(phydev, 0x14, mask, val); in r8168g_phy_param()
[all …]
/Linux-v5.10/drivers/staging/media/hantro/
Dhantro_g1_regs.h15 #define G1_REG_INTERRUPT 0x004
26 #define G1_REG_INTERRUPT_DEC_E BIT(0)
27 #define G1_REG_CONFIG 0x008
28 #define G1_REG_CONFIG_DEC_AXI_RD_ID(x) (((x) & 0xff) << 24)
37 #define G1_REG_CONFIG_DEC_LATENCY(x) (((x) & 0x3f) << 11)
41 #define G1_REG_CONFIG_PRIORITY_MODE(x) (((x) & 0x7) << 5)
45 #define G1_REG_CONFIG_DEC_MAX_BURST(x) (((x) & 0x1f) << 0)
46 #define G1_REG_DEC_CTRL0 0x00c
47 #define G1_REG_DEC_CTRL0_DEC_MODE(x) (((x) & 0xf) << 28)
70 #define G1_REG_DEC_CTRL0_DEC_AXI_WR_ID(x) (((x) & 0xff) << 0)
[all …]
Drk3399_vpu_regs.h13 #define VEPU_REG_VP8_QUT_1ST(i) (0x000 + ((i) * 0x24))
14 #define VEPU_REG_VP8_QUT_DC_Y2(x) (((x) & 0x3fff) << 16)
15 #define VEPU_REG_VP8_QUT_DC_Y1(x) (((x) & 0x3fff) << 0)
16 #define VEPU_REG_VP8_QUT_2ND(i) (0x004 + ((i) * 0x24))
17 #define VEPU_REG_VP8_QUT_AC_Y1(x) (((x) & 0x3fff) << 16)
18 #define VEPU_REG_VP8_QUT_DC_CHR(x) (((x) & 0x3fff) << 0)
19 #define VEPU_REG_VP8_QUT_3RD(i) (0x008 + ((i) * 0x24))
20 #define VEPU_REG_VP8_QUT_AC_CHR(x) (((x) & 0x3fff) << 16)
21 #define VEPU_REG_VP8_QUT_AC_Y2(x) (((x) & 0x3fff) << 0)
22 #define VEPU_REG_VP8_QUT_4TH(i) (0x00c + ((i) * 0x24))
[all …]
/Linux-v5.10/drivers/net/wireless/ath/ath9k/
Dar9003_aic.c25 0, 3, 9, 15, 21, 27
67 for (i = index - 1; i >= 0; i--) { in ar9003_aic_find_valid()
73 if ((i >= ATH_AIC_MAX_BT_CHANNEL) || (i < 0)) in ar9003_aic_find_valid()
80 * type 0: aic_lin_table, 1: com_att_db_table
86 if (type == 0) { in ar9003_aic_find_index()
87 for (i = ATH_AIC_MAX_AIC_LIN_TABLE - 1; i >= 0; i--) { in ar9003_aic_find_index()
92 for (i = 0; i < ATH_AIC_MAX_COM_ATT_DB_TABLE; i++) { in ar9003_aic_find_index()
111 REG_WRITE(ah, AR_PHY_BT_COEX_4, 0x2c200a00); in ar9003_aic_gain_table()
112 REG_WRITE(ah, AR_PHY_BT_COEX_5, 0x5c4e4438); in ar9003_aic_gain_table()
115 aic_atten_word[0] = (0x1 & 0xf) << 14 | (0x1f & 0x1f) << 9 | (0x0 & 0xf) << 5 | in ar9003_aic_gain_table()
[all …]
/Linux-v5.10/drivers/media/platform/ti-vpe/
Dvpe_regs.h16 #define VPE_PID 0x0000
17 #define VPE_PID_MINOR_MASK 0x3f
18 #define VPE_PID_MINOR_SHIFT 0
19 #define VPE_PID_CUSTOM_MASK 0x03
21 #define VPE_PID_MAJOR_MASK 0x07
23 #define VPE_PID_RTL_MASK 0x1f
25 #define VPE_PID_FUNC_MASK 0xfff
27 #define VPE_PID_SCHEME_MASK 0x03
30 #define VPE_SYSCONFIG 0x0010
31 #define VPE_SYSCONFIG_IDLE_MASK 0x03
[all …]
/Linux-v5.10/sound/soc/amd/include/
Dacp_2_2_sh_mask.h27 #define ACP_DMA_CNTL_0__DMAChRst_MASK 0x1
28 #define ACP_DMA_CNTL_0__DMAChRst__SHIFT 0x0
29 #define ACP_DMA_CNTL_0__DMAChRun_MASK 0x2
30 #define ACP_DMA_CNTL_0__DMAChRun__SHIFT 0x1
31 #define ACP_DMA_CNTL_0__DMAChIOCEn_MASK 0x4
32 #define ACP_DMA_CNTL_0__DMAChIOCEn__SHIFT 0x2
33 #define ACP_DMA_CNTL_0__Circular_DMA_En_MASK 0x8
34 #define ACP_DMA_CNTL_0__Circular_DMA_En__SHIFT 0x3
35 #define ACP_DMA_CNTL_0__DMAChGracefulRstEn_MASK 0x10
36 #define ACP_DMA_CNTL_0__DMAChGracefulRstEn__SHIFT 0x4
[all …]
/Linux-v5.10/arch/powerpc/math-emu/
Dmath.c80 #define OP31 0x1f /* 31 */
81 #define LFS 0x30 /* 48 */
82 #define LFSU 0x31 /* 49 */
83 #define LFD 0x32 /* 50 */
84 #define LFDU 0x33 /* 51 */
85 #define STFS 0x34 /* 52 */
86 #define STFSU 0x35 /* 53 */
87 #define STFD 0x36 /* 54 */
88 #define STFDU 0x37 /* 55 */
89 #define OP59 0x3b /* 59 */
[all …]
/Linux-v5.10/drivers/net/phy/
Dvitesse.c15 #define MII_VSC82X4_EXT_PAGE_16E 0x10
16 #define MII_VSC82X4_EXT_PAGE_17E 0x11
17 #define MII_VSC82X4_EXT_PAGE_18E 0x12
20 #define MII_VSC8244_EXT_CON1 0x17
21 #define MII_VSC8244_EXTCON1_INIT 0x0000
22 #define MII_VSC8244_EXTCON1_TX_SKEW_MASK 0x0c00
23 #define MII_VSC8244_EXTCON1_RX_SKEW_MASK 0x0300
24 #define MII_VSC8244_EXTCON1_TX_SKEW 0x0800
25 #define MII_VSC8244_EXTCON1_RX_SKEW 0x0200
28 #define MII_VSC8244_IMASK 0x19
[all …]
/Linux-v5.10/drivers/staging/sm750fb/
Dddk750_reg.h6 #define DE_STATE1 0x100054
7 #define DE_STATE1_DE_ABORT BIT(0)
9 #define DE_STATE2 0x100058
14 #define SYSTEM_CTRL 0x000000
15 #define SYSTEM_CTRL_DPMS_MASK (0x3 << 30)
16 #define SYSTEM_CTRL_DPMS_VPHP (0x0 << 30)
17 #define SYSTEM_CTRL_DPMS_VPHN (0x1 << 30)
18 #define SYSTEM_CTRL_DPMS_VNHP (0x2 << 30)
19 #define SYSTEM_CTRL_DPMS_VNHN (0x3 << 30)
35 #define SYSTEM_CTRL_PCI_SLAVE_BURST_READ_SIZE_MASK (0x3 << 4)
[all …]
/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/athub/
Dathub_2_0_0_sh_mask.h27 …S_CNTL__DISABLE_ATC__SHIFT 0x0
28 …S_CNTL__DISABLE_PRI__SHIFT 0x1
29 …S_CNTL__DISABLE_PASID__SHIFT 0x2
30 …S_CNTL__CREDITS_ATS_RPB__SHIFT 0x8
31 …_CNTL__INVALIDATION_LOG_KEEP_ORDER__SHIFT 0x14
32 …_CNTL__TRANS_LOG_KEEP_ORDER__SHIFT 0x15
33 …_CNTL__TRANS_EXE_RETURN__SHIFT 0x16
34 …DISABLE_ATC_MASK 0x00000001L
35 …DISABLE_PRI_MASK 0x00000002L
36 …DISABLE_PASID_MASK 0x00000004L
[all …]
Dathub_2_1_0_sh_mask.h27 …ATS_MODE_CNTL__HOST_TRANS_ENABLE__SHIFT 0x0
28 …ATS_MODE_CNTL__CONSOLE_IOV_ENABLE__SHIFT 0x1
29 …_CNTL__HOST_TRANS_ENABLE_MASK 0x00000001L
30 …_CNTL__CONSOLE_IOV_ENABLE_MASK 0x00000002L
32 …SHARED_VIRT_RESET_REQ__VF__SHIFT 0x0
33 …HARED_VIRT_RESET_REQ__PF__SHIFT 0x1f
34 …IRT_RESET_REQ__VF_MASK 0x7FFFFFFFL
35 …IRT_RESET_REQ__PF_MASK 0x80000000L
37 …SHARED_ACTIVE_FCN_ID__VFID__SHIFT 0x0
38 …HARED_ACTIVE_FCN_ID__VF__SHIFT 0x1f
[all …]
Dathub_1_0_sh_mask.h27 #define ATC_ATS_CNTL__DISABLE_ATC__SHIFT 0x0
28 #define ATC_ATS_CNTL__DISABLE_PRI__SHIFT 0x1
29 #define ATC_ATS_CNTL__DISABLE_PASID__SHIFT 0x2
30 #define ATC_ATS_CNTL__CREDITS_ATS_RPB__SHIFT 0x8
31 #define ATC_ATS_CNTL__INVALIDATION_LOG_KEEP_ORDER__SHIFT 0x14
32 #define ATC_ATS_CNTL__TRANS_LOG_KEEP_ORDER__SHIFT 0x15
33 #define ATC_ATS_CNTL__TRANS_EXE_RETURN__SHIFT 0x16
34 #define ATC_ATS_CNTL__DISABLE_ATC_MASK 0x00000001L
35 #define ATC_ATS_CNTL__DISABLE_PRI_MASK 0x00000002L
36 #define ATC_ATS_CNTL__DISABLE_PASID_MASK 0x00000004L
[all …]
/Linux-v5.10/drivers/infiniband/hw/qib/
Dqib_7322_regs.h35 #define QIB_7322_Revision_OFFS 0x0
36 #define QIB_7322_Revision_DEF 0x0000000002010601
37 #define QIB_7322_Revision_R_Simulator_LSB 0x3F
38 #define QIB_7322_Revision_R_Simulator_MSB 0x3F
39 #define QIB_7322_Revision_R_Simulator_RMASK 0x1
40 #define QIB_7322_Revision_R_Emulation_LSB 0x3E
41 #define QIB_7322_Revision_R_Emulation_MSB 0x3E
42 #define QIB_7322_Revision_R_Emulation_RMASK 0x1
43 #define QIB_7322_Revision_R_Emulation_Revcode_LSB 0x28
44 #define QIB_7322_Revision_R_Emulation_Revcode_MSB 0x3D
[all …]
/Linux-v5.10/drivers/video/fbdev/sis/
Doem300.h55 {0x08,0x08,0x08,0x08},
56 {0x08,0x08,0x08,0x08},
57 {0x08,0x08,0x08,0x08},
58 {0x2c,0x2c,0x2c,0x2c},
59 {0x08,0x08,0x08,0x08},
60 {0x08,0x08,0x08,0x08},
61 {0x08,0x08,0x08,0x08},
62 {0x20,0x20,0x20,0x20}
67 {0x20,0x20,0x20,0x20},
68 {0x20,0x20,0x20,0x20},
[all …]
/Linux-v5.10/sound/soc/codecs/
Dda7218.h21 #define DA7218_SYSTEM_ACTIVE 0x0
22 #define DA7218_CIF_CTRL 0x1
23 #define DA7218_CHIP_ID1 0x4
24 #define DA7218_CHIP_ID2 0x5
25 #define DA7218_CHIP_REVISION 0x6
26 #define DA7218_SPARE1 0x7
27 #define DA7218_STATUS1 0x8
28 #define DA7218_SOFT_RESET 0x9
29 #define DA7218_SR 0xB
30 #define DA7218_PC_COUNT 0xC
[all …]
/Linux-v5.10/drivers/misc/habanalabs/include/gaudi/
Dgaudi_masks.h15 (FIELD_PREP(DMA0_QM_GLBL_CFG0_PQF_EN_MASK, 0xF)) | \
16 (FIELD_PREP(DMA0_QM_GLBL_CFG0_CQF_EN_MASK, 0xF)) | \
17 (FIELD_PREP(DMA0_QM_GLBL_CFG0_CP_EN_MASK, 0xF)))
20 (FIELD_PREP(DMA0_QM_GLBL_PROT_PQF_MASK, 0xF)) | \
21 (FIELD_PREP(DMA0_QM_GLBL_PROT_CQF_MASK, 0xF)) | \
22 (FIELD_PREP(DMA0_QM_GLBL_PROT_CP_MASK, 0xF)) | \
23 (FIELD_PREP(DMA0_QM_GLBL_PROT_ERR_MASK, 0x1)))
26 (FIELD_PREP(DMA0_QM_GLBL_PROT_PQF_MASK, 0xF)) | \
27 (FIELD_PREP(DMA0_QM_GLBL_PROT_ERR_MASK, 0x1)))
30 (FIELD_PREP(DMA0_QM_GLBL_CFG0_PQF_EN_MASK, 0xF)) | \
[all …]
/Linux-v5.10/drivers/media/dvb-frontends/
Daf9013_priv.h39 { 28800000, 8000000, { 0x02, 0x8a, 0x28, 0xa3, 0x05, 0x14,
40 0x51, 0x11, 0x00, 0xa2, 0x8f, 0x3d, 0x00, 0xa2, 0x8a,
41 0x29, 0x00, 0xa2, 0x85, 0x14, 0x01, 0x45, 0x14, 0x14 } },
42 { 28800000, 7000000, { 0x02, 0x38, 0xe3, 0x8e, 0x04, 0x71,
43 0xc7, 0x07, 0x00, 0x8e, 0x3d, 0x55, 0x00, 0x8e, 0x38,
44 0xe4, 0x00, 0x8e, 0x34, 0x72, 0x01, 0x1c, 0x71, 0x32 } },
45 { 28800000, 6000000, { 0x01, 0xe7, 0x9e, 0x7a, 0x03, 0xcf,
46 0x3c, 0x3d, 0x00, 0x79, 0xeb, 0x6e, 0x00, 0x79, 0xe7,
47 0x9e, 0x00, 0x79, 0xe3, 0xcf, 0x00, 0xf3, 0xcf, 0x0f } },
49 { 20480000, 8000000, { 0x03, 0x92, 0x49, 0x26, 0x07, 0x24,
[all …]
/Linux-v5.10/arch/powerpc/include/asm/
Ddisassemble.h21 return (inst >> 1) & 0x3ff; in get_xop()
26 return ((inst >> 16) & 0x1f) | ((inst >> 6) & 0x3e0); in get_sprn()
31 return ((inst >> 16) & 0x1f) | ((inst >> 6) & 0x3e0); in get_dcrn()
36 return ((inst >> 16) & 0x1f) | ((inst >> 6) & 0x3e0); in get_tmrn()
41 return (inst >> 21) & 0x1f; in get_rt()
46 return (inst >> 21) & 0x1f; in get_rs()
51 return (inst >> 16) & 0x1f; in get_ra()
56 return (inst >> 11) & 0x1f; in get_rb()
61 return inst & 0x1; in get_rc()
66 return (inst >> 11) & 0x1f; in get_ws()
[all …]
/Linux-v5.10/drivers/net/wireless/broadcom/b43/
Dradio_2059.c17 { 0x051, 0x70 }, { 0x05a, 0x03 }, { 0x079, 0x01 }, { 0x082, 0x70 },
18 { 0x083, 0x00 }, { 0x084, 0x70 }, { 0x09a, 0x7f }, { 0x0b6, 0x10 },
19 { 0x188, 0x05 },
61 RADIOREGS(0x48, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x6c,
62 0x09, 0x0f, 0x0a, 0x00, 0x0a, 0x00, 0x61, 0x73,
63 0x00, 0x00, 0x00, 0xd0, 0x00),
64 PHYREGS(0x03c9, 0x03c5, 0x03c1, 0x043a, 0x043f, 0x0443),
68 RADIOREGS(0x4b, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x71,
69 0x09, 0x0f, 0x0a, 0x00, 0x0a, 0x00, 0x61, 0x73,
70 0x00, 0x00, 0x00, 0xd0, 0x00),
[all …]
/Linux-v5.10/drivers/net/wireless/realtek/rtl818x/rtl8180/
Dgrf5101.c27 0x0, 0x8, 0x4, 0xC,
28 0x2, 0xA, 0x6, 0xE,
29 0x1, 0x9, 0x5, 0xD,
30 0x3, 0xB, 0x7, 0xF
38 phy_config = grf5101_encode[(data >> 8) & 0xF]; in write_grf5101()
39 phy_config |= grf5101_encode[(data >> 4) & 0xF] << 4; in write_grf5101()
40 phy_config |= grf5101_encode[data & 0xF] << 8; in write_grf5101()
41 phy_config |= grf5101_encode[(addr >> 1) & 0xF] << 12; in write_grf5101()
43 phy_config |= grf5101_encode[(data & 0xf000) >> 12] << 24; in write_grf5101()
46 phy_config |= 0x90000000; in write_grf5101()
[all …]

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