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/Linux-v6.6/Documentation/devicetree/bindings/mtd/
Dintel,lgm-ebunand.yaml48 minimum: 0
70 reg = <0xe0f00000 0x100>,
71 <0xe1000000 0x300>,
72 <0xe1400000 0x8000>,
73 <0xe1c00000 0x1000>,
74 <0x17400000 0x4>,
75 <0x17c00000 0x4>;
82 #size-cells = <0>;
84 nand@0 {
85 reg = <0>;
/Linux-v6.6/Documentation/devicetree/bindings/clock/
Dsamsung,exynosautov9-clock.yaml250 reg = <0x17c00000 0x8000>;
/Linux-v6.6/arch/hexagon/kernel/
Dvm_init_segtable.S16 * Start with mapping PA=0 to both VA=0x0 and VA=0xc000000 as 16MB large pages.
46 /* VA 0x00000000 */
59 /* VA 0x40000000 */
68 /* VA 0x80000000 */
74 /*0xa8*/.word X,X,X,X
77 /*0xa9*/.word BKPG_IO(0xa9000000),BKPG_IO(0xa9000000),BKPG_IO(0xa9000000),BKPG_IO(0xa9000000)
79 /*0xa9*/.word X,X,X,X
81 /*0xaa*/.word X,X,X,X
82 /*0xab*/.word X,X,X,X
83 /*0xac*/.word X,X,X,X
[all …]
/Linux-v6.6/arch/arm64/boot/dts/exynos/
Dexynosautov9.dtsi47 #size-cells = <0>;
81 cpu0: cpu@0 {
84 reg = <0x0>;
91 reg = <0x100>;
98 reg = <0x200>;
105 reg = <0x300>;
112 reg = <0x10000>;
119 reg = <0x10100>;
126 reg = <0x10200>;
133 reg = <0x10300>;
[all …]
/Linux-v6.6/drivers/clk/samsung/
Dclk-exynosautov9.c32 /* Register Offset definitions for CMU_TOP (0x1b240000) */
33 #define PLL_LOCKTIME_PLL_SHARED0 0x0000
34 #define PLL_LOCKTIME_PLL_SHARED1 0x0004
35 #define PLL_LOCKTIME_PLL_SHARED2 0x0008
36 #define PLL_LOCKTIME_PLL_SHARED3 0x000c
37 #define PLL_LOCKTIME_PLL_SHARED4 0x0010
38 #define PLL_CON0_PLL_SHARED0 0x0100
39 #define PLL_CON3_PLL_SHARED0 0x010c
40 #define PLL_CON0_PLL_SHARED1 0x0140
41 #define PLL_CON3_PLL_SHARED1 0x014c
[all …]
/Linux-v6.6/arch/arm64/boot/dts/qcom/
Dsc8180x.dtsi27 #clock-cells = <0>;
33 #clock-cells = <0>;
41 #size-cells = <0>;
43 CPU0: cpu@0 {
46 reg = <0x0 0x0>;
50 qcom,freq-domain = <&cpufreq_hw 0>;
57 clocks = <&cpufreq_hw 0>;
75 reg = <0x0 0x100>;
79 qcom,freq-domain = <&cpufreq_hw 0>;
86 clocks = <&cpufreq_hw 0>;
[all …]
Dsc7180.dtsi62 #clock-cells = <0>;
68 #clock-cells = <0>;
74 #size-cells = <0>;
76 CPU0: cpu@0 {
79 reg = <0x0 0x0>;
80 clocks = <&cpufreq_hw 0>;
91 qcom,freq-domain = <&cpufreq_hw 0>;
108 reg = <0x0 0x100>;
109 clocks = <&cpufreq_hw 0>;
120 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
Dsm8150.dtsi30 #clock-cells = <0>;
37 #clock-cells = <0>;
45 #size-cells = <0>;
47 CPU0: cpu@0 {
50 reg = <0x0 0x0>;
51 clocks = <&cpufreq_hw 0>;
56 qcom,freq-domain = <&cpufreq_hw 0>;
58 interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
79 reg = <0x0 0x100>;
80 clocks = <&cpufreq_hw 0>;
[all …]