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/Linux-v5.15/arch/sparc/include/asm/
Dcontregs.h12 #define AC_M_PCR 0x0000 /* shv Processor Control Reg */
13 #define AC_M_CTPR 0x0100 /* shv Context Table Pointer Reg */
14 #define AC_M_CXR 0x0200 /* shv Context Register */
15 #define AC_M_SFSR 0x0300 /* shv Synchronous Fault Status Reg */
16 #define AC_M_SFAR 0x0400 /* shv Synchronous Fault Address Reg */
17 #define AC_M_AFSR 0x0500 /* hv Asynchronous Fault Status Reg */
18 #define AC_M_AFAR 0x0600 /* hv Asynchronous Fault Address Reg */
19 #define AC_M_RESET 0x0700 /* hv Reset Reg */
20 #define AC_M_RPR 0x1000 /* hv Root Pointer Reg */
21 #define AC_M_TSUTRCR 0x1000 /* s TLB Replacement Ctrl Reg */
[all …]
/Linux-v5.15/arch/m68k/include/asm/
Dcontregs.h15 #define AC_IDPROM 0x00000000 /* 34 ID PROM, R/O, byte, 32 bytes */
16 #define AC_PAGEMAP 0x10000000 /* 3 Pagemap R/W, long */
17 #define AC_SEGMAP 0x20000000 /* 3 Segment map, byte */
18 #define AC_CONTEXT 0x30000000 /* 34c current mmu-context */
19 #define AC_SENABLE 0x40000000 /* 34c system dvma/cache/reset enable reg*/
20 #define AC_UDVMA_ENB 0x50000000 /* 34 Not used on Sun boards, byte */
21 #define AC_BUS_ERROR 0x60000000 /* 34 Not cleared on read, byte. */
22 #define AC_SYNC_ERR 0x60000000 /* c fault type */
23 #define AC_SYNC_VA 0x60000004 /* c fault virtual address */
24 #define AC_ASYNC_ERR 0x60000008 /* c asynchronous fault type */
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/phy/
Dmediatek,tphy.yaml15 controllers on MediaTek SoCs, includes USB2.0, USB3.0, PCIe and SATA.
22 shared 0x0000 SPLLC
23 0x0100 FMREG
24 u2 port0 0x0800 U2PHY_COM
25 u3 port0 0x0900 U3PHYD
26 0x0a00 U3PHYD_BANK2
27 0x0b00 U3PHYA
28 0x0c00 U3PHYA_DA
29 u2 port1 0x1000 U2PHY_COM
30 u3 port1 0x1100 U3PHYD
[all …]
Dmediatek,xsphy.yaml20 u2 port0 0x0000 MISC
21 0x0100 FMREG
22 0x0300 U2PHY_COM
23 u2 port1 0x1000 MISC
24 0x1100 FMREG
25 0x1300 U2PHY_COM
26 u2 port2 0x2000 MISC
28 u31 common 0x3000 DIG_GLB
29 0x3100 PHYA_GLB
30 u31 port0 0x3400 DIG_LN_TOP
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/net/can/
Dmpc5xxx-mscan.txt41 interrupts = <12 0x8>;
43 reg = <0x1300 0x80>;
48 interrupts = <13 0x8>;
50 reg = <0x1380 0x80>;
/Linux-v5.15/drivers/net/ethernet/qualcomm/
Dqca_7k.h35 #define QCA7K_SPI_WRITE (0 << 15)
37 #define QCA7K_SPI_EXTERNAL (0 << 14)
41 #define QCASPI_HW_BUF_LEN 0xC5B
44 #define SPI_REG_BFR_SIZE 0x0100
45 #define SPI_REG_WRBUF_SPC_AVA 0x0200
46 #define SPI_REG_RDBUF_BYTE_AVA 0x0300
47 #define SPI_REG_SPI_CONFIG 0x0400
48 #define SPI_REG_SPI_STATUS 0x0500
49 #define SPI_REG_INTR_CAUSE 0x0C00
50 #define SPI_REG_INTR_ENABLE 0x0D00
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/power/reset/
Dqcom,pon.yaml51 reg = <0x0c440000 0x1100>;
53 #size-cells = <0>;
54 pmk8350: pmic@0 {
55 reg = <0x0 SPMI_USID>;
57 #size-cells = <0>;
59 reg = <0x1300>;
64 interrupts = < 0x0 0x8 0 IRQ_TYPE_EDGE_BOTH >;
72 interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>;
/Linux-v5.15/arch/arm64/boot/dts/qcom/
Dpmk8350.dtsi12 pmk8350: pmic@0 {
14 reg = <0x0 SPMI_USID>;
16 #size-cells = <0>;
20 reg = <0x1300>;
24 interrupts = <0x0 0x13 0x7 IRQ_TYPE_EDGE_BOTH>;
30 interrupts = <0x0 0x13 0x6 IRQ_TYPE_EDGE_BOTH>;
37 reg = <0x3100>;
39 #size-cells = <0>;
40 interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
48 reg = <0x3400>;
[all …]
/Linux-v5.15/include/linux/soc/samsung/
Dexynos-regs-pmu.h17 #define S5P_CENTRAL_SEQ_CONFIGURATION 0x0200
21 #define S5P_CENTRAL_SEQ_OPTION 0x0208
42 #define EXYNOS_SWRESET 0x0400
44 #define S5P_WAKEUP_STAT 0x0600
46 #define EXYNOS_EINT_WAKEUP_MASK_DISABLED 0xffffffff
47 #define EXYNOS_EINT_WAKEUP_MASK 0x0604
48 #define S5P_WAKEUP_MASK 0x0608
49 #define S5P_WAKEUP_MASK2 0x0614
52 #define EXYNOS4_MIPI_PHY_CONTROL(n) (0x0710 + (n) * 4)
54 #define EXYNOS4_PHY_ENABLE (1 << 0)
[all …]
/Linux-v5.15/sound/soc/codecs/
Drt1015.h17 #define RT1015_DEVICE_ID_VAL 0x1011
18 #define RT1015_DEVICE_ID_VAL2 0x1015
20 #define RT1015_RESET 0x0000
21 #define RT1015_CLK2 0x0004
22 #define RT1015_CLK3 0x0006
23 #define RT1015_PLL1 0x000a
24 #define RT1015_PLL2 0x000c
25 #define RT1015_DUM_RW1 0x000e
26 #define RT1015_DUM_RW2 0x0010
27 #define RT1015_DUM_RW3 0x0012
[all …]
Drt1011.h11 #define RT1011_DEVICE_ID_NUM 0x1011
13 #define RT1011_RESET 0x0000
14 #define RT1011_CLK_1 0x0002
15 #define RT1011_CLK_2 0x0004
16 #define RT1011_CLK_3 0x0006
17 #define RT1011_CLK_4 0x0008
18 #define RT1011_PLL_1 0x000a
19 #define RT1011_PLL_2 0x000c
20 #define RT1011_SRC_1 0x000e
21 #define RT1011_SRC_2 0x0010
[all …]
/Linux-v5.15/drivers/devfreq/event/
Dexynos-ppmu.h13 PPMU_DISABLE = 0,
18 PPMU_PMNCNT0 = 0,
30 PPMU_RO_BUSY_CYCLE_CNT = 0x0,
31 PPMU_WO_BUSY_CYCLE_CNT = 0x1,
32 PPMU_RW_BUSY_CYCLE_CNT = 0x2,
33 PPMU_RO_REQUEST_CNT = 0x3,
34 PPMU_WO_REQUEST_CNT = 0x4,
35 PPMU_RO_DATA_CNT = 0x5,
36 PPMU_WO_DATA_CNT = 0x6,
37 PPMU_RO_LATENCY = 0x12,
[all …]
/Linux-v5.15/include/uapi/linux/
Djoystick.h34 #define JS_VERSION 0x020100
40 #define JS_EVENT_BUTTON 0x01 /* button pressed/released */
41 #define JS_EVENT_AXIS 0x02 /* joystick moved */
42 #define JS_EVENT_INIT 0x80 /* initial state of device */
55 #define JSIOCGVERSION _IOR('j', 0x01, __u32) /* get driver version */
57 #define JSIOCGAXES _IOR('j', 0x11, __u8) /* get number of axes */
58 #define JSIOCGBUTTONS _IOR('j', 0x12, __u8) /* get number of buttons */
59 #define JSIOCGNAME(len) _IOC(_IOC_READ, 'j', 0x13, len) /* get identifier string */
61 #define JSIOCSCORR _IOW('j', 0x21, struct js_corr) /* set correction values */
62 #define JSIOCGCORR _IOR('j', 0x22, struct js_corr) /* get correction values */
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/net/
Dmediatek-dwmac.txt24 - mediatek,tx-delay-ps: TX clock delay macro value. Default is 0.
27 - mediatek,rx-delay-ps: RX clock delay macro value. Default is 0.
31 or will round down. Range 0~31*170.
33 or will round down. Range 0~31*550.
59 reg = <0 0x1101c000 0 0x1300>;
/Linux-v5.15/sound/soc/mediatek/mt2701/
Dmt2701-reg.h12 #define AUDIO_TOP_CON0 0x0000
13 #define AUDIO_TOP_CON4 0x0010
14 #define AUDIO_TOP_CON5 0x0014
15 #define AFE_DAIBT_CON0 0x001c
16 #define AFE_MRGIF_CON 0x003c
17 #define ASMI_TIMING_CON1 0x0100
18 #define ASMO_TIMING_CON1 0x0104
19 #define PWR1_ASM_CON1 0x0108
20 #define ASYS_TOP_CON 0x0600
21 #define ASYS_I2SIN1_CON 0x0604
[all …]
/Linux-v5.15/sound/soc/kirkwood/
Dkirkwood.h13 #define KIRKWOOD_RECORD_WIN 0
17 #define KIRKWOOD_AUDIO_WIN_BASE_REG(win) (0xA00 + ((win)<<3))
18 #define KIRKWOOD_AUDIO_WIN_CTRL_REG(win) (0xA04 + ((win)<<3))
21 #define KIRKWOOD_RECCTL 0x1000
31 #define KIRKWOOD_RECCTL_MONO_CHAN_LEFT (0<<3)
32 #define KIRKWOOD_RECCTL_SIZE_MASK (7<<0)
33 #define KIRKWOOD_RECCTL_SIZE_16 (7<<0)
34 #define KIRKWOOD_RECCTL_SIZE_16_C (3<<0)
35 #define KIRKWOOD_RECCTL_SIZE_20 (2<<0)
36 #define KIRKWOOD_RECCTL_SIZE_24 (1<<0)
[all …]
/Linux-v5.15/arch/mips/include/asm/mach-ar7/
Dar7.h16 #define AR7_SDRAM_BASE 0x14000000
18 #define AR7_REGS_BASE 0x08610000
20 #define AR7_REGS_MAC0 (AR7_REGS_BASE + 0x0000)
21 #define AR7_REGS_GPIO (AR7_REGS_BASE + 0x0900)
22 /* 0x08610A00 - 0x08610BFF (512 bytes, 128 bytes / clock) */
23 #define AR7_REGS_POWER (AR7_REGS_BASE + 0x0a00)
24 #define AR7_REGS_CLOCKS (AR7_REGS_POWER + 0x80)
25 #define UR8_REGS_CLOCKS (AR7_REGS_POWER + 0x20)
26 #define AR7_REGS_UART0 (AR7_REGS_BASE + 0x0e00)
27 #define AR7_REGS_USB (AR7_REGS_BASE + 0x1200)
[all …]
/Linux-v5.15/drivers/mfd/
Dsi476x-prop.c25 for (i = 0; i < size; i++) in si476x_core_element_is_in_array()
38 for (i = 0; i < size; i++) in si476x_core_element_is_in_range()
49 0x0000, in si476x_core_is_valid_property_a10()
50 0x0500, 0x0501, in si476x_core_is_valid_property_a10()
51 0x0600, in si476x_core_is_valid_property_a10()
52 0x0709, 0x070C, 0x070D, 0x70E, 0x710, in si476x_core_is_valid_property_a10()
53 0x0718, in si476x_core_is_valid_property_a10()
54 0x1207, 0x1208, in si476x_core_is_valid_property_a10()
55 0x2007, in si476x_core_is_valid_property_a10()
56 0x2300, in si476x_core_is_valid_property_a10()
[all …]
/Linux-v5.15/arch/x86/mm/
Damdtopology.c35 for (num = 0; num < 32; num++) { in find_northbridge()
38 header = read_pci_config(0, num, 0, 0x00); in find_northbridge()
39 if (header != (PCI_VENDOR_ID_AMD | (0x1100<<16)) && in find_northbridge()
40 header != (PCI_VENDOR_ID_AMD | (0x1200<<16)) && in find_northbridge()
41 header != (PCI_VENDOR_ID_AMD | (0x1300<<16))) in find_northbridge()
44 header = read_pci_config(0, num, 1, 0x00); in find_northbridge()
45 if (header != (PCI_VENDOR_ID_AMD | (0x1101<<16)) && in find_northbridge()
46 header != (PCI_VENDOR_ID_AMD | (0x1201<<16)) && in find_northbridge()
47 header != (PCI_VENDOR_ID_AMD | (0x1301<<16))) in find_northbridge()
57 u64 start = PFN_PHYS(0); in amd_numa_init()
[all …]
/Linux-v5.15/drivers/media/usb/gspca/
Ddtcs033.c32 if (gspca_dev->usb_err < 0) in reg_rw()
36 usb_rcvctrlpipe(udev, 0), in reg_rw()
42 if (ret < 0) { in reg_rw()
53 int i = 0; in reg_reqs()
56 while ((i < n_reqs) && (gspca_dev->usb_err >= 0)) { in reg_reqs()
63 if (gspca_dev->usb_err < 0) { in reg_reqs()
111 return 0; in sd_config()
117 return 0; in sd_init()
137 gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0); in dtcs033_pkt_scan()
141 gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0); in dtcs033_pkt_scan()
[all …]
/Linux-v5.15/arch/s390/include/asm/
Dlowcore.h25 __u8 pad_0x0000[0x0014-0x0000]; /* 0x0000 */
26 __u32 ipl_parmblock_ptr; /* 0x0014 */
27 __u8 pad_0x0018[0x0080-0x0018]; /* 0x0018 */
28 __u32 ext_params; /* 0x0080 */
31 __u16 ext_cpu_addr; /* 0x0084 */
32 __u16 ext_int_code; /* 0x0086 */
36 __u32 svc_int_code; /* 0x0088 */
37 __u16 pgm_ilc; /* 0x008c */
38 __u16 pgm_code; /* 0x008e */
39 __u32 data_exc_code; /* 0x0090 */
[all …]
/Linux-v5.15/drivers/dma/dw/
Didma32.c14 #define DMA_CTL_CH(x) (0x1000 + (x) * 4)
15 #define DMA_SRC_ADDR_FILLIN(x) (0x1100 + (x) * 4)
16 #define DMA_DST_ADDR_FILLIN(x) (0x1200 + (x) * 4)
17 #define DMA_XBAR_SEL(x) (0x1300 + (x) * 4)
18 #define DMA_REGACCESS_CHID_CFG (0x1400)
20 #define CTL_CH_TRANSFER_MODE_MASK GENMASK(1, 0)
21 #define CTL_CH_TRANSFER_MODE_S2S 0
30 #define XBAR_SEL_DEVID_MASK GENMASK(15, 0)
34 #define REGACCESS_CHID_MASK GENMASK(2, 0)
41 return 0; in idma32_get_slave_devfn()
[all …]
/Linux-v5.15/arch/powerpc/boot/dts/
Dmpc5125twr.dts30 #size-cells = <0>;
32 PowerPC,5125@0 {
34 reg = <0>;
35 d-cache-line-size = <0x20>; // 32 bytes
36 i-cache-line-size = <0x20>; // 32 bytes
37 d-cache-size = <0x8000>; // L1, 32K
38 i-cache-size = <0x8000>; // L1, 32K
47 reg = <0x00000000 0x10000000>; // 256MB at 0
52 reg = <0x30000000 0x08000>; // 32K at 0x30000000
57 #size-cells = <0>;
[all …]
/Linux-v5.15/drivers/media/usb/hdpvr/
Dhdpvr.h22 #define HD_PVR_VENDOR_ID 0x2040
23 #define HD_PVR_PRODUCT_ID 0x4900
24 #define HD_PVR_PRODUCT_ID1 0x4901
25 #define HD_PVR_PRODUCT_ID2 0x4902
26 #define HD_PVR_PRODUCT_ID4 0x4903
27 #define HD_PVR_PRODUCT_ID3 0x4982
33 #define HDPVR_FIRMWARE_VERSION 0x08
34 #define HDPVR_FIRMWARE_VERSION_AC3 0x0d
35 #define HDPVR_FIRMWARE_VERSION_0X12 0x12
36 #define HDPVR_FIRMWARE_VERSION_0X15 0x15
[all …]
/Linux-v5.15/arch/mips/netlogic/common/
Dreset.S54 XLP_IO_SYS_OFFSET(0) + XLP_IO_PCI_HDRSZ + \
62 lui t2, 0x4080 /* Enable Unaligned Access, L2HPE */
68 ori t1, 0x1000 /* Enable Icache partitioning */
72 lui t1, 0x0100 /* Disable BRU accepting ALU ops */
96 slt t1, t0, 0x1200
103 li t2, 0 /* index */
104 li t3, 0x1000 /* loop count */
108 ori v1, v0, 0x3 /* way0 | write_enable | write_active */
112 andi v1, 0x1 /* wait for write_active == 0 */
116 ori v1, v0, 0x7 /* way1 | write_enable | write_active */
[all …]

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