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/Linux-v6.1/Documentation/devicetree/bindings/mfd/
Dqcom,spmi-pmic.yaml30 - pattern: '^pm(a|s)?[0-9]*@.*$'
91 const: 0
102 "^adc@[0-9a-f]+$":
106 "^adc-tm@[0-9a-f]+$":
110 "^audio-codec@[0-9a-f]+$":
114 "extcon@[0-9a-f]+$":
118 "gpio(s)?@[0-9a-f]+$":
122 "pon@[0-9a-f]+$":
126 "pwm@[0-9a-f]+$":
130 "^rtc@[0-9a-f]+$":
[all …]
/Linux-v6.1/arch/arm/boot/dts/
Dqcom-sdx55.dtsi20 qcom,msm-id = <357 0x10000>, <368 0x10000>, <418 0x10000>;
25 reg = <0 0>;
31 #clock-cells = <0>;
38 #clock-cells = <0>;
44 #clock-cells = <0>;
51 #size-cells = <0>;
53 cpu0: cpu@0 {
56 reg = <0x0>;
108 reg = <0x8fc00000 0x80000>;
113 reg = <0x8fc80000 0x40000>;
[all …]
/Linux-v6.1/drivers/soc/tegra/cbb/
Dtegra194-cbb.c30 #define ERRLOGGER_0_ID_COREID_0 0x00000000
31 #define ERRLOGGER_0_ID_REVISIONID_0 0x00000004
32 #define ERRLOGGER_0_FAULTEN_0 0x00000008
33 #define ERRLOGGER_0_ERRVLD_0 0x0000000c
34 #define ERRLOGGER_0_ERRCLR_0 0x00000010
35 #define ERRLOGGER_0_ERRLOG0_0 0x00000014
36 #define ERRLOGGER_0_ERRLOG1_0 0x00000018
37 #define ERRLOGGER_0_RSVD_00_0 0x0000001c
38 #define ERRLOGGER_0_ERRLOG3_0 0x00000020
39 #define ERRLOGGER_0_ERRLOG4_0 0x00000024
[all …]
/Linux-v6.1/arch/arm64/boot/dts/qcom/
Dsc8280xp.dtsi25 #clock-cells = <0>;
30 #clock-cells = <0>;
175 #size-cells = <0>;
177 CPU0: cpu@0 {
180 reg = <0x0 0x0>;
186 qcom,freq-domain = <&cpufreq_hw 0>;
201 reg = <0x0 0x100>;
207 qcom,freq-domain = <&cpufreq_hw 0>;
219 reg = <0x0 0x200>;
225 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
Dsc7180.dtsi61 #clock-cells = <0>;
67 #clock-cells = <0>;
77 reg = <0x0 0x80000000 0x0 0x600000>;
82 reg = <0x0 0x80600000 0x0 0x200000>;
87 reg = <0x0 0x80800000 0x0 0x20000>;
92 reg = <0x0 0x80820000 0x0 0x20000>;
98 reg = <0x0 0x808ff000 0x0 0x1000>;
103 reg = <0x0 0x80900000 0x0 0x200000>;
108 reg = <0x0 0x80b00000 0x0 0x3900000>;
113 reg = <0 0x8b700000 0 0x10000>;
[all …]
Dsm8150.dtsi29 #clock-cells = <0>;
36 #clock-cells = <0>;
44 #size-cells = <0>;
46 CPU0: cpu@0 {
49 reg = <0x0 0x0>;
54 qcom,freq-domain = <&cpufreq_hw 0>;
73 reg = <0x0 0x100>;
78 qcom,freq-domain = <&cpufreq_hw 0>;
95 reg = <0x0 0x200>;
100 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
Dsdm845.dtsi75 reg = <0 0x80000000 0 0>;
84 reg = <0 0x85700000 0 0x600000>;
89 reg = <0 0x85e00000 0 0x100000>;
94 reg = <0 0x85fc0000 0 0x20000>;
100 reg = <0x0 0x85fe0000 0 0x20000>;
106 reg = <0x0 0x86000000 0 0x200000>;
112 reg = <0 0x86200000 0 0x2d00000>;
118 reg = <0 0x88f00000 0 0x200000>;
126 reg = <0 0x8ab00000 0 0x1400000>;
131 reg = <0 0x8bf00000 0 0x500000>;
[all …]
Dsc7280.dtsi77 #clock-cells = <0>;
83 #clock-cells = <0>;
94 reg = <0x0 0x004cd000 0x0 0x1000>;
98 reg = <0x0 0x80000000 0x0 0x600000>;
103 reg = <0x0 0x80600000 0x0 0x200000>;
108 reg = <0x0 0x80800000 0x0 0x60000>;
113 reg = <0x0 0x80860000 0x0 0x20000>;
119 reg = <0x0 0x80884000 0x0 0x10000>;
124 reg = <0x0 0x808ff000 0x0 0x1000>;
129 reg = <0x0 0x80900000 0x0 0x200000>;
[all …]
Dsm8250.dtsi80 #clock-cells = <0>;
88 #clock-cells = <0>;
94 #size-cells = <0>;
96 CPU0: cpu@0 {
99 reg = <0x0 0x0>;
106 qcom,freq-domain = <&cpufreq_hw 0>;
123 reg = <0x0 0x100>;
130 qcom,freq-domain = <&cpufreq_hw 0>;
144 reg = <0x0 0x200>;
151 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]