Searched +full:0 +full:x04080000 (Results 1 – 16 of 16) sorted by relevance
/Linux-v6.1/Documentation/devicetree/bindings/remoteproc/ |
D | qcom,sc7180-mss-pil.yaml | 197 reg = <0x04080000 0x10000>, <0x04180000 0x48>; 200 iommus = <&apps_smmu 0x461 0x0>, <&apps_smmu 0x444 0x3>; 203 <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, 230 qcom,smem-states = <&modem_smp2p_out 0>; 237 qcom,halt-regs = <&tcsr_mutex_regs 0x23000 0x25000 0x24000>; 238 qcom,spare-regs = <&tcsr_regs 0xb3e4>;
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D | qcom,sc7280-mss-pil.yaml | 215 reg = <0x04080000 0x10000>, <0x04180000 0x48>; 218 iommus = <&apps_smmu 0x124 0x0>, <&apps_smmu 0x488 0x7>; 220 interconnects = <&mc_virt MASTER_LLCC 0 &mc_virt SLAVE_EBI1 0>; 223 <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, 247 qcom,smem-states = <&modem_smp2p_out 0>; 254 qcom,halt-regs = <&tcsr_mutex 0x23000 0x25000 0x28000 0x33000>; 255 qcom,ext-regs = <&tcsr 0x10000 0x10004>, <&tcsr_mutex 0x26004 0x26008>; 256 qcom,qaccept-regs = <&tcsr_mutex 0x23030 0x23040 0x23020>;
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/Linux-v6.1/arch/arm/boot/dts/ |
D | qcom-sdx65.dtsi | 18 qcom,msm-id = <458 0x10000>, <483 0x10000>, <509 0x10000>; 23 reg = <0 0>; 31 #clock-cells = <0>; 38 #clock-cells = <0>; 44 #clock-cells = <0>; 50 #size-cells = <0>; 52 cpu0: cpu@0 { 55 reg = <0x0>; 113 reg = <0x8fcad000 0x40000>; 118 reg = <0x8fcfd000 0x1000>; [all …]
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D | qcom-sdx55.dtsi | 20 qcom,msm-id = <357 0x10000>, <368 0x10000>, <418 0x10000>; 25 reg = <0 0>; 31 #clock-cells = <0>; 38 #clock-cells = <0>; 44 #clock-cells = <0>; 51 #size-cells = <0>; 53 cpu0: cpu@0 { 56 reg = <0x0>; 108 reg = <0x8fc00000 0x80000>; 113 reg = <0x8fc80000 0x40000>; [all …]
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/Linux-v6.1/drivers/scsi/ |
D | pmcraid.h | 33 #define PMCRAID_FW_VERSION_1 0x002 38 /* Bit definitions as per firmware, bit position [0][1][2].....[31] */ 44 #define PCI_VENDOR_ID_PMC 0x11F8 45 #define PCI_DEVICE_ID_PMC_MAXRAID 0x5220 92 #define PMCRAID_IOA_BUS_ID 0xfe 93 #define PMCRAID_IOA_TARGET_ID 0xff 94 #define PMCRAID_IOA_LUN_ID 0xff 95 #define PMCRAID_VSET_BUS_ID 0x1 96 #define PMCRAID_VSET_LUN_ID 0x0 97 #define PMCRAID_PHYS_BUS_ID 0x0 [all …]
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D | ipr.c | 28 * - RAID Levels 0, 5, 10 81 static int ipr_testmode = 0; 82 static unsigned int ipr_fastfail = 0; 83 static unsigned int ipr_transop_timeout = 0; 84 static unsigned int ipr_debug = 0; 94 .mailbox = 0x0042C, 96 .cache_line_size = 0x20, 98 .iopoll_weight = 0, 100 .set_interrupt_mask_reg = 0x0022C, 101 .clr_interrupt_mask_reg = 0x00230, [all …]
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/Linux-v6.1/arch/arm64/boot/dts/qcom/ |
D | sm6350.dtsi | 25 #clock-cells = <0>; 33 #clock-cells = <0>; 39 #size-cells = <0>; 41 CPU0: cpu@0 { 44 reg = <0x0 0x0>; 49 qcom,freq-domain = <&cpufreq_hw 0>; 63 reg = <0x0 0x100>; 68 qcom,freq-domain = <&cpufreq_hw 0>; 79 reg = <0x0 0x200>; 84 qcom,freq-domain = <&cpufreq_hw 0>; [all …]
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D | msm8916.dtsi | 31 reg = <0 0x80000000 0 0>; 40 reg = <0x0 0x86000000 0x0 0x300000>; 46 reg = <0x0 0x86300000 0x0 0x100000>; 54 reg = <0x0 0x86400000 0x0 0x100000>; 59 reg = <0x0 0x86500000 0x0 0x180000>; 64 reg = <0x0 0x86680000 0x0 0x80000>; 70 reg = <0x0 0x86700000 0x0 0xe0000>; 77 reg = <0x0 0x867e0000 0x0 0x20000>; 82 reg = <0x0 0x86800000 0x0 0x2b00000>; 87 reg = <0x0 0x89300000 0x0 0x600000>; [all …]
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D | msm8998.dtsi | 15 qcom,msm-id = <292 0x0>; 25 reg = <0x0 0x80000000 0x0 0x0>; 34 reg = <0x0 0x85800000 0x0 0x600000>; 39 reg = <0x0 0x85e00000 0x0 0x100000>; 44 reg = <0x0 0x86000000 0x0 0x200000>; 49 reg = <0x0 0x86200000 0x0 0x2d00000>; 55 reg = <0x0 0x88f00000 0x0 0x200000>; 63 reg = <0x0 0x8ab00000 0x0 0x700000>; 68 reg = <0x0 0x8b200000 0x0 0x1a00000>; 73 reg = <0x0 0x8cc00000 0x0 0x7000000>; [all …]
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D | sm8350.dtsi | 30 #clock-cells = <0>; 38 #clock-cells = <0>; 41 ufs_phy_rx_symbol_0_clk: ufs-phy-rx-symbol-0 { 44 #clock-cells = <0>; 50 #clock-cells = <0>; 53 ufs_phy_tx_symbol_0_clk: ufs-phy-tx-symbol-0 { 56 #clock-cells = <0>; 62 #size-cells = <0>; 64 CPU0: cpu@0 { 67 reg = <0x0 0x0>; [all …]
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D | sm8450.dtsi | 29 #clock-cells = <0>; 35 #clock-cells = <0>; 42 #size-cells = <0>; 44 CPU0: cpu@0 { 47 reg = <0x0 0x0>; 52 qcom,freq-domain = <&cpufreq_hw 0>; 66 reg = <0x0 0x100>; 71 qcom,freq-domain = <&cpufreq_hw 0>; 82 reg = <0x0 0x200>; 87 qcom,freq-domain = <&cpufreq_hw 0>; [all …]
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D | sc7180.dtsi | 61 #clock-cells = <0>; 67 #clock-cells = <0>; 77 reg = <0x0 0x80000000 0x0 0x600000>; 82 reg = <0x0 0x80600000 0x0 0x200000>; 87 reg = <0x0 0x80800000 0x0 0x20000>; 92 reg = <0x0 0x80820000 0x0 0x20000>; 98 reg = <0x0 0x808ff000 0x0 0x1000>; 103 reg = <0x0 0x80900000 0x0 0x200000>; 108 reg = <0x0 0x80b00000 0x0 0x3900000>; 113 reg = <0 0x8b700000 0 0x10000>; [all …]
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D | sm8150.dtsi | 29 #clock-cells = <0>; 36 #clock-cells = <0>; 44 #size-cells = <0>; 46 CPU0: cpu@0 { 49 reg = <0x0 0x0>; 54 qcom,freq-domain = <&cpufreq_hw 0>; 73 reg = <0x0 0x100>; 78 qcom,freq-domain = <&cpufreq_hw 0>; 95 reg = <0x0 0x200>; 100 qcom,freq-domain = <&cpufreq_hw 0>; [all …]
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D | sdm845.dtsi | 75 reg = <0 0x80000000 0 0>; 84 reg = <0 0x85700000 0 0x600000>; 89 reg = <0 0x85e00000 0 0x100000>; 94 reg = <0 0x85fc0000 0 0x20000>; 100 reg = <0x0 0x85fe0000 0 0x20000>; 106 reg = <0x0 0x86000000 0 0x200000>; 112 reg = <0 0x86200000 0 0x2d00000>; 118 reg = <0 0x88f00000 0 0x200000>; 126 reg = <0 0x8ab00000 0 0x1400000>; 131 reg = <0 0x8bf00000 0 0x500000>; [all …]
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D | sc7280.dtsi | 77 #clock-cells = <0>; 83 #clock-cells = <0>; 94 reg = <0x0 0x004cd000 0x0 0x1000>; 98 reg = <0x0 0x80000000 0x0 0x600000>; 103 reg = <0x0 0x80600000 0x0 0x200000>; 108 reg = <0x0 0x80800000 0x0 0x60000>; 113 reg = <0x0 0x80860000 0x0 0x20000>; 119 reg = <0x0 0x80884000 0x0 0x10000>; 124 reg = <0x0 0x808ff000 0x0 0x1000>; 129 reg = <0x0 0x80900000 0x0 0x200000>; [all …]
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/Linux-v6.1/drivers/gpu/drm/amd/pm/powerplay/inc/ |
D | polaris10_pwrvirus.h | 27 #define mmCP_HYP_MEC1_UCODE_ADDR 0xf81a 28 #define mmCP_HYP_MEC1_UCODE_DATA 0xf81b 29 #define mmCP_HYP_MEC2_UCODE_ADDR 0xf81c 30 #define mmCP_HYP_MEC2_UCODE_DATA 0xf81d 49 { 0x00000000, mmRLC_CNTL }, 50 { 0x00000002, mmRLC_SRM_CNTL }, 51 { 0x15000000, mmCP_ME_CNTL }, 52 { 0x50000000, mmCP_MEC_CNTL }, 53 { 0x80000004, mmCP_DFY_CNTL }, 54 { 0x0840800a, mmCP_RB0_CNTL }, [all …]
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