/Linux-v5.10/arch/powerpc/platforms/83xx/ |
D | mpc83xx.h | 10 #define MPC83XX_SCCR_OFFS 0xA08 11 #define MPC83XX_SCCR_USB_MASK 0x00f00000 12 #define MPC83XX_SCCR_USB_MPHCM_11 0x00c00000 13 #define MPC83XX_SCCR_USB_MPHCM_01 0x00400000 14 #define MPC83XX_SCCR_USB_MPHCM_10 0x00800000 15 #define MPC83XX_SCCR_USB_DRCM_11 0x00300000 16 #define MPC83XX_SCCR_USB_DRCM_01 0x00100000 17 #define MPC83XX_SCCR_USB_DRCM_10 0x00200000 18 #define MPC8315_SCCR_USB_MASK 0x00c00000 19 #define MPC8315_SCCR_USB_DRCM_11 0x00c00000 [all …]
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/Linux-v5.10/drivers/media/pci/cx18/ |
D | cx18-i2c.c | 18 #define CX18_REG_I2C_1_WR 0xf15000 19 #define CX18_REG_I2C_1_RD 0xf15008 20 #define CX18_REG_I2C_2_WR 0xf25100 21 #define CX18_REG_I2C_2_RD 0xf25108 23 #define SETSCL_BIT 0x0001 24 #define SETSDL_BIT 0x0002 25 #define GETSCL_BIT 0x0004 26 #define GETSDL_BIT 0x0008 28 #define CX18_CS5345_I2C_ADDR 0x4c 29 #define CX18_Z8F0811_IR_TX_I2C_ADDR 0x70 [all …]
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/Linux-v5.10/drivers/usb/gadget/udc/ |
D | fsl_qe_udc.h | 18 #define PORT_CPM 0 24 #define USB_MAX_CTRL_PAYLOAD 0x4000 31 #define USB_DIR_BOTH 0x88 32 #define R_BUF_MAXSIZE 0x800 36 #define USB_MODE_EN 0x01 37 #define USB_MODE_HOST 0x02 38 #define USB_MODE_TEST 0x04 39 #define USB_MODE_SFTE 0x08 40 #define USB_MODE_RESUME 0x40 41 #define USB_MODE_LSS 0x80 [all …]
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/Linux-v5.10/arch/powerpc/boot/dts/ |
D | bluestone.dts | 16 dcr-parent = <&{/cpus/cpu@0}>; 26 #size-cells = <0>; 28 cpu@0 { 31 reg = <0x00000000>; 32 clock-frequency = <0>; /* Filled in by U-Boot */ 33 timebase-frequency = <0>; /* Filled in by U-Boot */ 46 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */ 52 cell-index = <0>; 53 dcr-reg = <0x0c0 0x009>; 54 #address-cells = <0>; [all …]
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D | storcenter.dts | 30 #size-cells = <0>; 32 PowerPC,8241@0 { 34 reg = <0>; 37 bus-frequency = <0>; /* from bootwrapper */ 47 reg = <0x00000000 0x04000000>; /* 64MB @ 0x0 */ 55 store-gathering = <0>; /* 0 == off, !0 == on */ 56 ranges = <0x0 0xfc000000 0x100000>; 57 reg = <0xfc000000 0x100000>; /* EUMB */ 58 bus-frequency = <0>; /* fixed by loader */ 62 #size-cells = <0>; [all …]
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D | amigaone.dts | 20 #size-cells = <0>; 22 cpu@0 { 24 reg = <0>; 29 timebase-frequency = <0>; // 33.3 MHz, from U-boot 30 clock-frequency = <0>; // From U-boot 31 bus-frequency = <0>; // From U-boot 37 reg = <0 0>; // From U-boot 44 bus-range = <0 0xff>; 45 ranges = <0x01000000 0 0x00000000 0xfe000000 0 0x00c00000 // PCI I/O 46 0x02000000 0 0x80000000 0x80000000 0 0x7d000000 // PCI memory [all …]
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/Linux-v5.10/drivers/net/ethernet/ibm/emac/ |
D | mal.h | 37 #define MAL_CFG 0x00 38 #define MAL_CFG_SR 0x80000000 39 #define MAL_CFG_PLBB 0x00004000 40 #define MAL_CFG_OPBBL 0x00000080 41 #define MAL_CFG_EOPIE 0x00000004 42 #define MAL_CFG_LEA 0x00000002 43 #define MAL_CFG_SD 0x00000001 46 #define MAL1_CFG_PLBP_MASK 0x00c00000 47 #define MAL1_CFG_PLBP_10 0x00800000 48 #define MAL1_CFG_GA 0x00200000 [all …]
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D | emac.h | 103 #define EMAC_MR0_RXI 0x80000000 104 #define EMAC_MR0_TXI 0x40000000 105 #define EMAC_MR0_SRST 0x20000000 106 #define EMAC_MR0_TXE 0x10000000 107 #define EMAC_MR0_RXE 0x08000000 108 #define EMAC_MR0_WKE 0x04000000 111 #define EMAC_MR1_FDE 0x80000000 112 #define EMAC_MR1_ILE 0x40000000 113 #define EMAC_MR1_VLE 0x20000000 114 #define EMAC_MR1_EIFC 0x10000000 [all …]
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/Linux-v5.10/drivers/dma/ |
D | fsldma.h | 19 #define FSL_DMA_MR_CS 0x00000001 20 #define FSL_DMA_MR_CC 0x00000002 21 #define FSL_DMA_MR_CA 0x00000008 22 #define FSL_DMA_MR_EIE 0x00000040 23 #define FSL_DMA_MR_XFE 0x00000020 24 #define FSL_DMA_MR_EOLNIE 0x00000100 25 #define FSL_DMA_MR_EOLSIE 0x00000080 26 #define FSL_DMA_MR_EOSIE 0x00000200 27 #define FSL_DMA_MR_CDSM 0x00000010 28 #define FSL_DMA_MR_CTM 0x00000004 [all …]
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/Linux-v5.10/arch/arm/boot/dts/ |
D | imx1-apf9328.dts | 19 reg = <0x08000000 0x00800000>; 25 pinctrl-0 = <&pinctrl_i2c>; 31 pinctrl-0 = <&pinctrl_uart1>; 38 pinctrl-0 = <&pinctrl_uart2>; 45 pinctrl-0 = <&pinctrl_weim>; 48 nor: nor@0,0 { 50 reg = <0 0x00000000 0x02000000>; 52 fsl,weim-cs-timing = <0x00330e04 0x00000d01>; 59 pinctrl-0 = <&pinctrl_eth>; 62 4 0x00c00000 0x2 [all …]
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D | zx296702.dtsi | 12 #size-cells = <0>; 15 cpu@0 { 19 reg = <0>; 40 reg = <0x00400000 0x1000>; 49 reg = <0x00801000 0x1000>, 50 <0x00800100 0x100>; 55 reg = <0x00800200 0x20>; 63 reg = <0x00c00000 0x1000>; 69 arm,double-linefill-incr = <0>; 74 reg = <0xa0008000 0x1000>; [all …]
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D | armada-385-db-ap.dts | 26 reg = <0x00000000 0x80000000>; /* 2GB */ 30 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 31 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000 32 MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000 33 MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000 34 MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>; 39 pinctrl-0 = <&i2c0_pins>; 54 pinctrl-0 = <&mdio_pins>; 72 pinctrl-0 = <&uart0_pins>; 82 pinctrl-0 = <&uart1_pins>; [all …]
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/Linux-v5.10/drivers/misc/habanalabs/include/gaudi/ |
D | gaudi_packets.h | 14 #define PACKET_HEADER_PACKET_ID_MASK 0x1F00000000000000ull 17 PACKET_WREG_32 = 0x1, 18 PACKET_WREG_BULK = 0x2, 19 PACKET_MSG_LONG = 0x3, 20 PACKET_MSG_SHORT = 0x4, 21 PACKET_CP_DMA = 0x5, 22 PACKET_REPEAT = 0x6, 23 PACKET_MSG_PROT = 0x7, 24 PACKET_FENCE = 0x8, 25 PACKET_LIN_DMA = 0x9, [all …]
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/Linux-v5.10/Documentation/devicetree/bindings/media/ |
D | qcom,msm8996-venus.yaml | 131 reg = <0x00c00000 0xff000>; 139 iommus = <&venus_smmu 0x00>, 140 <&venus_smmu 0x01>, 141 <&venus_smmu 0x0a>, 142 <&venus_smmu 0x07>, 143 <&venus_smmu 0x0e>, 144 <&venus_smmu 0x0f>, 145 <&venus_smmu 0x08>, 146 <&venus_smmu 0x09>, 147 <&venus_smmu 0x0b>, [all …]
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/Linux-v5.10/drivers/video/fbdev/ |
D | sm712.h | 23 #define dac_reg (0x3c8) 24 #define dac_val (0x3c9) 31 #define SIZE_SR00_SR04 (0x04 - 0x00 + 1) 32 #define SIZE_SR10_SR24 (0x24 - 0x10 + 1) 33 #define SIZE_SR30_SR75 (0x75 - 0x30 + 1) 34 #define SIZE_SR80_SR93 (0x93 - 0x80 + 1) 35 #define SIZE_SRA0_SRAF (0xAF - 0xA0 + 1) 36 #define SIZE_GR00_GR08 (0x08 - 0x00 + 1) 37 #define SIZE_AR00_AR14 (0x14 - 0x00 + 1) 38 #define SIZE_CR00_CR18 (0x18 - 0x00 + 1) [all …]
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/Linux-v5.10/drivers/dma/ipu/ |
D | ipu_intern.h | 17 #define IPU_CONF 0x00 18 #define IPU_CHA_BUF0_RDY 0x04 19 #define IPU_CHA_BUF1_RDY 0x08 20 #define IPU_CHA_DB_MODE_SEL 0x0C 21 #define IPU_CHA_CUR_BUF 0x10 22 #define IPU_FS_PROC_FLOW 0x14 23 #define IPU_FS_DISP_FLOW 0x18 24 #define IPU_TASKS_STAT 0x1C 25 #define IPU_IMA_ADDR 0x20 26 #define IPU_IMA_DATA 0x24 [all …]
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/Linux-v5.10/drivers/staging/rtl8188eu/hal/ |
D | rtl8188eu_xmit.c | 34 u16 checksum = 0; in rtl8188eu_cal_txdesc_chksum() 37 ptxdesc->txdw7 &= cpu_to_le32(0xffff0000); in rtl8188eu_cal_txdesc_chksum() 39 for (index = 0; index < count; index++) in rtl8188eu_cal_txdesc_chksum() 41 ptxdesc->txdw7 |= cpu_to_le32(0x0000ffff & checksum); in rtl8188eu_cal_txdesc_chksum() 55 memset(desc, 0, TXDESC_SIZE); in rtl8188e_fill_fake_txdesc() 57 /* offset 0 */ in rtl8188e_fill_fake_txdesc() 60 …ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE + OFFSET_SZ) << OFFSET_SHT) & 0x00ff0000); /* 32 bytes… in rtl8188e_fill_fake_txdesc() 62 ptxdesc->txdw0 |= cpu_to_le32(BufferLen & 0x0000ffff); /* Buffer size + command header */ in rtl8188e_fill_fake_txdesc() 65 …ptxdesc->txdw1 |= cpu_to_le32((QSLT_MGNT << QSEL_SHT) & 0x00001f00); /* Fixed queue of Mgnt queue… in rtl8188e_fill_fake_txdesc() 88 if ((pattrib->encrypt > 0) && !pattrib->bswenc) { in fill_txdesc_sectype() [all …]
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/Linux-v5.10/drivers/vme/bridges/ |
D | vme_ca91cx42.h | 21 #define PCI_VENDOR_ID_TUNDRA 0x10e3 25 #define PCI_DEVICE_ID_TUNDRA_CA91C142 0x0000 72 #define CA91CX42_PCI_ID 0x000 73 #define CA91CX42_PCI_CSR 0x004 74 #define CA91CX42_PCI_CLASS 0x008 75 #define CA91CX42_PCI_MISC0 0x00C 76 #define CA91CX42_PCI_BS 0x010 77 #define CA91CX42_PCI_MISC1 0x03C 79 #define LSI0_CTL 0x0100 80 #define LSI0_BS 0x0104 [all …]
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/Linux-v5.10/arch/arm/mach-pxa/include/mach/ |
D | balloon3.h | 25 #define BALLOON3_FPGA_VIRT IOMEM(0xf1000000) /* as per balloon2 */ 26 #define BALLOON3_FPGA_LENGTH 0x01000000 28 #define BALLOON3_FPGA_SETnCLR (0x1000) 31 #define BALLOON3_CF_STATUS_REG (BALLOON3_FPGA_VIRT + 0x00e00008) 32 #define BALLOON3_CF_CONTROL_REG (BALLOON3_FPGA_VIRT + 0x00e00008) 34 #define BALLOON3_FPGA_VER (BALLOON3_FPGA_VIRT + 0x00e0001c) 36 #define BALLOON3_NAND_BASE (PXA_CS4_PHYS + 0x00e00000) 37 #define BALLOON3_NAND_IO_REG (BALLOON3_FPGA_VIRT + 0x00e00000) 38 #define BALLOON3_NAND_CONTROL2_REG (BALLOON3_FPGA_VIRT + 0x00e00010) 39 #define BALLOON3_NAND_STAT_REG (BALLOON3_FPGA_VIRT + 0x00e00014) [all …]
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/Linux-v5.10/arch/arm/mach-s3c/ |
D | bast.h | 16 #define BAST_CPLD_CTRL1_LRCOFF (0x00) 17 #define BAST_CPLD_CTRL1_LRCADC (0x01) 18 #define BAST_CPLD_CTRL1_LRCDAC (0x02) 19 #define BAST_CPLD_CTRL1_LRCARM (0x03) 20 #define BAST_CPLD_CTRL1_LRMASK (0x03) 24 #define BAST_CPLD_CTRL2_WNAND (0x04) 25 #define BAST_CPLD_CTLR2_IDERST (0x08) 29 #define BAST_CPLD_CTRL3_IDMASK (0x0e) 30 #define BAST_CPLD_CTRL3_ROMWEN (0x01) 34 #define BAST_CPLD_CTRL4_LLAT (0x01) [all …]
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/Linux-v5.10/arch/powerpc/platforms/embedded6xx/ |
D | mpc10x.h | 24 * Processor: 0x80000000 - 0x807fffff -> PCI I/O: 0x00000000 - 0x007fffff 25 * Processor: 0xc0000000 - 0xdfffffff -> PCI MEM: 0x00000000 - 0x1fffffff 26 * PCI MEM: 0x80000000 -> Processor System Memory: 0x00000000 29 * Processor: 0xfe000000 - 0xfebfffff -> PCI I/O: 0x00000000 - 0x00bfffff 30 * Processor: 0x80000000 - 0xbfffffff -> PCI MEM: 0x80000000 - 0xbfffffff 31 * PCI MEM: 0x00000000 -> Processor System Memory: 0x00000000 40 #define MPC10X_BRIDGE_8240 ((0x0003 << 16) | PCI_VENDOR_ID_MOTOROLA) 41 #define MPC10X_BRIDGE_107 ((0x0004 << 16) | PCI_VENDOR_ID_MOTOROLA) 42 #define MPC10X_BRIDGE_8245 ((0x0006 << 16) | PCI_VENDOR_ID_MOTOROLA) 49 #define MPC10X_MAPA_CNFG_ADDR 0x80000cf8 [all …]
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/Linux-v5.10/arch/sh/kernel/cpu/sh4a/ |
D | setup-sh7780.c | 25 DEFINE_RES_MEM(0xffe00000, 0x100), 26 DEFINE_RES_IRQ(evt2irq(0x700)), 31 .id = 0, 46 DEFINE_RES_MEM(0xffe10000, 0x100), 47 DEFINE_RES_IRQ(evt2irq(0xb80)), 65 DEFINE_RES_MEM(0xffd80000, 0x30), 66 DEFINE_RES_IRQ(evt2irq(0x580)), 67 DEFINE_RES_IRQ(evt2irq(0x5a0)), 68 DEFINE_RES_IRQ(evt2irq(0x5c0)), 73 .id = 0, [all …]
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/Linux-v5.10/drivers/staging/rtl8712/ |
D | rtl8712_xmit.c | 73 case 0: in r8712_txframes_sta_ac_pending() 84 u32 addr = 0; in get_ff_hwaddr() 95 case 0: in get_ff_hwaddr() 111 case 0x10: in get_ff_hwaddr() 112 case 0x11: in get_ff_hwaddr() 113 case 0x12: in get_ff_hwaddr() 114 case 0x13: in get_ff_hwaddr() 123 case 0: in get_ff_hwaddr() 135 case 0x10: in get_ff_hwaddr() 136 case 0x11: in get_ff_hwaddr() [all …]
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/Linux-v5.10/drivers/net/wireless/ti/wl18xx/ |
D | reg.h | 11 #define WL18XX_REGISTERS_BASE 0x00800000 12 #define WL18XX_CODE_BASE 0x00000000 13 #define WL18XX_DATA_BASE 0x00400000 14 #define WL18XX_DOUBLE_BUFFER_BASE 0x00600000 15 #define WL18XX_MCU_KEY_SEARCH_BASE 0x00700000 16 #define WL18XX_PHY_BASE 0x00900000 17 #define WL18XX_TOP_OCP_BASE 0x00A00000 18 #define WL18XX_PACKET_RAM_BASE 0x00B00000 19 #define WL18XX_HOST_BASE 0x00C00000 21 #define WL18XX_REGISTERS_DOWN_SIZE 0x0000B000 [all …]
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/Linux-v5.10/sound/soc/sh/rcar/ |
D | src.c | 41 for ((i) = 0; \ 59 rsnd_mod_write(mod, SRC_SWRSR, 0); in rsnd_src_activation() 66 rsnd_mod_write(mod, SRC_SWRSR, 0); in rsnd_src_halt() 88 return 0; in rsnd_src_convert_rate() 110 unsigned int rate = 0; in rsnd_src_get_rate() 138 0x01800000, /* 6 - 1/6 */ 139 0x01000000, /* 6 - 1/4 */ 140 0x00c00000, /* 6 - 1/3 */ 141 0x00800000, /* 6 - 1/2 */ 142 0x00600000, /* 6 - 2/3 */ [all …]
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