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12

/Linux-v6.1/drivers/media/platform/mediatek/mdp3/
Dmdp_reg_rsz.h10 #define PRZ_ENABLE 0x000
11 #define PRZ_CONTROL_1 0x004
12 #define PRZ_CONTROL_2 0x008
13 #define PRZ_INPUT_IMAGE 0x010
14 #define PRZ_OUTPUT_IMAGE 0x014
15 #define PRZ_HORIZONTAL_COEFF_STEP 0x018
16 #define PRZ_VERTICAL_COEFF_STEP 0x01c
17 #define PRZ_LUMA_HORIZONTAL_INTEGER_OFFSET 0x020
18 #define PRZ_LUMA_HORIZONTAL_SUBPIXEL_OFFSET 0x024
19 #define PRZ_LUMA_VERTICAL_INTEGER_OFFSET 0x028
[all …]
Dmdp_reg_rdma.h10 #define MDP_RDMA_EN 0x000
11 #define MDP_RDMA_RESET 0x008
12 #define MDP_RDMA_CON 0x020
13 #define MDP_RDMA_GMCIF_CON 0x028
14 #define MDP_RDMA_SRC_CON 0x030
15 #define MDP_RDMA_MF_BKGD_SIZE_IN_BYTE 0x060
16 #define MDP_RDMA_MF_BKGD_SIZE_IN_PXL 0x068
17 #define MDP_RDMA_MF_SRC_SIZE 0x070
18 #define MDP_RDMA_MF_CLIP_SIZE 0x078
19 #define MDP_RDMA_MF_OFFSET_1 0x080
[all …]
Dmtk-mdp3-comp.c55 0x0, BIT(0)); in init_rdma()
59 MM_REG_WRITE(cmd, subsys_id, base, MDP_RDMA_RESET, BIT(0), BIT(0)); in init_rdma()
61 MM_REG_WRITE(cmd, subsys_id, base, MDP_RDMA_RESET, 0x0, BIT(0)); in init_rdma()
62 return 0; in init_rdma()
80 MDP_RDMA_RESV_DUMMY_0, 0x7, 0x7); in config_rdma_frame()
83 MDP_RDMA_RESV_DUMMY_0, 0x0, 0x7); in config_rdma_frame()
90 0x00030071); in config_rdma_frame()
94 0x03C8FE0F); in config_rdma_frame()
101 rdma->ufo_dec_y, 0xFFFFFFFF); in config_rdma_frame()
104 rdma->ufo_dec_c, 0xFFFFFFFF); in config_rdma_frame()
[all …]
/Linux-v6.1/arch/arm/boot/dts/
Dtegra30-asus-tf300t.dts75 reg = <0x10>;
94 mount-matrix = "0", "-1", "0",
95 "-1", "0", "0",
96 "0", "0", "-1";
100 mount-matrix = "-1", "0", "0",
101 "0", "1", "0",
102 "0", "0", "-1";
107 mount-matrix = "0", "-1", "0",
108 "-1", "0", "0",
109 "0", "0", "1";
[all …]
Dtegra30-asus-tf300tg.dts22 <TEGRA_GPIO(X, 0) GPIO_ACTIVE_HIGH>,
171 reg = <0x10>;
190 mount-matrix = "1", "0", "0",
191 "0", "-1", "0",
192 "0", "0", "-1";
196 mount-matrix = "-1", "0", "0",
197 "0", "1", "0",
198 "0", "0", "-1";
203 mount-matrix = "0", "-1", "0",
204 "-1", "0", "0",
[all …]
Dtegra30-asus-tf201.dts67 reg = <0x4d>;
82 mount-matrix = "-1", "0", "0",
83 "0", "-1", "0",
84 "0", "0", "-1";
88 mount-matrix = "0", "-1", "0",
89 "-1", "0", "0",
90 "0", "0", "-1";
95 mount-matrix = "1", "0", "0",
96 "0", "-1", "0",
97 "0", "0", "1";
[all …]
Dtegra30-asus-tf700t.dts18 port@0 {
92 reg = <0x10>;
111 mount-matrix = "1", "0", "0",
112 "0", "-1", "0",
113 "0", "0", "-1";
117 mount-matrix = "0", "1", "0",
118 "1", "0", "0",
119 "0", "0", "-1";
124 mount-matrix = "0", "-1", "0",
125 "-1", "0", "0",
[all …]
Dtegra124-nyan-blaze-emc.dtsi89 0x40040001
90 0x8000000a
91 0x00000001
92 0x00000001
93 0x00000002
94 0x00000000
95 0x00000002
96 0x00000001
97 0x00000002
98 0x00000008
[all …]
Dtegra124-apalis-emc.dtsi106 0x40040001 0x8000000a
107 0x00000001 0x00000001
108 0x00000002 0x00000000
109 0x00000002 0x00000001
110 0x00000003 0x00000008
111 0x00000003 0x00000002
112 0x00000003 0x00000006
113 0x06030203 0x000a0502
114 0x77e30303 0x70000f03
115 0x001f0000
[all …]
Dtegra124-jetson-tk1-emc.dtsi101 0x40040001
102 0x8000000a
103 0x00000001
104 0x00000001
105 0x00000002
106 0x00000000
107 0x00000002
108 0x00000001
109 0x00000003
110 0x00000008
[all …]
Dtegra30-pegatron-chagall.dts41 reg = <0x80000000 0x40000000>;
51 alloc-ranges = <0x80000000 0x30000000>;
52 size = <0x10000000>; /* 256MiB */
59 reg = <0xbeb00000 0x10000>; /* 64kB */
60 console-size = <0x8000>; /* 32kB */
61 record-size = <0x400>; /* 1kB */
66 reg = <0xbfe00000 0x200000>; /* 2MB */
92 pinctrl-0 = <&state_default>;
136 nvidia,lock = <0>;
137 nvidia,ioreset = <0>;
[all …]
Dtegra30-asus-nexus7-grouper-memory-timings.dtsi5 emc-timings-0 {
6 nvidia,ram-code = <0>; /* Elpida EDJ2108EDBG-DJL-F */
12 0x00020001 /* MC_EMEM_ARB_CFG */
13 0xc0000020 /* MC_EMEM_ARB_OUTSTANDING_REQ */
14 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
15 0x00000001 /* MC_EMEM_ARB_TIMING_RP */
16 0x00000002 /* MC_EMEM_ARB_TIMING_RC */
17 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
18 0x00000001 /* MC_EMEM_ARB_TIMING_FAW */
19 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
[all …]
Dtegra30-asus-nexus7-tilapia-memory-timings.dtsi13 emc-timings-0 {
17 nvidia,emc-auto-cal-interval = <0x001fffff>;
18 nvidia,emc-mode-1 = <0x80100002>;
19 nvidia,emc-mode-2 = <0x80200018>;
20 nvidia,emc-mode-reset = <0x80000b71>;
21 nvidia,emc-zcal-cnt-long = <0x00000040>;
25 0x0000001f /* EMC_RC */
26 0x00000069 /* EMC_RFC */
27 0x00000017 /* EMC_RAS */
28 0x00000007 /* EMC_RP */
[all …]
Dtegra124-nyan-big-emc.dtsi260 0x40040001 /* MC_EMEM_ARB_CFG */
261 0x8000000a /* MC_EMEM_ARB_OUTSTANDING_REQ */
262 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
263 0x00000001 /* MC_EMEM_ARB_TIMING_RP */
264 0x00000002 /* MC_EMEM_ARB_TIMING_RC */
265 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
266 0x00000002 /* MC_EMEM_ARB_TIMING_FAW */
267 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
268 0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */
269 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
[all …]
Dtegra30-ouya.dts30 reg = <0x80000000 0x40000000>;
40 alloc-ranges = <0x80000000 0x30000000>;
41 size = <0x10000000>; /* 256MiB */
48 reg = <0xbfdf0000 0x10000>; /* 64kB */
49 console-size = <0x8000>; /* 32kB */
50 record-size = <0x400>; /* 1kB */
55 reg = <0xbfe00000 0x200000>;
73 pinctrl-0 = <&state_default>;
2002 nvidia,adjust-baud-rates = <0 9600 100>,
2022 shutdown-gpios = <&gpio TEGRA_GPIO(U, 0) GPIO_ACTIVE_HIGH>;
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/watchdog/
Dsnps,dw-wdt.yaml68 default: [0x0001000 0x0002000 0x0004000 0x0008000
69 0x0010000 0x0020000 0x0040000 0x0080000
70 0x0100000 0x0200000 0x0400000 0x0800000
71 0x1000000 0x2000000 0x4000000 0x8000000]
86 reg = <0xffd02000 0x1000>;
87 interrupts = <0 171 4>;
95 reg = <0xffd02000 0x1000>;
96 interrupts = <0 171 4>;
99 snps,watchdog-tops = <0x000000FF 0x000001FF 0x000003FF
100 0x000007FF 0x0000FFFF 0x0001FFFF
[all …]
/Linux-v6.1/drivers/irqchip/
Dirq-st.c18 #define STIH415_SYSCFG_642 0x0a8
19 #define STIH416_SYSCFG_7543 0x87c
20 #define STIH407_SYSCFG_5102 0x198
21 #define STID127_SYSCFG_734 0x088
23 #define ST_A9_IRQ_MASK 0x001FFFFF
26 #define ST_A9_IRQ_EN_CTI_0 BIT(0)
98 return 0; in st_irq_xlate()
109 return 0; in st_irq_xlate()
131 for (i = 0; i < ST_A9_IRQ_MAX_CHANS; i++) { in st_irq_syscfg_enable()
/Linux-v6.1/drivers/gpu/drm/nouveau/nvkm/subdev/bios/
Dvolt.c32 u32 volt = 0; in nvbios_volt_table()
36 volt = nvbios_rd32(bios, bit_P.offset + 0x0c); in nvbios_volt_table()
39 volt = nvbios_rd32(bios, bit_P.offset + 0x10); in nvbios_volt_table()
42 *ver = nvbios_rd08(bios, volt + 0); in nvbios_volt_table()
44 case 0x12: in nvbios_volt_table()
49 case 0x20: in nvbios_volt_table()
54 case 0x30: in nvbios_volt_table()
55 case 0x40: in nvbios_volt_table()
56 case 0x50: in nvbios_volt_table()
65 return 0; in nvbios_volt_table()
[all …]
/Linux-v6.1/drivers/gpu/drm/amd/amdgpu/
Dmxgpu_vi.c49 mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xffffffff,
50 mmGRBM_GFX_INDEX, 0xffffffff, 0xe0000000,
51 mmCB_CGTT_SCLK_CTRL, 0xffffffff, 0x00000100,
52 mmCGTT_BCI_CLK_CTRL, 0xffffffff, 0x00000100,
53 mmCGTT_CP_CLK_CTRL, 0xffffffff, 0x00000100,
54 mmCGTT_CPC_CLK_CTRL, 0xffffffff, 0x00000100,
55 mmCGTT_CPF_CLK_CTRL, 0xffffffff, 0x40000100,
56 mmCGTT_DRM_CLK_CTRL0, 0xffffffff, 0x00600100,
57 mmCGTT_GDS_CLK_CTRL, 0xffffffff, 0x00000100,
58 mmCGTT_IA_CLK_CTRL, 0xffffffff, 0x06000100,
[all …]
/Linux-v6.1/fs/unicode/
Dutf8-norm.c13 while (i >= 0 && um->tables->utf8agetab[i] != 0) { in utf8version_is_supported()
18 return 0; in utf8version_is_supported()
28 * 0x00000000 0x0000007F: 0xxxxxxx
29 * 0x00000000 0x000007FF: 110xxxxx 10xxxxxx
30 * 0x00000000 0x0000FFFF: 1110xxxx 10xxxxxx 10xxxxxx
31 * 0x00000000 0x001FFFFF: 11110xxx 10xxxxxx 10xxxxxx 10xxxxxx
32 * 0x00000000 0x03FFFFFF: 111110xx 10xxxxxx 10xxxxxx 10xxxxxx 10xxxxxx
33 * 0x00000000 0x7FFFFFFF: 1111110x 10xxxxxx 10xxxxxx 10xxxxxx 10xxxxxx 10xxxxxx
40 * 0x00000000 0x0000007F: 0xxxxxxx
41 * 0x00000080 0x000007FF: 110xxxxx 10xxxxxx
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/memory-controllers/
Dnvidia,tegra30-emc.yaml35 const: 0
53 "^emc-timings-[0-9]+$":
62 "^timing-[0-9]+$":
75 minimum: 0
91 Mode Register 0.
98 minimum: 0
239 reg = <0x7000f400 0x400>;
240 interrupts = <0 78 4>;
247 #interconnect-cells = <0>;
255 nvidia,emc-auto-cal-interval = <0x001fffff>;
[all …]
Dnvidia,tegra124-emc.yaml33 const: 0
51 "^emc-timings-[0-9]+$":
61 "^timing-[0-9]+$":
92 minimum: 0
155 minimum: 0
355 reg = <0x70019000 0x1000>;
368 reg = <0x7001b000 0x1000>;
376 #interconnect-cells = <0>;
378 emc-timings-0 {
381 timing-0 {
[all …]
/Linux-v6.1/drivers/net/wireless/ath/ath6kl/
Dtarget.h26 #define AR6004_BOARD_EXT_DATA_SZ 0
28 #define RESET_CONTROL_ADDRESS 0x00004000
29 #define RESET_CONTROL_COLD_RST 0x00000100
30 #define RESET_CONTROL_MBOX_RST 0x00000004
32 #define CPU_CLOCK_STANDARD_S 0
33 #define CPU_CLOCK_STANDARD 0x00000003
34 #define CPU_CLOCK_ADDRESS 0x00000020
36 #define CLOCK_CONTROL_ADDRESS 0x00000028
38 #define CLOCK_CONTROL_LF_CLK32 0x00000004
40 #define SYSTEM_SLEEP_ADDRESS 0x000000c4
[all …]
/Linux-v6.1/drivers/gpu/drm/amd/amdkfd/
Dkfd_int_process_v11.c39 * The 44-bit packet is mapped as {context_id1[7:0],context_id0[31:0]} plus
43 * Encoding type (0 = Auto, 1 = Wave, 2 = Error)
48 * - context_id0[24:0]
50 * Auto - only context_id0[8:0] is used, which reports various interrupts
51 * generated by SQG. The rest is 0.
52 * Wave - user data sent from m0 via S_SENDMSG (context_id0[23:0])
53 * Error - Error Type (context_id0[24:21]), Error Details (context_id0[20:0])
56 * S_SENDMSG and Errors. These are 0 for Auto.
60 SQ_INTERRUPT_WORD_ENCODING_AUTO = 0x0,
66 SQ_INTERRUPT_ERROR_TYPE_EDC_FUE = 0x0,
[all …]
/Linux-v6.1/drivers/gpu/drm/savage/
Dsavage_drv.h101 S3_UNKNOWN = 0,
227 #define SAVAGE_FB_SIZE_S3 0x01000000 /* 16MB */
228 #define SAVAGE_FB_SIZE_S4 0x02000000 /* 32MB */
229 #define SAVAGE_MMIO_SIZE 0x00080000 /* 512kB */
230 #define SAVAGE_APERTURE_OFFSET 0x02000000 /* 32MB */
231 #define SAVAGE_APERTURE_SIZE 0x05000000 /* 5 tiled surfaces, 16MB each */
233 #define SAVAGE_BCI_OFFSET 0x00010000 /* offset of the BCI region
241 #define SAVAGE_STATUS_WORD0 0x48C00
242 #define SAVAGE_STATUS_WORD1 0x48C04
243 #define SAVAGE_ALT_STATUS_WORD0 0x48C60
[all …]

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