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/Linux-v6.6/drivers/gpu/drm/nouveau/nvkm/subdev/bus/
Dnv31.c35 u32 stat = nvkm_rd32(device, 0x001100) & nvkm_rd32(device, 0x001140); in nv31_bus_intr()
36 u32 gpio = nvkm_rd32(device, 0x001104) & nvkm_rd32(device, 0x001144); in nv31_bus_intr()
44 if (stat & 0x00000008) { /* NV41- */ in nv31_bus_intr()
45 u32 addr = nvkm_rd32(device, 0x009084); in nv31_bus_intr()
46 u32 data = nvkm_rd32(device, 0x009088); in nv31_bus_intr()
49 (addr & 0x00000002) ? "write" : "read", data, in nv31_bus_intr()
50 (addr & 0x00fffffc)); in nv31_bus_intr()
52 stat &= ~0x00000008; in nv31_bus_intr()
53 nvkm_wr32(device, 0x001100, 0x00000008); in nv31_bus_intr()
56 if (stat & 0x00070000) { in nv31_bus_intr()
[all …]
/Linux-v6.6/drivers/net/wireless/realtek/rtlwifi/rtl8192de/
Dtable.c9 0x024, 0x0011800d,
10 0x028, 0x00ffdb83,
11 0x014, 0x088ba955,
12 0x010, 0x49022b03,
13 0x800, 0x80040002,
14 0x804, 0x00000003,
15 0x808, 0x0000fc00,
16 0x80c, 0x0000000a,
17 0x810, 0x80706388,
18 0x814, 0x020c3d10,
[all …]
/Linux-v6.6/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
Dmcp77.c45 return nvkm_rd32(device, 0x004600); in read_div()
52 u32 ctrl = nvkm_rd32(device, base + 0); in read_pll()
55 u32 post_div = 0; in read_pll()
56 u32 clock = 0; in read_pll()
60 case 0x4020: in read_pll()
61 post_div = 1 << ((nvkm_rd32(device, 0x4070) & 0x000f0000) >> 16); in read_pll()
63 case 0x4028: in read_pll()
64 post_div = (nvkm_rd32(device, 0x4040) & 0x000f0000) >> 16; in read_pll()
70 N1 = (coef & 0x0000ff00) >> 8; in read_pll()
71 M1 = (coef & 0x000000ff); in read_pll()
[all …]
Dnv50.c36 case 0x50: /* it exists, but only has bit 31, not the dividers.. */ in read_div()
37 case 0x84: in read_div()
38 case 0x86: in read_div()
39 case 0x98: in read_div()
40 case 0xa0: in read_div()
41 return nvkm_rd32(device, 0x004700); in read_div()
42 case 0x92: in read_div()
43 case 0x94: in read_div()
44 case 0x96: in read_div()
45 return nvkm_rd32(device, 0x004800); in read_div()
[all …]
Dnv40.c43 u32 ctrl = nvkm_rd32(device, reg + 0x00); in read_pll_1()
44 int P = (ctrl & 0x00070000) >> 16; in read_pll_1()
45 int N = (ctrl & 0x0000ff00) >> 8; in read_pll_1()
46 int M = (ctrl & 0x000000ff) >> 0; in read_pll_1()
47 u32 ref = 27000, khz = 0; in read_pll_1()
49 if (ctrl & 0x80000000) in read_pll_1()
59 u32 ctrl = nvkm_rd32(device, reg + 0x00); in read_pll_2()
60 u32 coef = nvkm_rd32(device, reg + 0x04); in read_pll_2()
61 int N2 = (coef & 0xff000000) >> 24; in read_pll_2()
62 int M2 = (coef & 0x00ff0000) >> 16; in read_pll_2()
[all …]
/Linux-v6.6/drivers/gpu/drm/radeon/
Dbtc_dpm.c38 #define MC_CG_ARB_FREQ_F0 0x0a
39 #define MC_CG_ARB_FREQ_F1 0x0b
40 #define MC_CG_ARB_FREQ_F2 0x0c
41 #define MC_CG_ARB_FREQ_F3 0x0d
43 #define MC_CG_SEQ_DRAMCONF_S0 0x05
44 #define MC_CG_SEQ_DRAMCONF_S1 0x06
45 #define MC_CG_SEQ_YCLK_SUSPEND 0x04
46 #define MC_CG_SEQ_YCLK_RESUME 0x0a
48 #define SMC_RAM_END 0x8000
59 0x000008f8, 0x00000010, 0xffffffff,
[all …]
Devergreen.c49 #define DC_HPDx_CONTROL(x) (DC_HPD1_CONTROL + (x * 0xc))
50 #define DC_HPDx_INT_CONTROL(x) (DC_HPD1_INT_CONTROL + (x * 0xc))
51 #define DC_HPDx_INT_STATUS_REG(x) (DC_HPD1_INT_STATUS + (x * 0xc))
62 WREG32(EVERGREEN_CG_IND_ADDR, ((reg) & 0xffff)); in eg_cg_rreg()
73 WREG32(EVERGREEN_CG_IND_ADDR, ((reg) & 0xffff)); in eg_cg_wreg()
84 WREG32(EVERGREEN_PIF_PHY0_INDEX, ((reg) & 0xffff)); in eg_pif_phy0_rreg()
95 WREG32(EVERGREEN_PIF_PHY0_INDEX, ((reg) & 0xffff)); in eg_pif_phy0_wreg()
106 WREG32(EVERGREEN_PIF_PHY1_INDEX, ((reg) & 0xffff)); in eg_pif_phy1_rreg()
117 WREG32(EVERGREEN_PIF_PHY1_INDEX, ((reg) & 0xffff)); in eg_pif_phy1_wreg()
136 0x98fc,
[all …]
Dni_dpm.c37 #define MC_CG_ARB_FREQ_F0 0x0a
38 #define MC_CG_ARB_FREQ_F1 0x0b
39 #define MC_CG_ARB_FREQ_F2 0x0c
40 #define MC_CG_ARB_FREQ_F3 0x0d
42 #define SMC_RAM_END 0xC000
46 0x15,
47 0x2,
48 0x19,
49 0x2,
50 0x8,
[all …]
/Linux-v6.6/arch/mips/include/asm/mach-ath79/
Dar71xx_regs.h19 #define AR71XX_APB_BASE 0x18000000
20 #define AR71XX_GE0_BASE 0x19000000
21 #define AR71XX_GE0_SIZE 0x10000
22 #define AR71XX_GE1_BASE 0x1a000000
23 #define AR71XX_GE1_SIZE 0x10000
24 #define AR71XX_EHCI_BASE 0x1b000000
25 #define AR71XX_EHCI_SIZE 0x1000
26 #define AR71XX_OHCI_BASE 0x1c000000
27 #define AR71XX_OHCI_SIZE 0x1000
28 #define AR71XX_SPI_BASE 0x1f000000
[all …]
/Linux-v6.6/arch/arm/mach-realtek/
Drtd1195.c23 rtd1195_memblock_remove(0x00000000, 0x0000a800); in rtd1195_reserve()
26 rtd1195_memblock_remove(0x18000000, 0x00070000); in rtd1195_reserve()
27 rtd1195_memblock_remove(0x18100000, 0x01000000); in rtd1195_reserve()
38 .l2c_aux_val = 0x0,
39 .l2c_aux_mask = ~0x0,
/Linux-v6.6/Documentation/devicetree/bindings/iio/dac/
Dfsl,vf610-dac.yaml43 reg = <0x40000000 0x00070000>;
49 reg = <0x400cc000 0x1000>;
/Linux-v6.6/arch/mips/ath25/
Dar5312_regs.h17 #define AR5312_IRQ_WLAN0 (MIPS_CPU_IRQ_BASE + 2) /* C0_CAUSE: 0x0400 */
18 #define AR5312_IRQ_ENET0 (MIPS_CPU_IRQ_BASE + 3) /* C0_CAUSE: 0x0800 */
19 #define AR5312_IRQ_ENET1 (MIPS_CPU_IRQ_BASE + 4) /* C0_CAUSE: 0x1000 */
20 #define AR5312_IRQ_WLAN1 (MIPS_CPU_IRQ_BASE + 5) /* C0_CAUSE: 0x2000 */
21 #define AR5312_IRQ_MISC (MIPS_CPU_IRQ_BASE + 6) /* C0_CAUSE: 0x4000 */
26 #define AR5312_MISC_IRQ_TIMER 0
41 * actually use 1 of them (i.e. Only MAC 0 is actually connected to an enet
44 #define AR5312_WLAN0_BASE 0x18000000
45 #define AR5312_ENET0_BASE 0x18100000
46 #define AR5312_ENET1_BASE 0x18200000
[all …]
/Linux-v6.6/drivers/media/platform/amphion/
Dvpu_imx8q.h9 #define SCB_XREG_SLV_BASE 0x00000000
10 #define SCB_SCB_BLK_CTRL 0x00070000
11 #define SCB_BLK_CTRL_XMEM_RESET_SET 0x00000090
12 #define SCB_BLK_CTRL_CACHE_RESET_SET 0x000000A0
13 #define SCB_BLK_CTRL_CACHE_RESET_CLR 0x000000A4
14 #define SCB_BLK_CTRL_SCB_CLK_ENABLE_SET 0x00000100
16 #define XMEM_CONTROL 0x00041000
18 #define MC_CACHE_0_BASE 0x00060000
19 #define MC_CACHE_1_BASE 0x00068000
21 #define DEC_MFD_XREG_SLV_BASE 0x00180000
[all …]
/Linux-v6.6/drivers/net/wireless/realtek/rtw89/
Drtw8851b_rfk_table.c8 RTW89_DECL_RFK_WM(0xc210, 0x003fc000, 0x80),
9 RTW89_DECL_RFK_WM(0xc224, 0x003fc000, 0x80),
10 RTW89_DECL_RFK_WM(0xc0f8, 0x30000000, 0x3),
11 RTW89_DECL_RFK_WM(0x12b8, BIT(30), 0x1),
12 RTW89_DECL_RFK_WM(0x030c, 0x1f000000, 0x1f),
13 RTW89_DECL_RFK_WM(0x032c, 0xc0000000, 0x0),
14 RTW89_DECL_RFK_WM(0x032c, BIT(22), 0x0),
15 RTW89_DECL_RFK_WM(0x032c, BIT(22), 0x1),
16 RTW89_DECL_RFK_WM(0x032c, BIT(16), 0x0),
17 RTW89_DECL_RFK_WM(0x032c, BIT(20), 0x1),
[all …]
/Linux-v6.6/arch/arm/boot/dts/nvidia/
Dtegra20-acer-a500-picasso.dts37 memory@0 {
38 reg = <0x00000000 0x40000000>;
48 reg = <0x2ffe0000 0x10000>; /* 64kB */
49 console-size = <0x8000>; /* 32kB */
50 record-size = <0x400>; /* 1kB */
56 alloc-ranges = <0x30000000 0x10000000>;
57 size = <0x10000000>; /* 256MiB */
68 port@0 {
92 pinctrl-0 = <&state_default>;
425 shutdown-gpios = <&gpio TEGRA_GPIO(U, 0) GPIO_ACTIVE_HIGH>;
[all …]
Dtegra124-apalis-emc.dtsi108 0x40040001 0x8000000a
109 0x00000001 0x00000001
110 0x00000002 0x00000000
111 0x00000002 0x00000001
112 0x00000003 0x00000008
113 0x00000003 0x00000002
114 0x00000003 0x00000006
115 0x06030203 0x000a0502
116 0x77e30303 0x70000f03
117 0x001f0000
[all …]
Dtegra124-jetson-tk1-emc.dtsi104 0x40040001
105 0x8000000a
106 0x00000001
107 0x00000001
108 0x00000002
109 0x00000000
110 0x00000002
111 0x00000001
112 0x00000003
113 0x00000008
[all …]
/Linux-v6.6/drivers/gpu/drm/mcde/
Dmcde_drm.h13 #define MCDE_CR 0x00000000
14 #define MCDE_CR_IFIFOEMPTYLINECOUNT_V422_SHIFT 0
15 #define MCDE_CR_IFIFOEMPTYLINECOUNT_V422_MASK 0x0000003F
22 #define MCDE_CONF0 0x00000004
23 #define MCDE_CONF0_SYNCMUX0 BIT(0)
32 #define MCDE_CONF0_IFIFOCTRLWTRMRKLVL_MASK 0x00007000
34 #define MCDE_CONF0_OUTMUX0_MASK 0x00070000
36 #define MCDE_CONF0_OUTMUX1_MASK 0x00380000
38 #define MCDE_CONF0_OUTMUX2_MASK 0x01C00000
40 #define MCDE_CONF0_OUTMUX3_MASK 0x0E000000
[all …]
/Linux-v6.6/drivers/soc/tegra/cbb/
Dtegra194-cbb.c27 #define ERRLOGGER_0_ID_COREID_0 0x00000000
28 #define ERRLOGGER_0_ID_REVISIONID_0 0x00000004
29 #define ERRLOGGER_0_FAULTEN_0 0x00000008
30 #define ERRLOGGER_0_ERRVLD_0 0x0000000c
31 #define ERRLOGGER_0_ERRCLR_0 0x00000010
32 #define ERRLOGGER_0_ERRLOG0_0 0x00000014
33 #define ERRLOGGER_0_ERRLOG1_0 0x00000018
34 #define ERRLOGGER_0_RSVD_00_0 0x0000001c
35 #define ERRLOGGER_0_ERRLOG3_0 0x00000020
36 #define ERRLOGGER_0_ERRLOG4_0 0x00000024
[all …]
/Linux-v6.6/drivers/gpu/drm/nouveau/nvkm/engine/fifo/
Dregsnv04.h5 #define NV04_PFIFO_DELAY_0 0x00002040
6 #define NV04_PFIFO_DMA_TIMESLICE 0x00002044
7 #define NV04_PFIFO_NEXT_CHANNEL 0x00002050
8 #define NV03_PFIFO_INTR_0 0x00002100
9 #define NV03_PFIFO_INTR_EN_0 0x00002140
10 # define NV_PFIFO_INTR_CACHE_ERROR (1<<0)
17 #define NV03_PFIFO_RAMHT 0x00002210
18 #define NV03_PFIFO_RAMFC 0x00002214
19 #define NV03_PFIFO_RAMRO 0x00002218
20 #define NV40_PFIFO_RAMFC 0x00002220
[all …]
/Linux-v6.6/arch/arm/nwfpe/
Dfpsr.h32 #define MASK_SYSID 0xff000000
33 #define BIT_HARDWARE 0x80000000
34 #define FP_EMULATOR 0x01000000 /* System ID for emulator */
35 #define FP_ACCELERATOR 0x81000000 /* System ID for FPA11 */
40 #define MASK_TRAP_ENABLE 0x00ff0000
41 #define MASK_TRAP_ENABLE_STRICT 0x001f0000
42 #define BIT_IXE 0x00100000 /* inexact exception enable */
43 #define BIT_UFE 0x00080000 /* underflow exception enable */
44 #define BIT_OFE 0x00040000 /* overflow exception enable */
45 #define BIT_DZE 0x00020000 /* divide by zero exception enable */
[all …]
/Linux-v6.6/include/uapi/linux/
Dnfs4.h30 #define NFS4_ACCESS_READ 0x0001
31 #define NFS4_ACCESS_LOOKUP 0x0002
32 #define NFS4_ACCESS_MODIFY 0x0004
33 #define NFS4_ACCESS_EXTEND 0x0008
34 #define NFS4_ACCESS_DELETE 0x0010
35 #define NFS4_ACCESS_EXECUTE 0x0020
36 #define NFS4_ACCESS_XAREAD 0x0040
37 #define NFS4_ACCESS_XAWRITE 0x0080
38 #define NFS4_ACCESS_XALIST 0x0100
40 #define NFS4_FH_PERSISTENT 0x0000
[all …]
/Linux-v6.6/arch/powerpc/sysdev/
Dfsl_rio.h32 #define RIO_MAINT_WIN_SIZE 0x400000
33 #define RIO_LTLEDCSR 0x0608
35 #define DOORBELL_ROWAR_EN 0x80000000
36 #define DOORBELL_ROWAR_TFLOWLV 0x08000000 /* highest priority level */
37 #define DOORBELL_ROWAR_PCI 0x02000000 /* PCI window */
38 #define DOORBELL_ROWAR_NREAD 0x00040000 /* NREAD */
39 #define DOORBELL_ROWAR_MAINTRD 0x00070000 /* maintenance read */
40 #define DOORBELL_ROWAR_RES 0x00002000 /* wrtpy: reserved */
41 #define DOORBELL_ROWAR_MAINTWD 0x00007000
42 #define DOORBELL_ROWAR_SIZE 0x0000000b /* window size is 4k */
[all …]
/Linux-v6.6/include/linux/mfd/
Dcs42l43-regs.h13 #define CS42L43_GEN_INT_STAT_1 0x000000C0
14 #define CS42L43_GEN_INT_MASK_1 0x000000C1
15 #define CS42L43_DEVID 0x00003000
16 #define CS42L43_REVID 0x00003004
17 #define CS42L43_RELID 0x0000300C
18 #define CS42L43_SFT_RESET 0x00003020
19 #define CS42L43_DRV_CTRL1 0x00006004
20 #define CS42L43_DRV_CTRL3 0x0000600C
21 #define CS42L43_DRV_CTRL4 0x00006010
22 #define CS42L43_DRV_CTRL_5 0x00006014
[all …]
/Linux-v6.6/drivers/net/wireless/ath/ath11k/
Dmac.h32 #define WMI_HOST_RC_DS_FLAG 0x01
33 #define WMI_HOST_RC_CW40_FLAG 0x02
34 #define WMI_HOST_RC_SGI_FLAG 0x04
35 #define WMI_HOST_RC_HT_FLAG 0x08
36 #define WMI_HOST_RC_RTSCTS_FLAG 0x10
37 #define WMI_HOST_RC_TX_STBC_FLAG 0x20
38 #define WMI_HOST_RC_RX_STBC_FLAG 0xC0
40 #define WMI_HOST_RC_WEP_TKIP_FLAG 0x100
41 #define WMI_HOST_RC_TS_FLAG 0x200
42 #define WMI_HOST_RC_UAPSD_FLAG 0x400
[all …]

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