Searched +full:0 +full:x00010000 (Results 1 – 25 of 1067) sorted by relevance
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/Linux-v5.10/arch/powerpc/boot/dts/fsl/ |
D | cyrus_p5020.dts | 30 size = <0 0x1000000>; 31 alignment = <0 0x1000000>; 34 size = <0 0x400000>; 35 alignment = <0 0x400000>; 38 size = <0 0x2000000>; 39 alignment = <0 0x2000000>; 44 ranges = <0x00000000 0xf 0x00000000 0x01008000>; 48 ranges = <0x0 0xf 0xf4000000 0x200000>; 52 ranges = <0x0 0xf 0xf4200000 0x200000>; 56 ranges = <0x00000000 0xf 0xfe000000 0x1000000>; [all …]
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D | t208xrdb.dtsi | 48 size = <0 0x1000000>; 49 alignment = <0 0x1000000>; 52 size = <0 0x400000>; 53 alignment = <0 0x400000>; 56 size = <0 0x2000000>; 57 alignment = <0 0x2000000>; 62 reg = <0xf 0xfe124000 0 0x2000>; 63 ranges = <0 0 0xf 0xe8000000 0x08000000 64 2 0 0xf 0xff800000 0x00010000 65 3 0 0xf 0xffdf0000 0x00008000>; [all …]
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D | kmcent2.dts | 27 size = <0 0x1000000>; 28 alignment = <0 0x1000000>; 31 size = <0 0x400000>; 32 alignment = <0 0x400000>; 35 size = <0 0x2000000>; 36 alignment = <0 0x2000000>; 41 reg = <0xf 0xfe124000 0 0x2000>; 42 ranges = <0 0 0xf 0xe8000000 0x04000000 43 1 0 0xf 0xfa000000 0x00010000 44 2 0 0xf 0xfb000000 0x00010000 [all …]
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D | mpc8536ds_36b.dts | 17 #size-cells = <0>; 19 PowerPC,8536@0 { 21 reg = <0>; 28 reg = <0 0 0 0>; // Filled by U-Boot 32 reg = <0xf 0xffe05000 0 0x1000>; 34 ranges = <0x0 0x0 0xf 0xe8000000 0x08000000 35 0x2 0x0 0xf 0xffa00000 0x00040000 36 0x3 0x0 0xf 0xffdf0000 0x00008000>; 40 ranges = <0x0 0xf 0xffe00000 0x100000>; 44 reg = <0xf 0xffe08000 0 0x1000>; [all …]
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D | mpc8536ds.dts | 17 #size-cells = <0>; 19 PowerPC,8536@0 { 21 reg = <0>; 28 reg = <0 0 0 0>; // Filled by U-Boot 32 reg = <0 0xffe05000 0 0x1000>; 34 ranges = <0x0 0x0 0x0 0xe8000000 0x08000000 35 0x2 0x0 0x0 0xffa00000 0x00040000 36 0x3 0x0 0x0 0xffdf0000 0x00008000>; 40 ranges = <0x0 0 0xffe00000 0x100000>; 44 reg = <0 0xffe08000 0 0x1000>; [all …]
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D | t104xd4rdb.dtsi | 42 size = <0 0x1000000>; 43 alignment = <0 0x1000000>; 46 size = <0 0x400000>; 47 alignment = <0 0x400000>; 50 size = <0 0x2000000>; 51 alignment = <0 0x2000000>; 56 reg = <0xf 0xfe124000 0 0x2000>; 57 ranges = <0 0 0xf 0xe8000000 0x08000000 58 2 0 0xf 0xff800000 0x00010000 59 3 0 0xf 0xffdf0000 0x00008000>; [all …]
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D | t208xqds.dtsi | 48 size = <0 0x1000000>; 49 alignment = <0 0x1000000>; 52 size = <0 0x400000>; 53 alignment = <0 0x400000>; 56 size = <0 0x2000000>; 57 alignment = <0 0x2000000>; 62 reg = <0xf 0xfe124000 0 0x2000>; 63 ranges = <0 0 0xf 0xe8000000 0x08000000 64 2 0 0xf 0xff800000 0x00010000 65 3 0 0xf 0xffdf0000 0x00008000>; [all …]
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D | t104xrdb.dtsi | 48 size = <0 0x1000000>; 49 alignment = <0 0x1000000>; 52 size = <0 0x400000>; 53 alignment = <0 0x400000>; 56 size = <0 0x2000000>; 57 alignment = <0 0x2000000>; 62 reg = <0xf 0xfe124000 0 0x2000>; 63 ranges = <0 0 0xf 0xe8000000 0x08000000 64 2 0 0xf 0xff800000 0x00010000 65 3 0 0xf 0xffdf0000 0x00008000>; [all …]
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D | t1023rdb.dts | 50 size = <0 0x1000000>; 51 alignment = <0 0x1000000>; 55 size = <0 0x400000>; 56 alignment = <0 0x400000>; 60 size = <0 0x2000000>; 61 alignment = <0 0x2000000>; 66 reg = <0xf 0xfe124000 0 0x2000>; 67 ranges = <0 0 0xf 0xe8000000 0x08000000 68 1 0 0xf 0xff800000 0x00010000>; 70 nor@0,0 { [all …]
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D | t4240rdb.dts | 56 reg = <0xf 0xfe124000 0 0x2000>; 57 ranges = <0 0 0xf 0xe8000000 0x08000000 58 2 0 0xf 0xff800000 0x00010000 59 3 0 0xf 0xffdf0000 0x00008000>; 61 nor@0,0 { 65 reg = <0x0 0x0 0x8000000>; 71 nand@2,0 { 75 reg = <0x2 0x0 0x10000>; 89 size = <0 0x1000000>; 90 alignment = <0 0x1000000>; [all …]
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D | t1024qds.dts | 50 size = <0 0x1000000>; 51 alignment = <0 0x1000000>; 55 size = <0 0x400000>; 56 alignment = <0 0x400000>; 60 size = <0 0x2000000>; 61 alignment = <0 0x2000000>; 66 reg = <0xf 0xfe124000 0 0x2000>; 67 ranges = <0 0 0xf 0xe8000000 0x08000000 68 2 0 0xf 0xff800000 0x00010000 69 3 0 0xf 0xffdf0000 0x00008000>; [all …]
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D | t1024rdb.dts | 54 size = <0 0x1000000>; 55 alignment = <0 0x1000000>; 59 size = <0 0x400000>; 60 alignment = <0 0x400000>; 64 size = <0 0x2000000>; 65 alignment = <0 0x2000000>; 70 reg = <0xf 0xfe124000 0 0x2000>; 71 ranges = <0 0 0xf 0xe8000000 0x08000000 72 2 0 0xf 0xff800000 0x00010000 73 3 0 0xf 0xffdf0000 0x00008000>; [all …]
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D | t104xqds.dtsi | 74 size = <0 0x1000000>; 75 alignment = <0 0x1000000>; 78 size = <0 0x400000>; 79 alignment = <0 0x400000>; 82 size = <0 0x2000000>; 83 alignment = <0 0x2000000>; 88 reg = <0xf 0xfe124000 0 0x2000>; 89 ranges = <0 0 0xf 0xe8000000 0x08000000 90 2 0 0xf 0xff800000 0x00010000 91 3 0 0xf 0xffdf0000 0x00008000>; [all …]
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D | p5020ds.dts | 68 size = <0 0x1000000>; 69 alignment = <0 0x1000000>; 72 size = <0 0x400000>; 73 alignment = <0 0x400000>; 76 size = <0 0x2000000>; 77 alignment = <0 0x2000000>; 82 ranges = <0x00000000 0xf 0x00000000 0x01008000>; 86 ranges = <0x0 0xf 0xf4000000 0x200000>; 90 ranges = <0x0 0xf 0xf4200000 0x200000>; 94 ranges = <0x00000000 0xf 0xfe000000 0x1000000>; [all …]
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D | p3041ds.dts | 68 size = <0 0x1000000>; 69 alignment = <0 0x1000000>; 72 size = <0 0x400000>; 73 alignment = <0 0x400000>; 76 size = <0 0x2000000>; 77 alignment = <0 0x2000000>; 82 ranges = <0x00000000 0xf 0x00000000 0x01008000>; 86 ranges = <0x0 0xf 0xf4000000 0x200000>; 90 ranges = <0x0 0xf 0xf4200000 0x200000>; 94 ranges = <0x00000000 0xf 0xfe000000 0x1000000>; [all …]
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D | kmcoge4.dts | 30 size = <0 0x1000000>; 31 alignment = <0 0x1000000>; 34 size = <0 0x400000>; 35 alignment = <0 0x400000>; 38 size = <0 0x2000000>; 39 alignment = <0 0x2000000>; 44 ranges = <0x00000000 0xf 0x00000000 0x01008000>; 48 ranges = <0x0 0xf 0xf4000000 0x200000>; 52 ranges = <0x0 0xf 0xf4200000 0x200000>; 56 ranges = <0x00000000 0xf 0xfe000000 0x1000000>; [all …]
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/Linux-v5.10/arch/arm64/boot/dts/freescale/ |
D | fsl-ls2080a.dtsi | 15 cpu0: cpu@0 { 18 reg = <0x0>; 19 clocks = <&clockgen 1 0>; 28 reg = <0x1>; 29 clocks = <&clockgen 1 0>; 38 reg = <0x100>; 48 reg = <0x101>; 58 reg = <0x200>; 68 reg = <0x201>; 78 reg = <0x300>; [all …]
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D | fsl-ls2088a.dtsi | 15 cpu0: cpu@0 { 18 reg = <0x0>; 19 clocks = <&clockgen 1 0>; 28 reg = <0x1>; 29 clocks = <&clockgen 1 0>; 38 reg = <0x100>; 48 reg = <0x101>; 58 reg = <0x200>; 68 reg = <0x201>; 78 reg = <0x300>; [all …]
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/Linux-v5.10/arch/m68k/include/asm/ |
D | mcf8390.h | 39 #define NE2000_ADDR 0x40000300 40 #define NE2000_ODDOFFSET 0x00010000 41 #define NE2000_ADDRSIZE 0x00020000 42 #define NE2000_IRQ_VECTOR 0xf0 49 #define NE2000_ADDR 0x40000300 50 #define NE2000_ODDOFFSET 0x00010000 51 #define NE2000_ADDRSIZE 0x00020000 52 #define NE2000_IRQ_VECTOR 0x1c 59 #define NE2000_ADDR 0x30000300 60 #define NE2000_ADDRSIZE 0x00001000 [all …]
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/Linux-v5.10/drivers/gpu/drm/etnaviv/ |
D | common.xml.h | 7 http://0x04.net/cgit/index.cgi/rules-ng-ng 8 git clone git://0x04.net/rules-ng-ng 43 #define PIPE_ID_PIPE_3D 0x00000000 44 #define PIPE_ID_PIPE_2D 0x00000001 45 #define SYNC_RECIPIENT_FE 0x00000001 46 #define SYNC_RECIPIENT_RA 0x00000005 47 #define SYNC_RECIPIENT_PE 0x00000007 48 #define SYNC_RECIPIENT_DE 0x0000000b 49 #define SYNC_RECIPIENT_BLT 0x00000010 50 #define ENDIAN_MODE_NO_SWAP 0x00000000 [all …]
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/Linux-v5.10/drivers/gpu/drm/amd/amdgpu/ |
D | cik.c | 129 WREG32(mmUVD_CTX_INDEX, ((reg) & 0x1ff)); in cik_uvd_ctx_rreg() 140 WREG32(mmUVD_CTX_INDEX, ((reg) & 0x1ff)); in cik_uvd_ctx_wreg() 169 0xc200, 0xe0ffffff, 0xe0000000 174 0x31dc, 0xffffffff, 0x00000800, 175 0x31dd, 0xffffffff, 0x00000800, 176 0x31e6, 0xffffffff, 0x00007fbf, 177 0x31e7, 0xffffffff, 0x00007faf 182 0xcd5, 0x00000333, 0x00000333, 183 0xcd4, 0x000c0fc0, 0x00040200, 184 0x2684, 0x00010000, 0x00058208, [all …]
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/Linux-v5.10/arch/arm/boot/dts/ |
D | omap4460.dtsi | 15 cpu0: cpu@0 { 42 reg = <0x4a002260 0x4 43 0x4a00232C 0x4 44 0x4a002378 0x18>; 46 interrupts = <0 126 IRQ_TYPE_LEVEL_HIGH>; /* talert */ 49 #thermal-sensor-cells = <0>; 55 reg = <0x4a307bd0 0x8>, <0x4a306014 0x4>, 56 <0x4A002268 0x4>; 62 1025000 0 0 0 0 0 63 1200000 0 0 0 0 0 [all …]
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/Linux-v5.10/sound/pci/ |
D | sis7019.h | 17 #define SIS_GCR 0x00 18 #define SIS_GCR_MACRO_POWER_DOWN 0x80000000 19 #define SIS_GCR_MODEM_ENABLE 0x00010000 20 #define SIS_GCR_SOFTWARE_RESET 0x00000001 23 #define SIS_GIER 0x04 24 #define SIS_GIER_MODEM_TIMER_IRQ_ENABLE 0x00100000 25 #define SIS_GIER_MODEM_RX_DMA_IRQ_ENABLE 0x00080000 26 #define SIS_GIER_MODEM_TX_DMA_IRQ_ENABLE 0x00040000 27 #define SIS_GIER_AC97_GPIO1_IRQ_ENABLE 0x00020000 28 #define SIS_GIER_AC97_GPIO0_IRQ_ENABLE 0x00010000 [all …]
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/Linux-v5.10/drivers/net/ethernet/renesas/ |
D | ravb.h | 38 #define RAVB_TXTSTAMP_VALID 0x00000001 /* TX timestamp valid */ 39 #define RAVB_TXTSTAMP_ENABLED 0x00000010 /* Enable TX timestamping */ 41 #define RAVB_RXTSTAMP_VALID 0x00000001 /* RX timestamp valid */ 42 #define RAVB_RXTSTAMP_TYPE 0x00000006 /* RX type mask */ 43 #define RAVB_RXTSTAMP_TYPE_V2_L2_EVENT 0x00000002 44 #define RAVB_RXTSTAMP_TYPE_ALL 0x00000006 45 #define RAVB_RXTSTAMP_ENABLED 0x00000010 /* Enable RX timestamping */ 49 CCC = 0x0000, 50 DBAT = 0x0004, 51 DLR = 0x0008, [all …]
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/Linux-v5.10/include/linux/mmc/ |
D | sh_mmcif.h | 33 u8 sup_pclk; /* 1 :SH7757, 0: SH7724/SH7372 */ 38 #define MMCIF_CE_CMD_SET 0x00000000 39 #define MMCIF_CE_ARG 0x00000008 40 #define MMCIF_CE_ARG_CMD12 0x0000000C 41 #define MMCIF_CE_CMD_CTRL 0x00000010 42 #define MMCIF_CE_BLOCK_SET 0x00000014 43 #define MMCIF_CE_CLK_CTRL 0x00000018 44 #define MMCIF_CE_BUF_ACC 0x0000001C 45 #define MMCIF_CE_RESP3 0x00000020 46 #define MMCIF_CE_RESP2 0x00000024 [all …]
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