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/Linux-v5.15/arch/arm/mach-davinci/
Dda850.c2 * TI DA850/OMAP-L138 chip specific setup
4 * Copyright (C) 2009 Texas Instruments Incorporated - https://www.ti.com/
6 * Derived from: arch/arm/mach-davinci/da830.c
15 #include <linux/clk-provider.h>
22 #include <linux/irqchip/irq-davinci-cp-intc.h>
23 #include <linux/mfd/da8xx-cfgchip.h>
24 #include <linux/platform_data/clk-da8xx-cfgchip.h>
25 #include <linux/platform_data/clk-davinci-pll.h>
26 #include <linux/platform_data/davinci-cpufreq.h>
27 #include <linux/platform_data/gpio-davinci.h>
[all …]
/Linux-v5.15/include/linux/mfd/wm831x/
Dotp.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * include/linux/mfd/wm831x/otp.h -- OTP interface for WM831x
17 * R30720 (0x7800) - Unique ID 1
19 #define WM831X_UNIQUE_ID_MASK 0xFFFF /* UNIQUE_ID - [15:0] */
20 #define WM831X_UNIQUE_ID_SHIFT 0 /* UNIQUE_ID - [15:0] */
21 #define WM831X_UNIQUE_ID_WIDTH 16 /* UNIQUE_ID - [15:0] */
24 * R30721 (0x7801) - Unique ID 2
26 #define WM831X_UNIQUE_ID_MASK 0xFFFF /* UNIQUE_ID - [15:0] */
27 #define WM831X_UNIQUE_ID_SHIFT 0 /* UNIQUE_ID - [15:0] */
28 #define WM831X_UNIQUE_ID_WIDTH 16 /* UNIQUE_ID - [15:0] */
[all …]
Dregulator.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * linux/mfd/wm831x/regulator.h -- Regulator definitons for wm831x
14 * R16462 (0x404E) - Current Sink 1
16 #define WM831X_CS1_ENA 0x8000 /* CS1_ENA */
17 #define WM831X_CS1_ENA_MASK 0x8000 /* CS1_ENA */
18 #define WM831X_CS1_ENA_SHIFT 15 /* CS1_ENA */
20 #define WM831X_CS1_DRIVE 0x4000 /* CS1_DRIVE */
21 #define WM831X_CS1_DRIVE_MASK 0x4000 /* CS1_DRIVE */
24 #define WM831X_CS1_SLPENA 0x1000 /* CS1_SLPENA */
25 #define WM831X_CS1_SLPENA_MASK 0x1000 /* CS1_SLPENA */
[all …]
/Linux-v5.15/drivers/infiniband/hw/irdma/
Di40iw_hw.h1 /* SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB */
2 /* Copyright (c) 2015 - 2021 Intel Corporation */
5 #define I40E_VFPE_CQPTAIL1 0x0000A000 /* Reset: VFR */
6 #define I40E_VFPE_CQPDB1 0x0000BC00 /* Reset: VFR */
7 #define I40E_VFPE_CCQPSTATUS1 0x0000B800 /* Reset: VFR */
8 #define I40E_VFPE_CCQPHIGH1 0x00009800 /* Reset: VFR */
9 #define I40E_VFPE_CCQPLOW1 0x0000AC00 /* Reset: VFR */
10 #define I40E_VFPE_CQARM1 0x0000B400 /* Reset: VFR */
11 #define I40E_VFPE_CQACK1 0x0000B000 /* Reset: VFR */
12 #define I40E_VFPE_AEQALLOC1 0x0000A400 /* Reset: VFR */
[all …]
/Linux-v5.15/sound/soc/codecs/
Dwm5100.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * wm5100.h -- WM5100 ALSA SoC Audio driver
26 #define WM5100_CLKSRC_MCLK1 0
34 #define WM5100_CLKSRC_ASYNCCLK 0x100
39 #define WM5100_FLL_SRC_MCLK1 0x0
40 #define WM5100_FLL_SRC_MCLK2 0x1
41 #define WM5100_FLL_SRC_FLL1 0x4
42 #define WM5100_FLL_SRC_FLL2 0x5
43 #define WM5100_FLL_SRC_AIF1BCLK 0x8
44 #define WM5100_FLL_SRC_AIF2BCLK 0x9
[all …]
Dwm9081.h1 /* SPDX-License-Identifier: GPL-2.0-only */
6 * wm9081.c -- WM9081 ALSA SoC Audio driver
24 #define WM9081_SOFTWARE_RESET 0x00
25 #define WM9081_ANALOGUE_LINEOUT 0x02
26 #define WM9081_ANALOGUE_SPEAKER_PGA 0x03
27 #define WM9081_VMID_CONTROL 0x04
28 #define WM9081_BIAS_CONTROL_1 0x05
29 #define WM9081_ANALOGUE_MIXER 0x07
30 #define WM9081_ANTI_POP_CONTROL 0x08
31 #define WM9081_ANALOGUE_SPEAKER_1 0x09
[all …]
Drt5660.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * rt5660.h -- RT5660 ALSA SoC audio driver
16 #define RT5660_RESET 0x00
17 #define RT5660_VENDOR_ID 0xfd
18 #define RT5660_VENDOR_ID1 0xfe
19 #define RT5660_VENDOR_ID2 0xff
20 /* I/O - Output */
21 #define RT5660_SPK_VOL 0x01
22 #define RT5660_LOUT_VOL 0x02
23 /* I/O - Input */
[all …]
Drt5616.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * rt5616.h -- RT5616 ALSA SoC audio driver
13 #define RT5616_RESET 0x00
14 #define RT5616_VERSION_ID 0xfd
15 #define RT5616_VENDOR_ID 0xfe
16 #define RT5616_DEVICE_ID 0xff
17 /* I/O - Output */
18 #define RT5616_HP_VOL 0x02
19 #define RT5616_LOUT_CTRL1 0x03
20 #define RT5616_LOUT_CTRL2 0x05
[all …]
Drt5651.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * rt5651.h -- RT5651 ALSA SoC audio driver
12 #include <dt-bindings/sound/rt5651.h>
15 #define RT5651_RESET 0x00
16 #define RT5651_VERSION_ID 0xfd
17 #define RT5651_VENDOR_ID 0xfe
18 #define RT5651_DEVICE_ID 0xff
19 /* I/O - Output */
20 #define RT5651_HP_VOL 0x02
21 #define RT5651_LOUT_CTRL1 0x03
[all …]
Drt5640.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * rt5640.h -- RT5640 ALSA SoC audio driver
15 #include <dt-bindings/sound/rt5640.h>
18 #define RT5640_RESET 0x00
19 #define RT5640_VENDOR_ID 0xfd
20 #define RT5640_VENDOR_ID1 0xfe
21 #define RT5640_VENDOR_ID2 0xff
22 /* I/O - Output */
23 #define RT5640_SPK_VOL 0x01
24 #define RT5640_HP_VOL 0x02
[all …]
Drt5663.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * rt5663.h -- RT5663 ALSA SoC audio driver
15 #define RT5663_RESET 0x0000
16 #define RT5663_VENDOR_ID 0x00fd
17 #define RT5663_VENDOR_ID_1 0x00fe
18 #define RT5663_VENDOR_ID_2 0x00ff
20 #define RT5663_LOUT_CTRL 0x0001
21 #define RT5663_HP_AMP_2 0x0003
22 #define RT5663_MONO_OUT 0x0004
23 #define RT5663_MONO_GAIN 0x0007
[all …]
Drt5670.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * rt5670.h -- RT5670 ALSA SoC audio driver
13 #define RT5670_RESET 0x00
14 #define RT5670_VENDOR_ID 0xfd
15 #define RT5670_VENDOR_ID1 0xfe
16 #define RT5670_VENDOR_ID2 0xff
17 /* I/O - Output */
18 #define RT5670_HP_VOL 0x02
19 #define RT5670_LOUT1 0x03
20 /* I/O - Input */
[all …]
/Linux-v5.15/arch/csky/abiv2/inc/abi/
Dckmmu.h1 /* SPDX-License-Identifier: GPL-2.0 */
11 return mfcr("cr<0, 15>"); in read_mmu_index()
16 mtcr("cr<0, 15>", value); in write_mmu_index()
21 return mfcr("cr<2, 15>"); in read_mmu_entrylo0()
26 return mfcr("cr<3, 15>"); in read_mmu_entrylo1()
31 mtcr("cr<6, 15>", value); in write_mmu_pagemask()
36 return mfcr("cr<4, 15>"); in read_mmu_entryhi()
41 mtcr("cr<4, 15>", value); in write_mmu_entryhi()
46 return mfcr("cr<30, 15>"); in read_mmu_msa0()
51 mtcr("cr<30, 15>", value); in write_mmu_msa0()
[all …]
/Linux-v5.15/arch/s390/include/asm/
Dvx-insn.h1 /* SPDX-License-Identifier: GPL-2.0 */
20 /* GR_NUM - Retrieve general-purpose register number
28 \opd = 0
73 \opd = 15
80 /* VX_NUM - Retrieve vector register number
92 \opd = 0
137 \opd = 15
192 /* RXB - Compute most significant bit used vector registers
200 .macro RXB rxb v1 v2=0 v3=0 v4=0
201 \rxb = 0
[all …]
/Linux-v5.15/drivers/video/fbdev/nvidia/
Dnv_dma.h8 |* hereby granted a nonexclusive, royalty-free copyright license to *|
11 |* Any use of this source code must include, in the user documenta- *|
19 |* WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. NVIDIA, CORPOR- *|
21 |* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGE- *|
23 |* NVIDIA, CORPORATION BE LIABLE FOR ANY SPECIAL, INDIRECT, INCI- *|
24 |* DENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RE- *|
33 |* 48 C.F.R. 12.212 (SEPT 1995) and is provided to the U.S. Govern- *|
35 |* 12.212 and 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), *|
42 * GPL Licensing Note - According to Mark Vojkovich, author of the Xorg/
43 * XFree86 'nv' driver, this source code is provided under MIT-style licensing
[all …]
/Linux-v5.15/arch/csky/kernel/probes/
Dsimulate-insn.c1 // SPDX-License-Identifier: GPL-2.0+
7 #include "decode-insn.h"
8 #include "simulate-insn.h"
15 *ptr = *(&regs->a0 + index); in csky_insn_reg_get_val()
17 if (index > 15 && index < 31) in csky_insn_reg_get_val()
18 *ptr = *(&regs->exregs[0] + index - 16); in csky_insn_reg_get_val()
22 *ptr = regs->usp; in csky_insn_reg_get_val()
24 case 15: in csky_insn_reg_get_val()
25 *ptr = regs->lr; in csky_insn_reg_get_val()
28 *ptr = regs->tls; in csky_insn_reg_get_val()
[all …]
/Linux-v5.15/Documentation/ABI/testing/
Dsysfs-class-rapidio3 On-chip RapidIO controllers and PCIe-to-RapidIO bridges
15 KernelVersion: v3.15
21 0 = small (8-bit destination ID, max. 256 devices),
23 1 = large (16-bit destination ID, max. 65536 devices).
27 KernelVersion: v3.15
33 RapidIO mport device. If value 0xFFFFFFFF is returned this means
46 [rio@rapidio ~]$ ls /sys/class/rapidio_port/rapidio0/ -l
47 total 0
48 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:e:0001
49 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:e:0004
[all …]
/Linux-v5.15/drivers/scsi/
Dmesh.h1 /* SPDX-License-Identifier: GPL-2.0 */
17 char pad0[15];
19 char pad1[15];
21 char pad2[15];
23 char pad3[15];
25 char pad4[15];
27 char pad5[15];
29 char pad6[15];
31 char pad7[15];
33 char pad8[15];
[all …]
Dmac53c94.h1 /* SPDX-License-Identifier: GPL-2.0 */
17 char pad0[15];
19 char pad1[15];
21 char pad2[15];
23 char pad3[15];
25 char pad4[15];
27 char pad5[15];
29 char pad6[15];
31 char pad7[15];
33 char pad8[15];
[all …]
/Linux-v5.15/arch/arm64/include/asm/
Darm_dsu_pmu.h1 /* SPDX-License-Identifier: GPL-2.0-only */
18 #define CLUSTERPMCR_EL1 sys_reg(3, 0, 15, 5, 0)
19 #define CLUSTERPMCNTENSET_EL1 sys_reg(3, 0, 15, 5, 1)
20 #define CLUSTERPMCNTENCLR_EL1 sys_reg(3, 0, 15, 5, 2)
21 #define CLUSTERPMOVSSET_EL1 sys_reg(3, 0, 15, 5, 3)
22 #define CLUSTERPMOVSCLR_EL1 sys_reg(3, 0, 15, 5, 4)
23 #define CLUSTERPMSELR_EL1 sys_reg(3, 0, 15, 5, 5)
24 #define CLUSTERPMINTENSET_EL1 sys_reg(3, 0, 15, 5, 6)
25 #define CLUSTERPMINTENCLR_EL1 sys_reg(3, 0, 15, 5, 7)
26 #define CLUSTERPMCCNTR_EL1 sys_reg(3, 0, 15, 6, 0)
[all …]
/Linux-v5.15/drivers/gpu/drm/i915/display/
Dintel_vdsc.c1 // SPDX-License-Identifier: MIT
17 ROW_INDEX_6BPP = 0,
26 COLUMN_INDEX_8BPC = 0,
58 { 768, 15, 6144, 3, 13, 11, 11, {
59 { 0, 4, 0 }, { 1, 6, -2 }, { 3, 8, -2 }, { 4, 8, -4 },
60 { 5, 9, -6 }, { 5, 9, -6 }, { 6, 9, -6 }, { 6, 10, -8 },
61 { 7, 11, -8 }, { 8, 12, -10 }, { 9, 12, -10 }, { 10, 12, -12 },
62 { 10, 12, -12 }, { 11, 12, -12 }, { 13, 14, -12 }
66 { 768, 15, 6144, 7, 17, 15, 15, {
67 { 0, 8, 0 }, { 3, 10, -2 }, { 7, 12, -2 }, { 8, 12, -4 },
[all …]
/Linux-v5.15/tools/accounting/
Dgetdelays.c1 // SPDX-License-Identifier: GPL-2.0
4 * Utility to get per-pid and per-tgid delay accounting statistics
12 * gcc -I/usr/src/linux/include getdelays.c -o getdelays
38 #define GENLMSG_PAYLOAD(glh) (NLMSG_PAYLOAD(glh, 0) - GENL_HDRLEN)
40 #define NLA_PAYLOAD(len) (len - NLA_HDRLEN)
46 } while (0)
77 fprintf(stderr, "getdelays [-dilv] [-w logfile] [-r bufsize] " in usage()
78 "[-m cpumask] [-t tgid] [-p pid]\n"); in usage()
79 fprintf(stderr, " -d: print delayacct stats\n"); in usage()
80 fprintf(stderr, " -i: print IO accounting (works only with -p)\n"); in usage()
[all …]
/Linux-v5.15/arch/arm64/crypto/
Dsha512-ce-core.S1 /* SPDX-License-Identifier: GPL-2.0 */
3 * sha512-ce-core.S - core SHA-384/SHA-512 transform using v8 Crypto Extensions
15 .irp b,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19
21 .inst 0xce608000 | .L\rd | (.L\rn << 5) | (.L\rm << 16)
25 .inst 0xce608400 | .L\rd | (.L\rn << 5) | (.L\rm << 16)
29 .inst 0xcec08000 | .L\rd | (.L\rn << 5)
33 .inst 0xce608800 | .L\rd | (.L\rn << 5) | (.L\rm << 16)
37 * The SHA-512 round constants
42 .quad 0x428a2f98d728ae22, 0x7137449123ef65cd
43 .quad 0xb5c0fbcfec4d3b2f, 0xe9b5dba58189dbbc
[all …]
/Linux-v5.15/drivers/net/wireless/broadcom/b43/
Dtables_lpphy.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 IEEE 802.11a/g LP-PHY and radio device data tables
26 #define B206X_FLAG_A 0x01 /* Flag: Init in A mode */
27 #define B206X_FLAG_G 0x02 /* Flag: Init in G mode */
30 /* { .offset = B2062_N_COMM1, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
31 /* { .offset = 0x0001, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
32 /* { .offset = B2062_N_COMM2, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
33 /* { .offset = B2062_N_COMM3, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
34 …{ .offset = B2062_N_COMM4, .value_a = 0x0001, .value_g = 0x0000, .flags = B206X_FLAG_A | B206X_FLA…
35 /* { .offset = B2062_N_COMM5, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
[all …]
/Linux-v5.15/drivers/mtd/nand/raw/
Ddenali.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Copyright (c) 2009 - 2010, Intel Corporation and its suppliers.
17 #define DEVICE_RESET 0x0
20 #define TRANSFER_SPARE_REG 0x10
21 #define TRANSFER_SPARE_REG__FLAG BIT(0)
23 #define LOAD_WAIT_CNT 0x20
24 #define LOAD_WAIT_CNT__VALUE GENMASK(15, 0)
26 #define PROGRAM_WAIT_CNT 0x30
27 #define PROGRAM_WAIT_CNT__VALUE GENMASK(15, 0)
29 #define ERASE_WAIT_CNT 0x40
[all …]

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