1 // SPDX-License-Identifier: GPL-2.0-or-later
57 	{ .compatible = "aspeed,ast2400-wdt", .data = &ast2400_config },
58 	{ .compatible = "aspeed,ast2500-wdt", .data = &ast2500_config },
59 	{ .compatible = "aspeed,ast2600-wdt", .data = &ast2600_config },
88  * * Drive mode: push-pull vs open-drain
99  * The AST2500 exposes the drive mode and polarity options, but not in a
101  * and bit 30 represents push-pull or open-drain. With respect to write, magic
102  * values need to be written to the top byte to change the state of the drive
104  * effect on the state of the drive mode or polarity bits. However, the pulse
129 	wdt->ctrl |= WDT_CTRL_ENABLE;  in aspeed_wdt_enable()
131 	writel(0, wdt->base + WDT_CTRL);  in aspeed_wdt_enable()
132 	writel(count, wdt->base + WDT_RELOAD_VALUE);  in aspeed_wdt_enable()
133 	writel(WDT_RESTART_MAGIC, wdt->base + WDT_RESTART);  in aspeed_wdt_enable()
134 	writel(wdt->ctrl, wdt->base + WDT_CTRL);  in aspeed_wdt_enable()
141 	aspeed_wdt_enable(wdt, wdd->timeout * WDT_RATE_1MHZ);  in aspeed_wdt_start()
150 	wdt->ctrl &= ~WDT_CTRL_ENABLE;  in aspeed_wdt_stop()
151 	writel(wdt->ctrl, wdt->base + WDT_CTRL);  in aspeed_wdt_stop()
160 	writel(WDT_RESTART_MAGIC, wdt->base + WDT_RESTART);  in aspeed_wdt_ping()
171 	wdd->timeout = timeout;  in aspeed_wdt_set_timeout()
173 	actual = min(timeout, wdd->max_hw_heartbeat_ms / 1000);  in aspeed_wdt_set_timeout()
175 	writel(actual * WDT_RATE_1MHZ, wdt->base + WDT_RELOAD_VALUE);  in aspeed_wdt_set_timeout()
176 	writel(WDT_RESTART_MAGIC, wdt->base + WDT_RESTART);  in aspeed_wdt_set_timeout()
186 	u32 s = wdt->cfg->irq_shift;  in aspeed_wdt_set_pretimeout()
187 	u32 m = wdt->cfg->irq_mask;  in aspeed_wdt_set_pretimeout()
189 	wdd->pretimeout = pretimeout;  in aspeed_wdt_set_pretimeout()
190 	wdt->ctrl &= ~m;  in aspeed_wdt_set_pretimeout()
192 		wdt->ctrl |= ((actual << s) & m) | WDT_CTRL_WDT_INTR;  in aspeed_wdt_set_pretimeout()
194 		wdt->ctrl &= ~WDT_CTRL_WDT_INTR;  in aspeed_wdt_set_pretimeout()
196 	writel(wdt->ctrl, wdt->base + WDT_CTRL);  in aspeed_wdt_set_pretimeout()
206 	wdt->ctrl &= ~WDT_CTRL_BOOT_SECONDARY;  in aspeed_wdt_restart()
219 	u32 status = readl(wdt->base + WDT_TIMEOUT_STATUS);  in access_cs0_show()
233 		return -EINVAL;  in access_cs0_store()
237 		       wdt->base + WDT_CLEAR_TIMEOUT_STATUS);  in access_cs0_store()
244  * flash with 'alt-boot' option.
250  *            (CS0->CS1, CS1->CS0) to (CS0->CS0, CS1->CS1).
297 	u32 status = readl(wdt->base + WDT_TIMEOUT_STATUS);  in aspeed_wdt_irq()
307 	struct device *dev = &pdev->dev;  in aspeed_wdt_probe()
318 		return -ENOMEM;  in aspeed_wdt_probe()
320 	np = dev->of_node;  in aspeed_wdt_probe()
324 		return -EINVAL;  in aspeed_wdt_probe()
325 	wdt->cfg = ofdid->data;  in aspeed_wdt_probe()
327 	wdt->base = devm_platform_ioremap_resource(pdev, 0);  in aspeed_wdt_probe()
328 	if (IS_ERR(wdt->base))  in aspeed_wdt_probe()
329 		return PTR_ERR(wdt->base);  in aspeed_wdt_probe()
331 	wdt->wdd.info = &aspeed_wdt_info;  in aspeed_wdt_probe()
333 	if (wdt->cfg->irq_mask) {  in aspeed_wdt_probe()
343 			wdt->wdd.info = &aspeed_wdt_pretimeout_info;  in aspeed_wdt_probe()
347 	wdt->wdd.ops = &aspeed_wdt_ops;  in aspeed_wdt_probe()
348 	wdt->wdd.max_hw_heartbeat_ms = WDT_MAX_TIMEOUT_MS;  in aspeed_wdt_probe()
349 	wdt->wdd.parent = dev;  in aspeed_wdt_probe()
351 	wdt->wdd.timeout = WDT_DEFAULT_TIMEOUT;  in aspeed_wdt_probe()
352 	watchdog_init_timeout(&wdt->wdd, 0, dev);  in aspeed_wdt_probe()
354 	watchdog_set_nowayout(&wdt->wdd, nowayout);  in aspeed_wdt_probe()
358 	 *  - ast2400 wdt can run at PCLK, or 1MHz  in aspeed_wdt_probe()
359 	 *  - ast2500 only runs at 1MHz, hard coding bit 4 to 1  in aspeed_wdt_probe()
360 	 *  - ast2600 always runs at 1MHz  in aspeed_wdt_probe()
364 	if (of_device_is_compatible(np, "aspeed,ast2400-wdt"))  in aspeed_wdt_probe()
365 		wdt->ctrl = WDT_CTRL_1MHZ_CLK;  in aspeed_wdt_probe()
368 	 * Control reset on a per-device basis to ensure the  in aspeed_wdt_probe()
371 	ret = of_property_read_string(np, "aspeed,reset-type", &reset_type);  in aspeed_wdt_probe()
373 		wdt->ctrl |= WDT_CTRL_RESET_MODE_SOC | WDT_CTRL_RESET_SYSTEM;  in aspeed_wdt_probe()
376 			wdt->ctrl |= WDT_CTRL_RESET_MODE_ARM_CPU |  in aspeed_wdt_probe()
379 			wdt->ctrl |= WDT_CTRL_RESET_MODE_SOC |  in aspeed_wdt_probe()
382 			wdt->ctrl |= WDT_CTRL_RESET_MODE_FULL_CHIP |  in aspeed_wdt_probe()
385 			return -EINVAL;  in aspeed_wdt_probe()
387 	if (of_property_read_bool(np, "aspeed,external-signal"))  in aspeed_wdt_probe()
388 		wdt->ctrl |= WDT_CTRL_WDT_EXT;  in aspeed_wdt_probe()
389 	if (of_property_read_bool(np, "aspeed,alt-boot"))  in aspeed_wdt_probe()
390 		wdt->ctrl |= WDT_CTRL_BOOT_SECONDARY;  in aspeed_wdt_probe()
392 	if (readl(wdt->base + WDT_CTRL) & WDT_CTRL_ENABLE)  {  in aspeed_wdt_probe()
395 		 * write wdt->ctrl to WDT_CTRL to ensure the watchdog's  in aspeed_wdt_probe()
397 		 * Primarily, ensure we're using the 1MHz clock source.  in aspeed_wdt_probe()
399 		aspeed_wdt_start(&wdt->wdd);  in aspeed_wdt_probe()
400 		set_bit(WDOG_HW_RUNNING, &wdt->wdd.status);  in aspeed_wdt_probe()
403 	if ((of_device_is_compatible(np, "aspeed,ast2500-wdt")) ||  in aspeed_wdt_probe()
404 		(of_device_is_compatible(np, "aspeed,ast2600-wdt"))) {  in aspeed_wdt_probe()
405 		u32 reg = readl(wdt->base + WDT_RESET_WIDTH);  in aspeed_wdt_probe()
407 		reg &= wdt->cfg->ext_pulse_width_mask;  in aspeed_wdt_probe()
408 		if (of_property_read_bool(np, "aspeed,ext-active-high"))  in aspeed_wdt_probe()
413 		writel(reg, wdt->base + WDT_RESET_WIDTH);  in aspeed_wdt_probe()
415 		reg &= wdt->cfg->ext_pulse_width_mask;  in aspeed_wdt_probe()
416 		if (of_property_read_bool(np, "aspeed,ext-push-pull"))  in aspeed_wdt_probe()
421 		writel(reg, wdt->base + WDT_RESET_WIDTH);  in aspeed_wdt_probe()
424 	if (!of_property_read_u32(np, "aspeed,ext-pulse-duration", &duration)) {  in aspeed_wdt_probe()
425 		u32 max_duration = wdt->cfg->ext_pulse_width_mask + 1;  in aspeed_wdt_probe()
436 		 * The watchdog is always configured with a 1MHz source, so  in aspeed_wdt_probe()
438 		 * need to offset it - from the datasheet:  in aspeed_wdt_probe()
447 		writel(duration - 1, wdt->base + WDT_RESET_WIDTH);  in aspeed_wdt_probe()
450 	status = readl(wdt->base + WDT_TIMEOUT_STATUS);  in aspeed_wdt_probe()
452 		wdt->wdd.bootstatus = WDIOF_CARDRESET;  in aspeed_wdt_probe()
454 		if (of_device_is_compatible(np, "aspeed,ast2400-wdt") ||  in aspeed_wdt_probe()
455 		    of_device_is_compatible(np, "aspeed,ast2500-wdt"))  in aspeed_wdt_probe()
456 			wdt->wdd.groups = bswitch_groups;  in aspeed_wdt_probe()
461 	return devm_watchdog_register_device(dev, &wdt->wdd);  in aspeed_wdt_probe()