212 	u32 reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_set_sd_power()
235 				tmp_resp = readb(priv->sdmmc_base + SDMMC_RSP);  in wmt_mci_read_response()
237 				tmp_resp = readb(priv->sdmmc_base + SDMMC_RSP +  in wmt_mci_read_response()
249 	reg_tmp = readb(priv->sdmmc_base + SDMMC_CTLR);  in wmt_mci_start_command()
267 	reg_tmp = readb(priv->sdmmc_base + SDMMC_CTLR);  in wmt_mci_send_command()
280 	reg_tmp = readb(priv->sdmmc_base + SDMMC_CTLR);  in wmt_mci_send_command()
380 	status0 = readb(priv->sdmmc_base + SDMMC_STS0);  in wmt_mci_regular_isr()
381 	status1 = readb(priv->sdmmc_base + SDMMC_STS1);  in wmt_mci_regular_isr()
382 	status2 = readb(priv->sdmmc_base + SDMMC_STS2);  in wmt_mci_regular_isr()
385 	reg_tmp = readb(priv->sdmmc_base + SDMMC_INTMASK0);  in wmt_mci_regular_isr()
469 	reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_reset_hardware()
473 	reg_tmp = readb(priv->sdmmc_base + SDMMC_CTLR);  in wmt_reset_hardware()
493 	reg_tmp = readb(priv->sdmmc_base + SDMMC_STS2);  in wmt_reset_hardware()
687 	busmode = readb(priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_mci_set_ios()
688 	extctrl = readb(priv->sdmmc_base + SDMMC_EXTCTRL);  in wmt_mci_set_ios()
713 	return !(readb(priv->sdmmc_base + SDMMC_STS0) & STS0_WRITE_PROTECT);  in wmt_mci_get_ro()
719 	u32 cd = (readb(priv->sdmmc_base + SDMMC_STS0) & STS0_CD_GPI) >> 3;  in wmt_mci_get_cd()
893 	reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_mci_remove()
933 	reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_mci_suspend()
957 		reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_mci_resume()
965 		reg_tmp = readb(priv->sdmmc_base + SDMMC_INTMASK0);  in wmt_mci_resume()