Lines Matching full:description

13 description:
27       - description: MSS QDSP6 registers
28       - description: RMB registers
37       - description: MSA Stream 1
38       - description: MSA Stream 2
42       - description: Watchdog interrupt
43       - description: Fatal interrupt
44       - description: Ready interrupt
45       - description: Handover interrupt
46       - description: Stop acknowledge interrupt
47       - description: Shutdown acknowledge interrupt
68       - description: CX power domain
69       - description: MX power domain
70       - description: MSS power domain (only valid for qcom,sdm845-mss-pil)
81     description: PLL supply
85       - description: AOSS restart
86       - description: PDC reset (only valid for qcom,sdm845-mss-pil)
97     description: Reference to the AOSS side-channel message RAM.
101     description: States used by the AP to signal the Hexagon core
103       - description: Stop modem
106     description: Names of the states used by the AP to signal the Hexagon core
112     description:
117           - description: phandle to TCSR syscon region
118           - description: offset to the Q6 halt register
119           - description: offset to the modem halt register
120           - description: offset to the nc halt register
124       - description: MBA reserved region
125       - description: Modem reserved region
126       - description: Metadata reserved region
131       - description: Name of MBA firmware
132       - description: Name of modem firmware
136     description:
143     description:
151     description:
165     description:
179     description:
216             - description: GCC MSS IFACE clock
217             - description: GCC MSS BUS clock
218             - description: GCC MSS MEM clock
219             - description: RPM XO clock
220             - description: GCC MSS GPLL0 clock
221             - description: GCC MSS SNOC_AXI clock
222             - description: GCC MSS MNOC_AXI clock
223             - description: RPM PNOC clock
224             - description: RPM QDSS clock
255             - description: GCC MSS IFACE clock
256             - description: GCC MSS BUS clock
257             - description: GCC MSS MEM clock
258             - description: GCC MSS GPLL0 clock
259             - description: GCC MSS SNOC_AXI clock
260             - description: GCC MSS MNOC_AXI clock
261             - description: RPMH QDSS clock
262             - description: RPMH XO clock
292             - description: GCC MSS IFACE clock
293             - description: GCC MSS BUS clock
294             - description: GCC MSS MEM clock
295             - description: GCC MSS GPLL0 clock
296             - description: GCC MSS SNOC_AXI clock
297             - description: GCC MSS MNOC_AXI clock
298             - description: GCC MSS PRNG clock
299             - description: RPMH XO clock