Lines Matching +full:decimation +full:- +full:ratio
1 // SPDX-License-Identifier: GPL-2.0
19 #include <linux/dma/imx-dma.h>
82 { .compatible = "fsl,imx8mm-micfil", .data = &fsl_micfil_imx8mm },
83 { .compatible = "fsl,imx8mp-micfil", .data = &fsl_micfil_imx8mp },
107 switch (micfil->quality) { in micfil_set_quality()
128 return regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL2, in micfil_set_quality()
139 ucontrol->value.integer.value[0] = micfil->quality; in micfil_quality_get()
150 micfil->quality = ucontrol->value.integer.value[0]; in micfil_quality_set()
177 /* The SRES is a self-negated bit which provides the CPU with the
179 * slave-bus interface. This bit always reads as zero, and this
187 ret = regmap_clear_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_reset()
192 ret = regmap_set_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_reset()
198 * SRES is self-cleared bit, but REG_MICFIL_CTRL1 is defined in fsl_micfil_reset()
199 * as non-volatile register, so SRES still remain in regmap in fsl_micfil_reset()
203 ret = regmap_clear_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_reset()
212 ret = regmap_write_bits(micfil->regmap, REG_MICFIL_STAT, 0xFF, 0xFF); in fsl_micfil_reset()
225 dev_err(dai->dev, "micfil dai priv_data not set\n"); in fsl_micfil_startup()
226 return -EINVAL; in fsl_micfil_startup()
236 struct device *dev = &micfil->pdev->dev; in fsl_micfil_trigger()
249 /* DMA Interrupt Selection - DISEL bits in fsl_micfil_trigger()
250 * 00 - DMA and IRQ disabled in fsl_micfil_trigger()
251 * 01 - DMA req enabled in fsl_micfil_trigger()
252 * 10 - IRQ enabled in fsl_micfil_trigger()
253 * 11 - reserved in fsl_micfil_trigger()
255 ret = regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_trigger()
262 ret = regmap_set_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_trigger()
272 ret = regmap_clear_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_trigger()
277 ret = regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_trigger()
284 return -EINVAL; in fsl_micfil_trigger()
291 struct device *dev = &micfil->pdev->dev; in fsl_micfil_reparent_rootclk()
292 u64 ratio = sample_rate; in fsl_micfil_reparent_rootclk() local
297 clk = micfil->mclk; in fsl_micfil_reparent_rootclk()
301 fsl_asoc_reparent_pll_clocks(dev, clk, micfil->pll8k_clk, in fsl_micfil_reparent_rootclk()
302 micfil->pll11k_clk, ratio); in fsl_micfil_reparent_rootclk()
322 ret = regmap_clear_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_hw_params()
328 ret = regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_hw_params()
329 0xFF, ((1 << channels) - 1)); in fsl_micfil_hw_params()
337 ret = clk_set_rate(micfil->mclk, rate * clk_div * osr * 8); in fsl_micfil_hw_params()
345 ret = regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL2, in fsl_micfil_hw_params()
348 FIELD_PREP(MICFIL_CTRL2_CICOSR, 16 - osr)); in fsl_micfil_hw_params()
350 micfil->dma_params_rx.peripheral_config = &micfil->sdmacfg; in fsl_micfil_hw_params()
351 micfil->dma_params_rx.peripheral_size = sizeof(micfil->sdmacfg); in fsl_micfil_hw_params()
352 micfil->sdmacfg.n_fifos_src = channels; in fsl_micfil_hw_params()
353 micfil->sdmacfg.sw_done = true; in fsl_micfil_hw_params()
354 micfil->dma_params_rx.maxburst = channels * MICFIL_DMA_MAXBURST_RX; in fsl_micfil_hw_params()
367 struct fsl_micfil *micfil = dev_get_drvdata(cpu_dai->dev); in fsl_micfil_dai_probe()
368 struct device *dev = cpu_dai->dev; in fsl_micfil_dai_probe()
372 micfil->quality = QUALITY_VLOW0; in fsl_micfil_dai_probe()
375 regmap_write(micfil->regmap, REG_MICFIL_OUT_CTRL, 0x22222222); in fsl_micfil_dai_probe()
380 ret = regmap_update_bits(micfil->regmap, REG_MICFIL_DC_CTRL, in fsl_micfil_dai_probe()
386 micfil->dc_remover = MICFIL_DC_BYPASS; in fsl_micfil_dai_probe()
389 &micfil->dma_params_rx); in fsl_micfil_dai_probe()
391 /* FIFO Watermark Control - FIFOWMK*/ in fsl_micfil_dai_probe()
392 ret = regmap_update_bits(micfil->regmap, REG_MICFIL_FIFO_CTRL, in fsl_micfil_dai_probe()
394 FIELD_PREP(MICFIL_FIFO_CTRL_FIFOWMK, micfil->soc->fifo_depth - 1)); in fsl_micfil_dai_probe()
404 .stream_name = "CPU-Capture",
414 .name = "fsl-micfil-dai",
541 struct platform_device *pdev = micfil->pdev; in micfil_isr()
548 regmap_read(micfil->regmap, REG_MICFIL_STAT, &stat_reg); in micfil_isr()
549 regmap_read(micfil->regmap, REG_MICFIL_CTRL1, &ctrl1_reg); in micfil_isr()
550 regmap_read(micfil->regmap, REG_MICFIL_FIFO_STAT, &fifo_stat_reg); in micfil_isr()
554 /* Channel 0-7 Output Data Flags */ in micfil_isr()
557 dev_dbg(&pdev->dev, in micfil_isr()
563 regmap_write_bits(micfil->regmap, in micfil_isr()
571 dev_dbg(&pdev->dev, in micfil_isr()
576 dev_dbg(&pdev->dev, in micfil_isr()
587 struct platform_device *pdev = micfil->pdev; in micfil_err_isr()
590 regmap_read(micfil->regmap, REG_MICFIL_STAT, &stat_reg); in micfil_err_isr()
593 dev_dbg(&pdev->dev, "isr: Decimation Filter is running\n"); in micfil_err_isr()
596 dev_dbg(&pdev->dev, "isr: FIR Filter Data ready\n"); in micfil_err_isr()
599 dev_dbg(&pdev->dev, "isr: ipg_clk_app is too low\n"); in micfil_err_isr()
600 regmap_write_bits(micfil->regmap, REG_MICFIL_STAT, in micfil_err_isr()
609 struct device_node *np = pdev->dev.of_node; in fsl_micfil_probe()
615 micfil = devm_kzalloc(&pdev->dev, sizeof(*micfil), GFP_KERNEL); in fsl_micfil_probe()
617 return -ENOMEM; in fsl_micfil_probe()
619 micfil->pdev = pdev; in fsl_micfil_probe()
620 strncpy(micfil->name, np->name, sizeof(micfil->name) - 1); in fsl_micfil_probe()
622 micfil->soc = of_device_get_match_data(&pdev->dev); in fsl_micfil_probe()
627 micfil->mclk = devm_clk_get(&pdev->dev, "ipg_clk_app"); in fsl_micfil_probe()
628 if (IS_ERR(micfil->mclk)) { in fsl_micfil_probe()
629 dev_err(&pdev->dev, "failed to get core clock: %ld\n", in fsl_micfil_probe()
630 PTR_ERR(micfil->mclk)); in fsl_micfil_probe()
631 return PTR_ERR(micfil->mclk); in fsl_micfil_probe()
634 micfil->busclk = devm_clk_get(&pdev->dev, "ipg_clk"); in fsl_micfil_probe()
635 if (IS_ERR(micfil->busclk)) { in fsl_micfil_probe()
636 dev_err(&pdev->dev, "failed to get ipg clock: %ld\n", in fsl_micfil_probe()
637 PTR_ERR(micfil->busclk)); in fsl_micfil_probe()
638 return PTR_ERR(micfil->busclk); in fsl_micfil_probe()
641 fsl_asoc_get_pll_clocks(&pdev->dev, &micfil->pll8k_clk, in fsl_micfil_probe()
642 &micfil->pll11k_clk); in fsl_micfil_probe()
649 micfil->regmap = devm_regmap_init_mmio(&pdev->dev, in fsl_micfil_probe()
652 if (IS_ERR(micfil->regmap)) { in fsl_micfil_probe()
653 dev_err(&pdev->dev, "failed to init MICFIL regmap: %ld\n", in fsl_micfil_probe()
654 PTR_ERR(micfil->regmap)); in fsl_micfil_probe()
655 return PTR_ERR(micfil->regmap); in fsl_micfil_probe()
662 &micfil->dataline); in fsl_micfil_probe()
664 micfil->dataline = 1; in fsl_micfil_probe()
666 if (micfil->dataline & ~micfil->soc->dataline) { in fsl_micfil_probe()
667 dev_err(&pdev->dev, "dataline setting error, Mask is 0x%X\n", in fsl_micfil_probe()
668 micfil->soc->dataline); in fsl_micfil_probe()
669 return -EINVAL; in fsl_micfil_probe()
674 micfil->irq[i] = platform_get_irq(pdev, i); in fsl_micfil_probe()
675 if (micfil->irq[i] < 0) in fsl_micfil_probe()
676 return micfil->irq[i]; in fsl_micfil_probe()
680 ret = devm_request_irq(&pdev->dev, micfil->irq[0], in fsl_micfil_probe()
682 micfil->name, micfil); in fsl_micfil_probe()
684 dev_err(&pdev->dev, "failed to claim mic interface irq %u\n", in fsl_micfil_probe()
685 micfil->irq[0]); in fsl_micfil_probe()
690 ret = devm_request_irq(&pdev->dev, micfil->irq[1], in fsl_micfil_probe()
692 micfil->name, micfil); in fsl_micfil_probe()
694 dev_err(&pdev->dev, "failed to claim mic interface error irq %u\n", in fsl_micfil_probe()
695 micfil->irq[1]); in fsl_micfil_probe()
699 micfil->dma_params_rx.chan_name = "rx"; in fsl_micfil_probe()
700 micfil->dma_params_rx.addr = res->start + REG_MICFIL_DATACH0; in fsl_micfil_probe()
701 micfil->dma_params_rx.maxburst = MICFIL_DMA_MAXBURST_RX; in fsl_micfil_probe()
705 pm_runtime_enable(&pdev->dev); in fsl_micfil_probe()
706 regcache_cache_only(micfil->regmap, true); in fsl_micfil_probe()
712 ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0); in fsl_micfil_probe()
714 dev_err(&pdev->dev, "failed to pcm register\n"); in fsl_micfil_probe()
718 fsl_micfil_dai.capture.formats = micfil->soc->formats; in fsl_micfil_probe()
720 ret = devm_snd_soc_register_component(&pdev->dev, &fsl_micfil_component, in fsl_micfil_probe()
723 dev_err(&pdev->dev, "failed to register component %s\n", in fsl_micfil_probe()
734 regcache_cache_only(micfil->regmap, true); in fsl_micfil_runtime_suspend()
736 clk_disable_unprepare(micfil->mclk); in fsl_micfil_runtime_suspend()
737 clk_disable_unprepare(micfil->busclk); in fsl_micfil_runtime_suspend()
747 ret = clk_prepare_enable(micfil->busclk); in fsl_micfil_runtime_resume()
751 ret = clk_prepare_enable(micfil->mclk); in fsl_micfil_runtime_resume()
753 clk_disable_unprepare(micfil->busclk); in fsl_micfil_runtime_resume()
757 regcache_cache_only(micfil->regmap, false); in fsl_micfil_runtime_resume()
758 regcache_mark_dirty(micfil->regmap); in fsl_micfil_runtime_resume()
759 regcache_sync(micfil->regmap); in fsl_micfil_runtime_resume()
789 .name = "fsl-micfil-dai",
796 MODULE_AUTHOR("Cosmin-Gabriel Samoila <cosmin.samoila@nxp.com>");