52 	struct cqspi_st	*cqspi;  member
99 	u32 (*get_dma_status)(struct cqspi_st *cqspi);
289 static bool cqspi_is_idle(struct cqspi_st *cqspi)  in cqspi_is_idle()  argument
291 	u32 reg = readl(cqspi->iobase + CQSPI_REG_CONFIG);  in cqspi_is_idle()
296 static u32 cqspi_get_rd_sram_level(struct cqspi_st *cqspi)  in cqspi_get_rd_sram_level()  argument
298 	u32 reg = readl(cqspi->iobase + CQSPI_REG_SDRAMLEVEL);  in cqspi_get_rd_sram_level()
304 static u32 cqspi_get_versal_dma_status(struct cqspi_st *cqspi)  in cqspi_get_versal_dma_status()  argument
308 	dma_status = readl(cqspi->iobase +  in cqspi_get_versal_dma_status()
310 	writel(dma_status, cqspi->iobase +  in cqspi_get_versal_dma_status()
318 	struct cqspi_st *cqspi = dev;  in cqspi_irq_handler()  local
320 	struct device *device = &cqspi->pdev->dev;  in cqspi_irq_handler()
326 	irq_status = readl(cqspi->iobase + CQSPI_REG_IRQSTATUS);  in cqspi_irq_handler()
329 	writel(irq_status, cqspi->iobase + CQSPI_REG_IRQSTATUS);  in cqspi_irq_handler()
331 	if (cqspi->use_dma_read && ddata && ddata->get_dma_status) {  in cqspi_irq_handler()
332 		if (ddata->get_dma_status(cqspi)) {  in cqspi_irq_handler()
333 			complete(&cqspi->transfer_complete);  in cqspi_irq_handler()
338 	else if (!cqspi->slow_sram)  in cqspi_irq_handler()
344 		complete(&cqspi->transfer_complete);  in cqspi_irq_handler()
374 static int cqspi_wait_idle(struct cqspi_st *cqspi)  in cqspi_wait_idle()  argument
387 		if (cqspi_is_idle(cqspi))  in cqspi_wait_idle()
397 			dev_err(&cqspi->pdev->dev,  in cqspi_wait_idle()
407 static int cqspi_exec_flash_cmd(struct cqspi_st *cqspi, unsigned int reg)  in cqspi_exec_flash_cmd()  argument
409 	void __iomem *reg_base = cqspi->iobase;  in cqspi_exec_flash_cmd()
422 		dev_err(&cqspi->pdev->dev,  in cqspi_exec_flash_cmd()
428 	return cqspi_wait_idle(cqspi);  in cqspi_exec_flash_cmd()
435 	struct cqspi_st *cqspi = f_pdata->cqspi;  in cqspi_setup_opcode_ext()  local
436 	void __iomem *reg_base = cqspi->iobase;  in cqspi_setup_opcode_ext()
457 	struct cqspi_st *cqspi = f_pdata->cqspi;  in cqspi_enable_dtr()  local
458 	void __iomem *reg_base = cqspi->iobase;  in cqspi_enable_dtr()
483 	return cqspi_wait_idle(cqspi);  in cqspi_enable_dtr()
489 	struct cqspi_st *cqspi = f_pdata->cqspi;  in cqspi_command_read()  local
490 	void __iomem *reg_base = cqspi->iobase;  in cqspi_command_read()
505 		dev_err(&cqspi->pdev->dev,  in cqspi_command_read()
534 	status = cqspi_exec_flash_cmd(cqspi, reg);  in cqspi_command_read()
558 	struct cqspi_st *cqspi = f_pdata->cqspi;  in cqspi_command_write()  local
559 	void __iomem *reg_base = cqspi->iobase;  in cqspi_command_write()
573 		dev_err(&cqspi->pdev->dev,  in cqspi_command_write()
616 	return cqspi_exec_flash_cmd(cqspi, reg);  in cqspi_command_write()
622 	struct cqspi_st *cqspi = f_pdata->cqspi;  in cqspi_read_setup()  local
623 	void __iomem *reg_base = cqspi->iobase;  in cqspi_read_setup()
665 	struct cqspi_st *cqspi = f_pdata->cqspi;  in cqspi_indirect_read_execute()  local
666 	struct device *dev = &cqspi->pdev->dev;  in cqspi_indirect_read_execute()
667 	void __iomem *reg_base = cqspi->iobase;  in cqspi_indirect_read_execute()
668 	void __iomem *ahb_base = cqspi->ahb_base;  in cqspi_indirect_read_execute()
689 	if (!cqspi->slow_sram)  in cqspi_indirect_read_execute()
694 	reinit_completion(&cqspi->transfer_complete);  in cqspi_indirect_read_execute()
699 		if (!wait_for_completion_timeout(&cqspi->transfer_complete,  in cqspi_indirect_read_execute()
707 		if (cqspi->slow_sram)  in cqspi_indirect_read_execute()
710 		bytes_to_read = cqspi_get_rd_sram_level(cqspi);  in cqspi_indirect_read_execute()
720 			bytes_to_read *= cqspi->fifo_width;  in cqspi_indirect_read_execute()
738 			bytes_to_read = cqspi_get_rd_sram_level(cqspi);  in cqspi_indirect_read_execute()
742 			reinit_completion(&cqspi->transfer_complete);  in cqspi_indirect_read_execute()
743 			if (cqspi->slow_sram)  in cqspi_indirect_read_execute()
778 	struct cqspi_st *cqspi = f_pdata->cqspi;  in cqspi_versal_indirect_read_dma()  local
779 	struct device *dev = &cqspi->pdev->dev;  in cqspi_versal_indirect_read_dma()
780 	void __iomem *reg_base = cqspi->iobase;  in cqspi_versal_indirect_read_dma()
794 	ret = zynqmp_pm_ospi_mux_select(cqspi->pd_dev_id, PM_OSPI_MUX_SEL_DMA);  in cqspi_versal_indirect_read_dma()
798 	reg = readl(cqspi->iobase + CQSPI_REG_CONFIG);  in cqspi_versal_indirect_read_dma()
800 	writel(reg, cqspi->iobase + CQSPI_REG_CONFIG);  in cqspi_versal_indirect_read_dma()
830 	writel(cqspi->trigger_address, reg_base +  in cqspi_versal_indirect_read_dma()
843 	reinit_completion(&cqspi->transfer_complete);  in cqspi_versal_indirect_read_dma()
845 	if (!wait_for_completion_timeout(&cqspi->transfer_complete,  in cqspi_versal_indirect_read_dma()
852 	writel(0x0, cqspi->iobase + CQSPI_REG_VERSAL_DMA_DST_I_DIS);  in cqspi_versal_indirect_read_dma()
856 	       cqspi->iobase + CQSPI_REG_INDIRECTRD);  in cqspi_versal_indirect_read_dma()
859 	reg = readl(cqspi->iobase + CQSPI_REG_CONFIG);  in cqspi_versal_indirect_read_dma()
861 	writel(reg, cqspi->iobase + CQSPI_REG_CONFIG);  in cqspi_versal_indirect_read_dma()
863 	ret = zynqmp_pm_ospi_mux_select(cqspi->pd_dev_id,  in cqspi_versal_indirect_read_dma()
890 	reg = readl(cqspi->iobase + CQSPI_REG_CONFIG);  in cqspi_versal_indirect_read_dma()
892 	writel(reg, cqspi->iobase + CQSPI_REG_CONFIG);  in cqspi_versal_indirect_read_dma()
894 	zynqmp_pm_ospi_mux_select(cqspi->pd_dev_id, PM_OSPI_MUX_SEL_LINEAR);  in cqspi_versal_indirect_read_dma()
904 	struct cqspi_st *cqspi = f_pdata->cqspi;  in cqspi_write_setup()  local
905 	void __iomem *reg_base = cqspi->iobase;  in cqspi_write_setup()
936 	if (cqspi->wr_completion) {  in cqspi_write_setup()
953 	struct cqspi_st *cqspi = f_pdata->cqspi;  in cqspi_indirect_write_execute()  local
954 	struct device *dev = &cqspi->pdev->dev;  in cqspi_indirect_write_execute()
955 	void __iomem *reg_base = cqspi->iobase;  in cqspi_indirect_write_execute()
968 	reinit_completion(&cqspi->transfer_complete);  in cqspi_indirect_write_execute()
978 	if (cqspi->wr_delay)  in cqspi_indirect_write_execute()
979 		ndelay(cqspi->wr_delay);  in cqspi_indirect_write_execute()
989 			iowrite32_rep(cqspi->ahb_base, txbuf, write_words);  in cqspi_indirect_write_execute()
996 			iowrite32(temp, cqspi->ahb_base);  in cqspi_indirect_write_execute()
1000 		if (!wait_for_completion_timeout(&cqspi->transfer_complete,  in cqspi_indirect_write_execute()
1010 			reinit_completion(&cqspi->transfer_complete);  in cqspi_indirect_write_execute()
1027 	cqspi_wait_idle(cqspi);  in cqspi_indirect_write_execute()
1043 	struct cqspi_st *cqspi = f_pdata->cqspi;  in cqspi_chipselect()  local
1044 	void __iomem *reg_base = cqspi->iobase;  in cqspi_chipselect()
1049 	if (cqspi->is_decoded_cs) {  in cqspi_chipselect()
1083 	struct cqspi_st *cqspi = f_pdata->cqspi;  in cqspi_delay()  local
1084 	void __iomem *iobase = cqspi->iobase;  in cqspi_delay()
1085 	const unsigned int ref_clk_hz = cqspi->master_ref_clk_hz;  in cqspi_delay()
1091 	tsclk = DIV_ROUND_UP(ref_clk_hz, cqspi->sclk);  in cqspi_delay()
1113 static void cqspi_config_baudrate_div(struct cqspi_st *cqspi)  in cqspi_config_baudrate_div()  argument
1115 	const unsigned int ref_clk_hz = cqspi->master_ref_clk_hz;  in cqspi_config_baudrate_div()
1116 	void __iomem *reg_base = cqspi->iobase;  in cqspi_config_baudrate_div()
1120 	div = DIV_ROUND_UP(ref_clk_hz, 2 * cqspi->sclk) - 1;  in cqspi_config_baudrate_div()
1128 static void cqspi_readdata_capture(struct cqspi_st *cqspi,  in cqspi_readdata_capture()  argument
1132 	void __iomem *reg_base = cqspi->iobase;  in cqspi_readdata_capture()
1151 static void cqspi_controller_enable(struct cqspi_st *cqspi, bool enable)  in cqspi_controller_enable()  argument
1153 	void __iomem *reg_base = cqspi->iobase;  in cqspi_controller_enable()
1169 	struct cqspi_st *cqspi = f_pdata->cqspi;  in cqspi_configure()  local
1170 	int switch_cs = (cqspi->current_cs != f_pdata->cs);  in cqspi_configure()
1171 	int switch_ck = (cqspi->sclk != sclk);  in cqspi_configure()
1174 		cqspi_controller_enable(cqspi, 0);  in cqspi_configure()
1178 		cqspi->current_cs = f_pdata->cs;  in cqspi_configure()
1184 		cqspi->sclk = sclk;  in cqspi_configure()
1185 		cqspi_config_baudrate_div(cqspi);  in cqspi_configure()
1187 		cqspi_readdata_capture(cqspi, !cqspi->rclk_en,  in cqspi_configure()
1192 		cqspi_controller_enable(cqspi, 1);  in cqspi_configure()
1198 	struct cqspi_st *cqspi = f_pdata->cqspi;  in cqspi_write()  local
1216 	if (!op->cmd.dtr && cqspi->use_direct_mode &&  in cqspi_write()
1217 	    ((to + len) <= cqspi->ahb_size)) {  in cqspi_write()
1218 		memcpy_toio(cqspi->ahb_base + to, buf, len);  in cqspi_write()
1219 		return cqspi_wait_idle(cqspi);  in cqspi_write()
1227 	struct cqspi_st *cqspi = param;  in cqspi_rx_dma_callback()  local
1229 	complete(&cqspi->rx_dma_complete);  in cqspi_rx_dma_callback()
1235 	struct cqspi_st *cqspi = f_pdata->cqspi;  in cqspi_direct_read_execute()  local
1236 	struct device *dev = &cqspi->pdev->dev;  in cqspi_direct_read_execute()
1238 	dma_addr_t dma_src = (dma_addr_t)cqspi->mmap_phys_base + from;  in cqspi_direct_read_execute()
1245 	if (!cqspi->rx_chan || !virt_addr_valid(buf)) {  in cqspi_direct_read_execute()
1246 		memcpy_fromio(buf, cqspi->ahb_base + from, len);  in cqspi_direct_read_execute()
1250 	ddev = cqspi->rx_chan->device->dev;  in cqspi_direct_read_execute()
1256 	tx = dmaengine_prep_dma_memcpy(cqspi->rx_chan, dma_dst, dma_src,  in cqspi_direct_read_execute()
1265 	tx->callback_param = cqspi;  in cqspi_direct_read_execute()
1267 	reinit_completion(&cqspi->rx_dma_complete);  in cqspi_direct_read_execute()
1276 	dma_async_issue_pending(cqspi->rx_chan);  in cqspi_direct_read_execute()
1277 	if (!wait_for_completion_timeout(&cqspi->rx_dma_complete,  in cqspi_direct_read_execute()
1279 		dmaengine_terminate_sync(cqspi->rx_chan);  in cqspi_direct_read_execute()
1294 	struct cqspi_st *cqspi = f_pdata->cqspi;  in cqspi_read()  local
1295 	struct device *dev = &cqspi->pdev->dev;  in cqspi_read()
1309 	if (cqspi->use_direct_mode && ((from + len) <= cqspi->ahb_size))  in cqspi_read()
1312 	if (cqspi->use_dma_read && ddata && ddata->indirect_read_dma &&  in cqspi_read()
1321 	struct cqspi_st *cqspi = spi_master_get_devdata(mem->spi->master);  in cqspi_mem_process()  local
1324 	f_pdata = &cqspi->f_pdata[mem->spi->chip_select];  in cqspi_mem_process()
1421 static int cqspi_of_get_pdata(struct cqspi_st *cqspi)  in cqspi_of_get_pdata()  argument
1423 	struct device *dev = &cqspi->pdev->dev;  in cqspi_of_get_pdata()
1427 	cqspi->is_decoded_cs = of_property_read_bool(np, "cdns,is-decoded-cs");  in cqspi_of_get_pdata()
1429 	if (of_property_read_u32(np, "cdns,fifo-depth", &cqspi->fifo_depth)) {  in cqspi_of_get_pdata()
1434 	if (of_property_read_u32(np, "cdns,fifo-width", &cqspi->fifo_width)) {  in cqspi_of_get_pdata()
1440 				 &cqspi->trigger_address)) {  in cqspi_of_get_pdata()
1445 	if (of_property_read_u32(np, "num-cs", &cqspi->num_chipselect))  in cqspi_of_get_pdata()
1446 		cqspi->num_chipselect = CQSPI_MAX_CHIPSELECT;  in cqspi_of_get_pdata()
1448 	cqspi->rclk_en = of_property_read_bool(np, "cdns,rclk-en");  in cqspi_of_get_pdata()
1452 		cqspi->pd_dev_id = id[1];  in cqspi_of_get_pdata()
1457 static void cqspi_controller_init(struct cqspi_st *cqspi)  in cqspi_controller_init()  argument
1461 	cqspi_controller_enable(cqspi, 0);  in cqspi_controller_init()
1464 	writel(0, cqspi->iobase + CQSPI_REG_REMAP);  in cqspi_controller_init()
1467 	writel(0, cqspi->iobase + CQSPI_REG_IRQMASK);  in cqspi_controller_init()
1470 	writel(cqspi->fifo_depth / 2, cqspi->iobase + CQSPI_REG_SRAMPARTITION);  in cqspi_controller_init()
1473 	writel(cqspi->trigger_address,  in cqspi_controller_init()
1474 	       cqspi->iobase + CQSPI_REG_INDIRECTTRIGGER);  in cqspi_controller_init()
1477 	writel(cqspi->fifo_depth * cqspi->fifo_width / 2,  in cqspi_controller_init()
1478 	       cqspi->iobase + CQSPI_REG_INDIRECTRDWATERMARK);  in cqspi_controller_init()
1480 	writel(cqspi->fifo_depth * cqspi->fifo_width / 8,  in cqspi_controller_init()
1481 	       cqspi->iobase + CQSPI_REG_INDIRECTWRWATERMARK);  in cqspi_controller_init()
1484 	if (!cqspi->use_direct_mode) {  in cqspi_controller_init()
1485 		reg = readl(cqspi->iobase + CQSPI_REG_CONFIG);  in cqspi_controller_init()
1487 		writel(reg, cqspi->iobase + CQSPI_REG_CONFIG);  in cqspi_controller_init()
1491 	if (cqspi->use_dma_read) {  in cqspi_controller_init()
1492 		reg = readl(cqspi->iobase + CQSPI_REG_CONFIG);  in cqspi_controller_init()
1494 		writel(reg, cqspi->iobase + CQSPI_REG_CONFIG);  in cqspi_controller_init()
1497 	cqspi_controller_enable(cqspi, 1);  in cqspi_controller_init()
1500 static int cqspi_request_mmap_dma(struct cqspi_st *cqspi)  in cqspi_request_mmap_dma()  argument
1507 	cqspi->rx_chan = dma_request_chan_by_mask(&mask);  in cqspi_request_mmap_dma()
1508 	if (IS_ERR(cqspi->rx_chan)) {  in cqspi_request_mmap_dma()
1509 		int ret = PTR_ERR(cqspi->rx_chan);  in cqspi_request_mmap_dma()
1511 		cqspi->rx_chan = NULL;  in cqspi_request_mmap_dma()
1512 		return dev_err_probe(&cqspi->pdev->dev, ret, "No Rx DMA available\n");  in cqspi_request_mmap_dma()
1514 	init_completion(&cqspi->rx_dma_complete);  in cqspi_request_mmap_dma()
1521 	struct cqspi_st *cqspi = spi_master_get_devdata(mem->spi->master);  in cqspi_get_name()  local
1522 	struct device *dev = &cqspi->pdev->dev;  in cqspi_get_name()
1537 static int cqspi_setup_flash(struct cqspi_st *cqspi)  in cqspi_setup_flash()  argument
1539 	struct platform_device *pdev = cqspi->pdev;  in cqspi_setup_flash()
1561 		f_pdata = &cqspi->f_pdata[cs];  in cqspi_setup_flash()
1562 		f_pdata->cqspi = cqspi;  in cqspi_setup_flash()
1582 	struct cqspi_st *cqspi;  in cqspi_probe()  local
1587 	master = devm_spi_alloc_master(&pdev->dev, sizeof(*cqspi));  in cqspi_probe()
1597 	cqspi = spi_master_get_devdata(master);  in cqspi_probe()
1599 	cqspi->pdev = pdev;  in cqspi_probe()
1600 	cqspi->master = master;  in cqspi_probe()
1601 	platform_set_drvdata(pdev, cqspi);  in cqspi_probe()
1604 	ret = cqspi_of_get_pdata(cqspi);  in cqspi_probe()
1611 	cqspi->clk = devm_clk_get(dev, NULL);  in cqspi_probe()
1612 	if (IS_ERR(cqspi->clk)) {  in cqspi_probe()
1614 		ret = PTR_ERR(cqspi->clk);  in cqspi_probe()
1620 	cqspi->iobase = devm_ioremap_resource(dev, res);  in cqspi_probe()
1621 	if (IS_ERR(cqspi->iobase)) {  in cqspi_probe()
1623 		ret = PTR_ERR(cqspi->iobase);  in cqspi_probe()
1629 	cqspi->ahb_base = devm_ioremap_resource(dev, res_ahb);  in cqspi_probe()
1630 	if (IS_ERR(cqspi->ahb_base)) {  in cqspi_probe()
1632 		ret = PTR_ERR(cqspi->ahb_base);  in cqspi_probe()
1635 	cqspi->mmap_phys_base = (dma_addr_t)res_ahb->start;  in cqspi_probe()
1636 	cqspi->ahb_size = resource_size(res_ahb);  in cqspi_probe()
1638 	init_completion(&cqspi->transfer_complete);  in cqspi_probe()
1650 	ret = clk_prepare_enable(cqspi->clk);  in cqspi_probe()
1677 	cqspi->master_ref_clk_hz = clk_get_rate(cqspi->clk);  in cqspi_probe()
1678 	master->max_speed_hz = cqspi->master_ref_clk_hz;  in cqspi_probe()
1681 	cqspi->wr_completion = true;  in cqspi_probe()
1686 			cqspi->wr_delay = 50 * DIV_ROUND_UP(NSEC_PER_SEC,  in cqspi_probe()
1687 						cqspi->master_ref_clk_hz);  in cqspi_probe()
1691 			cqspi->use_direct_mode = true;  in cqspi_probe()
1693 			cqspi->use_dma_read = true;  in cqspi_probe()
1695 			cqspi->wr_completion = false;  in cqspi_probe()
1697 			cqspi->slow_sram = true;  in cqspi_probe()
1705 			       pdev->name, cqspi);  in cqspi_probe()
1711 	cqspi_wait_idle(cqspi);  in cqspi_probe()
1712 	cqspi_controller_init(cqspi);  in cqspi_probe()
1713 	cqspi->current_cs = -1;  in cqspi_probe()
1714 	cqspi->sclk = 0;  in cqspi_probe()
1716 	master->num_chipselect = cqspi->num_chipselect;  in cqspi_probe()
1718 	ret = cqspi_setup_flash(cqspi);  in cqspi_probe()
1724 	if (cqspi->use_direct_mode) {  in cqspi_probe()
1725 		ret = cqspi_request_mmap_dma(cqspi);  in cqspi_probe()
1738 	cqspi_controller_enable(cqspi, 0);  in cqspi_probe()
1740 	clk_disable_unprepare(cqspi->clk);  in cqspi_probe()
1750 	struct cqspi_st *cqspi = platform_get_drvdata(pdev);  in cqspi_remove()  local
1752 	spi_unregister_master(cqspi->master);  in cqspi_remove()
1753 	cqspi_controller_enable(cqspi, 0);  in cqspi_remove()
1755 	if (cqspi->rx_chan)  in cqspi_remove()
1756 		dma_release_channel(cqspi->rx_chan);  in cqspi_remove()
1758 	clk_disable_unprepare(cqspi->clk);  in cqspi_remove()
1769 	struct cqspi_st *cqspi = dev_get_drvdata(dev);  in cqspi_suspend()  local
1771 	cqspi_controller_enable(cqspi, 0);  in cqspi_suspend()
1777 	struct cqspi_st *cqspi = dev_get_drvdata(dev);  in cqspi_resume()  local
1779 	cqspi_controller_enable(cqspi, 1);  in cqspi_resume()