Lines Matching full:pcie
12 * support RT2880/RT3883 PCIe
15 * support RT6855/MT7620 PCIe
48 /* PCIe RC control registers */
66 * struct mt7621_pcie_port - PCIe port information
69 * @pcie: pointer to PCIe host info
80 struct mt7621_pcie *pcie; member
90 * struct mt7621_pcie - PCIe host information
92 * @dev: Pointer to PCIe device
93 * @ports: pointer to PCIe port information
104 static inline u32 pcie_read(struct mt7621_pcie *pcie, u32 reg) in pcie_read() argument
106 return readl_relaxed(pcie->base + reg); in pcie_read()
109 static inline void pcie_write(struct mt7621_pcie *pcie, u32 val, u32 reg) in pcie_write() argument
111 writel_relaxed(val, pcie->base + reg); in pcie_write()
128 struct mt7621_pcie *pcie = bus->sysdata; in mt7621_pcie_map_bus() local
132 writel_relaxed(address, pcie->base + RALINK_PCI_CONFIG_ADDR); in mt7621_pcie_map_bus()
134 return pcie->base + RALINK_PCI_CONFIG_DATA + (where & 3); in mt7621_pcie_map_bus()
143 static u32 read_config(struct mt7621_pcie *pcie, unsigned int dev, u32 reg) in read_config() argument
147 pcie_write(pcie, address, RALINK_PCI_CONFIG_ADDR); in read_config()
148 return pcie_read(pcie, RALINK_PCI_CONFIG_DATA); in read_config()
151 static void write_config(struct mt7621_pcie *pcie, unsigned int dev, in write_config() argument
156 pcie_write(pcie, address, RALINK_PCI_CONFIG_ADDR); in write_config()
157 pcie_write(pcie, val, RALINK_PCI_CONFIG_DATA); in write_config()
179 struct mt7621_pcie *pcie = port->pcie; in mt7621_control_assert() local
181 if (pcie->resets_inverted) in mt7621_control_assert()
189 struct mt7621_pcie *pcie = port->pcie; in mt7621_control_deassert() local
191 if (pcie->resets_inverted) in mt7621_control_deassert()
197 static int mt7621_pcie_parse_port(struct mt7621_pcie *pcie, in mt7621_pcie_parse_port() argument
202 struct device *dev = pcie->dev; in mt7621_pcie_parse_port()
217 dev_err(dev, "failed to get pcie%d clock\n", slot); in mt7621_pcie_parse_port()
223 dev_err(dev, "failed to get pcie%d reset control\n", slot); in mt7621_pcie_parse_port()
227 snprintf(name, sizeof(name), "pcie-phy%d", slot); in mt7621_pcie_parse_port()
230 dev_err(dev, "failed to get pcie-phy%d\n", slot); in mt7621_pcie_parse_port()
238 dev_err(dev, "failed to get GPIO for PCIe%d\n", slot); in mt7621_pcie_parse_port()
244 port->pcie = pcie; in mt7621_pcie_parse_port()
247 list_add_tail(&port->list, &pcie->ports); in mt7621_pcie_parse_port()
256 static int mt7621_pcie_parse_dt(struct mt7621_pcie *pcie) in mt7621_pcie_parse_dt() argument
258 struct device *dev = pcie->dev; in mt7621_pcie_parse_dt()
263 pcie->base = devm_platform_ioremap_resource(pdev, 0); in mt7621_pcie_parse_dt()
264 if (IS_ERR(pcie->base)) in mt7621_pcie_parse_dt()
265 return PTR_ERR(pcie->base); in mt7621_pcie_parse_dt()
279 err = mt7621_pcie_parse_port(pcie, child, slot); in mt7621_pcie_parse_dt()
291 struct mt7621_pcie *pcie = port->pcie; in mt7621_pcie_init_port() local
292 struct device *dev = pcie->dev; in mt7621_pcie_init_port()
314 static void mt7621_pcie_reset_assert(struct mt7621_pcie *pcie) in mt7621_pcie_reset_assert() argument
318 list_for_each_entry(port, &pcie->ports, list) { in mt7621_pcie_reset_assert()
319 /* PCIe RC reset assert */ in mt7621_pcie_reset_assert()
322 /* PCIe EP reset assert */ in mt7621_pcie_reset_assert()
329 static void mt7621_pcie_reset_rc_deassert(struct mt7621_pcie *pcie) in mt7621_pcie_reset_rc_deassert() argument
333 list_for_each_entry(port, &pcie->ports, list) in mt7621_pcie_reset_rc_deassert()
337 static void mt7621_pcie_reset_ep_deassert(struct mt7621_pcie *pcie) in mt7621_pcie_reset_ep_deassert() argument
341 list_for_each_entry(port, &pcie->ports, list) in mt7621_pcie_reset_ep_deassert()
347 static int mt7621_pcie_init_ports(struct mt7621_pcie *pcie) in mt7621_pcie_init_ports() argument
349 struct device *dev = pcie->dev; in mt7621_pcie_init_ports()
354 mt7621_pcie_reset_assert(pcie); in mt7621_pcie_init_ports()
355 mt7621_pcie_reset_rc_deassert(pcie); in mt7621_pcie_init_ports()
357 list_for_each_entry_safe(port, tmp, &pcie->ports, list) { in mt7621_pcie_init_ports()
372 mt7621_pcie_reset_ep_deassert(pcie); in mt7621_pcie_init_ports()
375 list_for_each_entry(port, &pcie->ports, list) { in mt7621_pcie_init_ports()
379 dev_err(dev, "pcie%d no card, disable it (RST & CLK)\n", in mt7621_pcie_init_ports()
400 struct mt7621_pcie *pcie = port->pcie; in mt7621_pcie_enable_port() local
404 /* enable pcie interrupt */ in mt7621_pcie_enable_port()
405 val = pcie_read(pcie, RALINK_PCI_PCIMSK_ADDR); in mt7621_pcie_enable_port()
407 pcie_write(pcie, val, RALINK_PCI_PCIMSK_ADDR); in mt7621_pcie_enable_port()
418 val = read_config(pcie, slot, PCIE_FTS_NUM); in mt7621_pcie_enable_port()
421 write_config(pcie, slot, PCIE_FTS_NUM, val); in mt7621_pcie_enable_port()
426 struct mt7621_pcie *pcie = pci_host_bridge_priv(host); in mt7621_pcie_enable_ports() local
427 struct device *dev = pcie->dev; in mt7621_pcie_enable_ports()
439 pcie_write(pcie, 0xffffffff, RALINK_PCI_MEMBASE); in mt7621_pcie_enable_ports()
440 pcie_write(pcie, entry->res->start - entry->offset, RALINK_PCI_IOBASE); in mt7621_pcie_enable_ports()
442 list_for_each_entry(port, &pcie->ports, list) { in mt7621_pcie_enable_ports()
446 dev_err(dev, "enabling clk pcie%d\n", in mt7621_pcie_enable_ports()
452 dev_info(dev, "PCIE%d enabled\n", port->slot); in mt7621_pcie_enable_ports()
461 struct mt7621_pcie *pcie = pci_host_bridge_priv(host); in mt7621_pcie_register_host() local
464 host->sysdata = pcie; in mt7621_pcie_register_host()
477 struct mt7621_pcie *pcie; in mt7621_pcie_probe() local
484 bridge = devm_pci_alloc_host_bridge(dev, sizeof(*pcie)); in mt7621_pcie_probe()
488 pcie = pci_host_bridge_priv(bridge); in mt7621_pcie_probe()
489 pcie->dev = dev; in mt7621_pcie_probe()
490 platform_set_drvdata(pdev, pcie); in mt7621_pcie_probe()
491 INIT_LIST_HEAD(&pcie->ports); in mt7621_pcie_probe()
495 pcie->resets_inverted = true; in mt7621_pcie_probe()
497 err = mt7621_pcie_parse_dt(pcie); in mt7621_pcie_probe()
503 err = mt7621_pcie_init_ports(pcie); in mt7621_pcie_probe()
511 dev_err(dev, "error enabling pcie ports\n"); in mt7621_pcie_probe()
518 list_for_each_entry(port, &pcie->ports, list) in mt7621_pcie_probe()
526 struct mt7621_pcie *pcie = platform_get_drvdata(pdev); in mt7621_pcie_remove() local
529 list_for_each_entry(port, &pcie->ports, list) in mt7621_pcie_remove()